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Line 37... | Line 37... | ||
37 | #include <arch/register.h> |
37 | #include <arch/register.h> |
38 | #include <arch/asm.h> |
38 | #include <arch/asm.h> |
39 | 39 | ||
40 | void fpu_context_save(fpu_context_t *fctx) |
40 | void fpu_context_save(fpu_context_t *fctx) |
41 | { |
41 | { |
42 | fprs_reg_t fprs; |
- | |
43 | - | ||
44 | fprs.value = fprs_read(); |
- | |
45 | - | ||
46 | if (fprs.dl) { |
- | |
47 | /* |
- | |
48 | * The lower half of floating-point registers is dirty. |
- | |
49 | * Spill it to memory. |
- | |
50 | */ |
- | |
51 | __asm__ volatile ( |
42 | __asm__ volatile ( |
52 | "std %%f0, %0\n" |
43 | "std %%f0, %0\n" |
53 | "std %%f2, %1\n" |
44 | "std %%f2, %1\n" |
54 | "std %%f4, %2\n" |
45 | "std %%f4, %2\n" |
55 | "std %%f6, %3\n" |
46 | "std %%f6, %3\n" |
Line 68... | Line 59... | ||
68 | : "=m" (fctx->d[0]), "=m" (fctx->d[1]), "=m" (fctx->d[2]), "=m" (fctx->d[3]), |
59 | : "=m" (fctx->d[0]), "=m" (fctx->d[1]), "=m" (fctx->d[2]), "=m" (fctx->d[3]), |
69 | "=m" (fctx->d[4]), "=m" (fctx->d[5]), "=m" (fctx->d[6]), "=m" (fctx->d[7]), |
60 | "=m" (fctx->d[4]), "=m" (fctx->d[5]), "=m" (fctx->d[6]), "=m" (fctx->d[7]), |
70 | "=m" (fctx->d[8]), "=m" (fctx->d[9]), "=m" (fctx->d[10]), "=m" (fctx->d[11]), |
61 | "=m" (fctx->d[8]), "=m" (fctx->d[9]), "=m" (fctx->d[10]), "=m" (fctx->d[11]), |
71 | "=m" (fctx->d[12]), "=m" (fctx->d[13]), "=m" (fctx->d[14]), "=m" (fctx->d[15]) |
62 | "=m" (fctx->d[12]), "=m" (fctx->d[13]), "=m" (fctx->d[14]), "=m" (fctx->d[15]) |
72 | ); |
63 | ); |
73 | fprs.dl = false; |
- | |
74 | } |
- | |
75 | 64 | ||
76 | if (fprs.du) { |
- | |
77 | /* |
65 | /* |
78 | * The upper half of floating-point registers is dirty. |
66 | * We need to split loading of the floating-point registers because |
79 | * Spill it to memory. |
67 | * GCC (4.1.1) can't handle more than 30 operands in one asm statement. |
80 | */ |
68 | */ |
- | 69 | ||
81 | __asm__ volatile ( |
70 | __asm__ volatile ( |
82 | "std %%f32, %0\n" |
71 | "std %%f32, %0\n" |
83 | "std %%f34, %1\n" |
72 | "std %%f34, %1\n" |
84 | "std %%f36, %2\n" |
73 | "std %%f36, %2\n" |
85 | "std %%f38, %3\n" |
74 | "std %%f38, %3\n" |
Line 98... | Line 87... | ||
98 | : "=m" (fctx->d[16]), "=m" (fctx->d[17]), "=m" (fctx->d[18]), "=m" (fctx->d[19]), |
87 | : "=m" (fctx->d[16]), "=m" (fctx->d[17]), "=m" (fctx->d[18]), "=m" (fctx->d[19]), |
99 | "=m" (fctx->d[20]), "=m" (fctx->d[21]), "=m" (fctx->d[22]), "=m" (fctx->d[23]), |
88 | "=m" (fctx->d[20]), "=m" (fctx->d[21]), "=m" (fctx->d[22]), "=m" (fctx->d[23]), |
100 | "=m" (fctx->d[24]), "=m" (fctx->d[25]), "=m" (fctx->d[26]), "=m" (fctx->d[27]), |
89 | "=m" (fctx->d[24]), "=m" (fctx->d[25]), "=m" (fctx->d[26]), "=m" (fctx->d[27]), |
101 | "=m" (fctx->d[28]), "=m" (fctx->d[29]), "=m" (fctx->d[30]), "=m" (fctx->d[31]) |
90 | "=m" (fctx->d[28]), "=m" (fctx->d[29]), "=m" (fctx->d[30]), "=m" (fctx->d[31]) |
102 | ); |
91 | ); |
103 | fprs.du = false; |
- | |
104 | } |
- | |
105 | - | ||
106 | fprs_write(fprs.value); |
- | |
107 | 92 | ||
108 | __asm__ volatile ("stx %%fsr, %0\n" : "=m" (fctx->fsr)); |
93 | __asm__ volatile ("stx %%fsr, %0\n" : "=m" (fctx->fsr)); |
109 | } |
94 | } |
110 | 95 | ||
111 | void fpu_context_restore(fpu_context_t *fctx) |
96 | void fpu_context_restore(fpu_context_t *fctx) |
112 | { |
97 | { |
113 | fprs_reg_t fprs; |
- | |
114 | - | ||
115 | fprs.value = fprs_read(); |
- | |
116 | - | ||
117 | __asm__ volatile ( |
98 | __asm__ volatile ( |
118 | "ldd %0, %%f0\n" |
99 | "ldd %0, %%f0\n" |
119 | "ldd %1, %%f2\n" |
100 | "ldd %1, %%f2\n" |
120 | "ldd %2, %%f4\n" |
101 | "ldd %2, %%f4\n" |
121 | "ldd %3, %%f6\n" |
102 | "ldd %3, %%f6\n" |
Line 165... | Line 146... | ||
165 | "m" (fctx->d[20]), "m" (fctx->d[21]), "m" (fctx->d[22]), "m" (fctx->d[23]), |
146 | "m" (fctx->d[20]), "m" (fctx->d[21]), "m" (fctx->d[22]), "m" (fctx->d[23]), |
166 | "m" (fctx->d[24]), "m" (fctx->d[25]), "m" (fctx->d[26]), "m" (fctx->d[27]), |
147 | "m" (fctx->d[24]), "m" (fctx->d[25]), "m" (fctx->d[26]), "m" (fctx->d[27]), |
167 | "m" (fctx->d[28]), "m" (fctx->d[29]), "m" (fctx->d[30]), "m" (fctx->d[31]) |
148 | "m" (fctx->d[28]), "m" (fctx->d[29]), "m" (fctx->d[30]), "m" (fctx->d[31]) |
168 | ); |
149 | ); |
169 | 150 | ||
170 | fprs.dl = fprs.du = false; |
- | |
171 | fprs_write(fprs.value); |
- | |
172 | - | ||
173 | __asm__ volatile ("ldx %0, %%fsr\n" : : "m" (fctx->fsr)); |
151 | __asm__ volatile ("ldx %0, %%fsr\n" : : "m" (fctx->fsr)); |
174 | } |
152 | } |
175 | 153 | ||
176 | void fpu_enable(void) |
154 | void fpu_enable(void) |
177 | { |
155 | { |