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27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __mips_PAGE_H__ |
29 | #ifndef __mips_PAGE_H__ |
30 | #define __mips_PAGE_H__ |
30 | #define __mips_PAGE_H__ |
31 | 31 | ||
- | 32 | #include <arch/mm/tlb.h> |
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- | 33 | #include <mm/page.h> |
|
32 | #include <arch/mm/frame.h> |
34 | #include <arch/mm/frame.h> |
33 | #include <arch/types.h> |
35 | #include <arch/types.h> |
- | 36 | #include <arch.h> |
|
34 | 37 | ||
35 | #define PAGE_SIZE FRAME_SIZE |
38 | #define PAGE_SIZE FRAME_SIZE |
36 | 39 | ||
37 | #define KA2PA(x) ((x) - 0x80000000) |
40 | #define KA2PA(x) ((x) - 0x80000000) |
38 | #define PA2KA(x) ((x) + 0x80000000) |
41 | #define PA2KA(x) ((x) + 0x80000000) |
39 | 42 | ||
40 | #define page_arch_init() ; |
- | |
41 | - | ||
42 | /* |
43 | /* |
43 | * Implementation of generic 4-level page table interface. |
44 | * Implementation of generic 4-level page table interface. |
44 | * TODO: this is a fake implementation provided to satisfy the compiler |
45 | * NOTE: this implementation is under construction |
- | 46 | * |
|
- | 47 | * Page table layout: |
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- | 48 | * - 32-bit virtual addresses |
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- | 49 | * - Offset is 14 bits => pages are 16K long |
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- | 50 | * - PTE's use the same format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long |
|
- | 51 | * - PTL0 has 64 entries (6 bits) |
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- | 52 | * - PTL1 is not used |
|
- | 53 | * - PTL2 is not used |
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- | 54 | * - PTL3 has 4096 entries (12 bits) |
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45 | */ |
55 | */ |
- | 56 | ||
46 | #define PTL0_INDEX_ARCH(vaddr) 0 |
57 | #define PTL0_INDEX_ARCH(vaddr) ((vaddr)>>26) |
47 | #define PTL1_INDEX_ARCH(vaddr) 0 |
58 | #define PTL1_INDEX_ARCH(vaddr) 0 |
48 | #define PTL2_INDEX_ARCH(vaddr) 0 |
59 | #define PTL2_INDEX_ARCH(vaddr) 0 |
49 | #define PTL3_INDEX_ARCH(vaddr) 0 |
60 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>14)&0xfff) |
- | 61 | ||
- | 62 | #define GET_PTL0_ADDRESS_ARCH() (PTL0) |
|
- | 63 | #define SET_PTL0_ADDRESS_ARCH(ptl0) (PTL0 = (pte_t *)(ptl0)) |
|
50 | 64 | ||
51 | #define GET_PTL0_ADDRESS_ARCH() ((pte_t *) 0) |
- | |
52 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t *) 0) |
65 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].pfn<<14) |
53 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) ((pte_t *) 0) |
66 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1) |
54 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) ((pte_t *) 0) |
67 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2) |
55 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((pte_t *) 0) |
68 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].pfn<<14) |
56 | 69 | ||
57 | #define SET_PTL0_ADDRESS_ARCH(ptl0) |
- | |
58 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) |
70 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].pfn = (a)>>14) |
59 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
71 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
60 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
72 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
61 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) |
73 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].pfn = (a)>>14) |
62 | 74 | ||
63 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) 0 |
75 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i)) |
64 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) 0 |
76 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT |
65 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) 0 |
77 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT |
66 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) 0 |
78 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i)) |
67 | 79 | ||
68 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) |
80 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x)) |
69 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
81 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
70 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
82 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
71 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) |
83 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x)) |
- | 84 | ||
- | 85 | static inline int get_pt_flags(pte_t *pt, index_t i) |
|
- | 86 | { |
|
- | 87 | pte_t *p = &pt[i]; |
|
- | 88 | ||
- | 89 | return ( |
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- | 90 | ((p->c>PAGE_UNCACHED)<<PAGE_CACHEABLE_SHIFT) | |
|
- | 91 | ((!p->v)<<PAGE_PRESENT_SHIFT) | |
|
- | 92 | (1<<PAGE_USER_SHIFT) | |
|
- | 93 | (1<<PAGE_READ_SHIFT) | |
|
- | 94 | ((p->d)<<PAGE_WRITE_SHIFT) | |
|
- | 95 | (1<<PAGE_EXEC_SHIFT) |
|
- | 96 | ); |
|
- | 97 | ||
- | 98 | } |
|
- | 99 | ||
- | 100 | static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
|
- | 101 | { |
|
- | 102 | pte_t *p = &pt[i]; |
|
- | 103 | ||
- | 104 | p->c = (flags & PAGE_CACHEABLE) ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED; |
|
- | 105 | p->v = !(flags & PAGE_NOT_PRESENT); |
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- | 106 | p->d = flags & PAGE_WRITE; |
|
- | 107 | } |
|
- | 108 | ||
- | 109 | extern void page_arch_init(void); |
|
72 | 110 | ||
73 | typedef __u32 pte_t; |
111 | extern pte_t *PTL0; |
74 | 112 | ||
75 | #endif |
113 | #endif |