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35 | */ |
35 | */ |
36 | 36 | ||
37 | #ifndef KERN_arm32_REGUTILS_H_ |
37 | #ifndef KERN_arm32_REGUTILS_H_ |
38 | #define KERN_arm32_REGUTILS_H_ |
38 | #define KERN_arm32_REGUTILS_H_ |
39 | 39 | ||
40 | - | ||
41 | #define STATUS_REG_IRQ_DISABLED_BIT (1 << 7) |
40 | #define STATUS_REG_IRQ_DISABLED_BIT (1 << 7) |
42 | #define STATUS_REG_MODE_MASK 0x1f |
41 | #define STATUS_REG_MODE_MASK 0x1f |
43 | 42 | ||
44 | #define CP15_R1_HIGH_VECTORS_BIT (1 << 13) |
43 | #define CP15_R1_HIGH_VECTORS_BIT (1 << 13) |
45 | 44 | ||
Line 51... | Line 50... | ||
51 | #define SUPERVISOR_MODE 0x13 |
50 | #define SUPERVISOR_MODE 0x13 |
52 | #define ABORT_MODE 0x17 |
51 | #define ABORT_MODE 0x17 |
53 | #define UNDEFINED_MODE 0x1b |
52 | #define UNDEFINED_MODE 0x1b |
54 | #define SYSTEM_MODE 0x1f |
53 | #define SYSTEM_MODE 0x1f |
55 | 54 | ||
56 | - | ||
57 | /* [CS]PRS manipulation macros */ |
55 | /* [CS]PRS manipulation macros */ |
58 | #define GEN_STATUS_READ(nm,reg) \ |
56 | #define GEN_STATUS_READ(nm,reg) \ |
59 | static inline uint32_t nm## _status_reg_read(void) \ |
57 | static inline uint32_t nm## _status_reg_read(void) \ |
60 | { \ |
58 | { \ |
61 | uint32_t retval; \ |
59 | uint32_t retval; \ |