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58 | "Unknown Vendor", |
58 | "Unknown Vendor", |
59 | "AuthenticAMD", |
59 | "AuthenticAMD", |
60 | "GenuineIntel" |
60 | "GenuineIntel" |
61 | }; |
61 | }; |
62 | 62 | ||
- | 63 | ||
- | 64 | /** Setup flags on processor so that we can use the FPU |
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- | 65 | * |
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- | 66 | * cr0.osfxsr = 1 -> we do support fxstor/fxrestor |
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- | 67 | * cr0.em = 0 -> we do not emulate coprocessor |
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- | 68 | * cr0.mp = 1 -> we do want lazy context switch |
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- | 69 | */ |
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- | 70 | void cpu_setup_fpu(void) |
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- | 71 | { |
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- | 72 | __asm__ volatile ( |
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- | 73 | "movq %%cr0, %%rax;" |
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- | 74 | "btsq $1, %%rax;" /* cr0.mp */ |
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- | 75 | "btrq $2, %%rax;" /* cr0.em */ |
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- | 76 | "movq %%rax, %%cr0;" |
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- | 77 | ||
- | 78 | "movq %%cr4, %%rax;" |
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- | 79 | "bts $9, %%rax;" /* cr4.osfxsr */ |
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- | 80 | "movq %%rax, %%cr4;" |
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- | 81 | : |
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- | 82 | : |
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- | 83 | :"%rax" |
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- | 84 | ); |
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- | 85 | } |
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- | 86 | ||
- | 87 | /** Set the TS flag to 1. |
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- | 88 | * |
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- | 89 | * If a thread accesses coprocessor, exception is run, which |
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- | 90 | * does a lazy fpu context switch. |
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- | 91 | * |
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- | 92 | */ |
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63 | void set_TS_flag(void) |
93 | void set_TS_flag(void) |
64 | { |
94 | { |
65 | __asm__ volatile ( |
95 | __asm__ volatile ( |
66 | "mov %%cr0,%%rax;" |
96 | "mov %%cr0,%%rax;" |
67 | "or $8,%%rax;" |
97 | "bts $3,%%rax;" |
68 | "mov %%rax,%%cr0;" |
98 | "mov %%rax,%%cr0;" |
69 | : |
99 | : |
70 | : |
100 | : |
71 | :"%rax" |
101 | :"%rax" |
72 | ); |
102 | ); |
Line 74... | Line 104... | ||
74 | 104 | ||
75 | void reset_TS_flag(void) |
105 | void reset_TS_flag(void) |
76 | { |
106 | { |
77 | __asm__ volatile ( |
107 | __asm__ volatile ( |
78 | "mov %%cr0,%%rax;" |
108 | "mov %%cr0,%%rax;" |
79 | "btc $4,%%rax;" |
109 | "btr $3,%%rax;" |
80 | "mov %%rax,%%cr0;" |
110 | "mov %%rax,%%cr0;" |
81 | : |
111 | : |
82 | : |
112 | : |
83 | :"%rax" |
113 | :"%rax" |
84 | ); |
114 | ); |