Rev 2465 | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 2465 | Rev 2468 | ||
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44 | * Will belong to domain 0. No cache or buffering is enabled. |
44 | * Will belong to domain 0. No cache or buffering is enabled. |
45 | * |
45 | * |
46 | * @param pte Section entry to initialize. |
46 | * @param pte Section entry to initialize. |
47 | * @param frame First frame in the section (frame number). |
47 | * @param frame First frame in the section (frame number). |
48 | * |
48 | * |
49 | * @note If frame is not 1MB aligned, first lower 1MB aligned frame will be used. |
49 | * @note If frame is not 1MB aligned, first lower 1MB aligned frame will be |
- | 50 | * used. |
|
50 | */ |
51 | */ |
51 | static void init_pte_level0_section(pte_level0_section_t* pte, unsigned int frame) |
52 | static void init_pte_level0_section(pte_level0_section_t* pte, |
- | 53 | unsigned int frame) |
|
52 | { |
54 | { |
53 | pte->descriptor_type = PTE_DESCRIPTOR_SECTION; |
55 | pte->descriptor_type = PTE_DESCRIPTOR_SECTION; |
54 | pte->bufferable = 0; |
56 | pte->bufferable = 0; |
55 | pte->cacheable = 0; |
57 | pte->cacheable = 0; |
56 | pte->impl_specific = 0; |
58 | pte->impl_specific = 0; |
Line 59... | Line 61... | ||
59 | pte->access_permission = PTE_AP_USER_NO_KERNEL_RW; |
61 | pte->access_permission = PTE_AP_USER_NO_KERNEL_RW; |
60 | pte->should_be_zero_2 = 0; |
62 | pte->should_be_zero_2 = 0; |
61 | pte->section_base_addr = frame; |
63 | pte->section_base_addr = frame; |
62 | } |
64 | } |
63 | 65 | ||
64 | - | ||
65 | /** Initializes page table used while booting the kernel. */ |
66 | /** Initializes page table used while booting the kernel. */ |
66 | static void init_page_table(void) |
67 | static void init_page_table(void) |
67 | { |
68 | { |
68 | int i; |
69 | int i; |
69 | const unsigned int first_kernel_page = ADDR2PFN(PA2KA(0)); |
70 | const unsigned int first_kernel_page = ADDR2PFN(PA2KA(0)); |
70 | 71 | ||
71 | // create 1:1 virtual-physical mapping (in lower 2GB) |
72 | /* Create 1:1 virtual-physical mapping (in lower 2GB). */ |
72 | for (i = 0; i < first_kernel_page; i++) { |
73 | for (i = 0; i < first_kernel_page; i++) { |
73 | init_pte_level0_section(&page_table[i], i); |
74 | init_pte_level0_section(&page_table[i], i); |
74 | } |
75 | } |
75 | 76 | ||
- | 77 | /* |
|
76 | // create 1:1 virtual-physical mapping in kernel space (upper 2GB), |
78 | * Create 1:1 virtual-physical mapping in kernel space (upper 2GB), |
77 | // physical addresses start from 0 |
79 | * physical addresses start from 0. |
- | 80 | */ |
|
78 | for (i = first_kernel_page; i < PTL0_ENTRIES; i++) { |
81 | for (i = first_kernel_page; i < PTL0_ENTRIES; i++) { |
79 | init_pte_level0_section(&page_table[i], i - first_kernel_page); |
82 | init_pte_level0_section(&page_table[i], i - first_kernel_page); |
80 | } |
83 | } |
81 | } |
84 | } |
82 | 85 | ||
83 | - | ||
84 | /** Starts the MMU - initializes page table and enables paging. */ |
86 | /** Starts the MMU - initializes page table and enables paging. */ |
85 | void mmu_start() { |
87 | void mmu_start() { |
86 | init_page_table(); |
88 | init_page_table(); |
87 | set_ptl0_address(page_table); |
89 | set_ptl0_address(page_table); |
88 | enable_paging(); |
90 | enable_paging(); |
89 | } |
91 | } |
90 | 92 | ||
91 | - | ||
92 | /** @} |
93 | /** @} |
93 | */ |
94 | */ |
94 | 95 |