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205 | * |
205 | * |
206 | * @param gdtr_reg Address of memory from where to load GDTR. |
206 | * @param gdtr_reg Address of memory from where to load GDTR. |
207 | */ |
207 | */ |
208 | static inline void gdtr_load(struct ptr_16_64 *gdtr_reg) |
208 | static inline void gdtr_load(struct ptr_16_64 *gdtr_reg) |
209 | { |
209 | { |
210 | __asm__ volatile ("lgdt %0\n" : : "m" (*gdtr_reg)); |
210 | __asm__ volatile ("lgdtq %0\n" : : "m" (*gdtr_reg)); |
211 | } |
211 | } |
212 | 212 | ||
213 | /** Store GDTR register to memory. |
213 | /** Store GDTR register to memory. |
214 | * |
214 | * |
215 | * @param gdtr_reg Address of memory to where to load GDTR. |
215 | * @param gdtr_reg Address of memory to where to load GDTR. |
216 | */ |
216 | */ |
217 | static inline void gdtr_store(struct ptr_16_64 *gdtr_reg) |
217 | static inline void gdtr_store(struct ptr_16_64 *gdtr_reg) |
218 | { |
218 | { |
219 | __asm__ volatile ("sgdt %0\n" : : "m" (*gdtr_reg)); |
219 | __asm__ volatile ("sgdtq %0\n" : : "m" (*gdtr_reg)); |
220 | } |
220 | } |
221 | 221 | ||
222 | /** Load IDTR register from memory. |
222 | /** Load IDTR register from memory. |
223 | * |
223 | * |
224 | * @param idtr_reg Address of memory from where to load IDTR. |
224 | * @param idtr_reg Address of memory from where to load IDTR. |
225 | */ |
225 | */ |
226 | static inline void idtr_load(struct ptr_16_64 *idtr_reg) |
226 | static inline void idtr_load(struct ptr_16_64 *idtr_reg) |
227 | { |
227 | { |
228 | __asm__ volatile ("lidt %0\n" : : "m" (*idtr_reg)); |
228 | __asm__ volatile ("lidtq %0\n" : : "m" (*idtr_reg)); |
229 | } |
229 | } |
230 | 230 | ||
231 | /** Load TR from descriptor table. |
231 | /** Load TR from descriptor table. |
232 | * |
232 | * |
233 | * @param sel Selector specifying descriptor of TSS segment. |
233 | * @param sel Selector specifying descriptor of TSS segment. |