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27 | */ |
27 | */ |
28 | 28 | ||
29 | #include <arch/mm/tlb.h> |
29 | #include <arch/mm/tlb.h> |
30 | #include <arch/types.h> |
30 | #include <arch/types.h> |
31 | #include <mm/tlb.h> |
31 | #include <mm/tlb.h> |
- | 32 | #include <mm/frame.h> |
|
32 | #include <mm/page.h> |
33 | #include <mm/page.h> |
33 | #include <mm/as.h> |
34 | #include <mm/as.h> |
34 | #include <arch.h> |
35 | #include <arch.h> |
35 | #include <print.h> |
36 | #include <print.h> |
36 | #include <symtab.h> |
37 | #include <symtab.h> |
37 | 38 | ||
38 | 39 | ||
- | 40 | static phte_t *phte; |
|
- | 41 | ||
- | 42 | ||
39 | /** Initialize Page Hash Table. |
43 | /** Initialize Page Hash Table. |
40 | * |
44 | * |
41 | * Setup the Page Hash Table with no entries. |
45 | * Setup the Page Hash Table with no entries. |
42 | * |
46 | * |
43 | */ |
47 | */ |
44 | void tlb_arch_init(void) |
48 | void tlb_arch_init(void) |
45 | { |
49 | { |
- | 50 | phte_t *physical_phte = (phte_t *) PFN2ADDR(frame_alloc(PHT_ORDER, FRAME_KA | FRAME_PANIC)); |
|
- | 51 | phte =(phte_t *) PA2KA((__address) physical_phte); |
|
- | 52 | ||
- | 53 | ASSERT((__address) physical_phte % (1 << PHT_BITS) == 0); |
|
- | 54 | ||
- | 55 | memsetb((__address) phte, 1 << PHT_BITS, 0); |
|
- | 56 | ||
- | 57 | asm volatile ( |
|
- | 58 | "mtsdr1 %0\n" |
|
- | 59 | : |
|
- | 60 | : "r" ((__address) physical_phte) |
|
- | 61 | ); |
|
46 | } |
62 | } |
47 | 63 | ||
48 | 64 | ||
49 | /** Try to find PTE for faulting address |
65 | /** Try to find PTE for faulting address |
50 | * |
66 | * |
Line 101... | Line 117... | ||
101 | if (s) |
117 | if (s) |
102 | symbol = s; |
118 | symbol = s; |
103 | s = get_symtab_entry(istate->lr); |
119 | s = get_symtab_entry(istate->lr); |
104 | if (s) |
120 | if (s) |
105 | sym2 = s; |
121 | sym2 = s; |
106 | panic("%X: PHT Refill Exception at %X(%s<-%s)\n", badvaddr, istate->pc, symbol, sym2); |
122 | panic("%p: PHT Refill Exception at %p (%s<-%s)\n", badvaddr, istate->pc, symbol, sym2); |
107 | } |
123 | } |
108 | 124 | ||
109 | 125 | ||
110 | /** Process Data Storage Interrupt |
126 | /** Process Instruction/Data Storage Interrupt |
111 | * |
127 | * |
- | 128 | * @param data True if Data Storage Interrupt. |
|
112 | * @param istate Interrupted register context. |
129 | * @param istate Interrupted register context. |
113 | * |
130 | * |
114 | */ |
131 | */ |
115 | void pht_refill(istate_t *istate) |
132 | void pht_refill(bool data, istate_t *istate) |
116 | { |
133 | { |
117 | asid_t asid; |
134 | asid_t asid; |
118 | __address badvaddr; |
135 | __address badvaddr; |
119 | pte_t *pte; |
136 | pte_t *pte; |
- | 137 | __u32 page; |
|
- | 138 | __u32 api; |
|
- | 139 | __u32 vsid; |
|
- | 140 | __u32 hash; |
|
- | 141 | __u32 i; |
|
120 | 142 | ||
- | 143 | if (data) { |
|
121 | __asm__ volatile ( |
144 | asm volatile ( |
122 | "mfdar %0\n" |
145 | "mfdar %0\n" |
123 | : "=r" (badvaddr) |
146 | : "=r" (badvaddr) |
124 | ); |
147 | ); |
- | 148 | } else |
|
- | 149 | badvaddr = istate->pc; |
|
125 | 150 | ||
126 | spinlock_lock(&AS->lock); |
151 | spinlock_lock(&AS->lock); |
127 | asid = AS->asid; |
152 | asid = AS->asid; |
128 | spinlock_unlock(&AS->lock); |
153 | spinlock_unlock(&AS->lock); |
129 | 154 | ||
Line 131... | Line 156... | ||
131 | 156 | ||
132 | pte = find_mapping_and_check(badvaddr); |
157 | pte = find_mapping_and_check(badvaddr); |
133 | if (!pte) |
158 | if (!pte) |
134 | goto fail; |
159 | goto fail; |
135 | 160 | ||
136 | /* |
- | |
137 | * Record access to PTE. |
161 | /* Record access to PTE */ |
138 | */ |
- | |
139 | pte->a = 1; |
162 | pte->a = 1; |
140 | 163 | ||
- | 164 | page = ADDR2PFN(badvaddr); |
|
- | 165 | api = (badvaddr >> 22) & 0x3f; |
|
- | 166 | asm volatile ( |
|
- | 167 | "mfsrin %0, %1\n" |
|
- | 168 | : "=r" (vsid) |
|
- | 169 | : "r" (badvaddr >> 28) |
|
- | 170 | ); |
|
- | 171 | ||
- | 172 | /* Primary hash (xor) */ |
|
- | 173 | hash = ((vsid ^ page) & 0x3ff) << 3; |
|
- | 174 | ||
141 | // FIXME: Insert entry into PHT |
175 | /* Find invalid PTE in PTEG */ |
- | 176 | for (i = 0; i < 8; i++) { |
|
- | 177 | if (!phte[hash + i].v) |
|
- | 178 | break; |
|
- | 179 | } |
|
- | 180 | ||
- | 181 | // TODO: Check access/change bits, secondary hash |
|
- | 182 | ||
- | 183 | if (i == 8) |
|
- | 184 | i = page % 8; |
|
- | 185 | ||
- | 186 | phte[hash + i].v = 1; |
|
- | 187 | phte[hash + i].vsid = vsid; |
|
- | 188 | phte[hash + i].h = 0; |
|
- | 189 | phte[hash + i].api = api; |
|
- | 190 | phte[hash + i].rpn = pte->pfn; |
|
- | 191 | phte[hash + i].r = 0; |
|
- | 192 | phte[hash + i].c = 0; |
|
- | 193 | phte[hash + i].pp = 2; // FIXME |
|
142 | 194 | ||
143 | page_table_unlock(AS, true); |
195 | page_table_unlock(AS, true); |
144 | return; |
196 | return; |
145 | 197 | ||
146 | fail: |
198 | fail: |