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Rev 594 | Rev 598 | ||
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Line 53... | Line 53... | ||
53 | * Initialize TLB. |
53 | * Initialize TLB. |
54 | * Invalidate all entries and mark wired entries. |
54 | * Invalidate all entries and mark wired entries. |
55 | */ |
55 | */ |
56 | void tlb_arch_init(void) |
56 | void tlb_arch_init(void) |
57 | { |
57 | { |
58 | int i; |
- | |
59 | - | ||
60 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
58 | cp0_pagemask_write(TLB_PAGE_MASK_16K); |
61 | cp0_entry_hi_write(0); |
- | |
62 | cp0_entry_lo0_write(0); |
- | |
63 | cp0_entry_lo1_write(0); |
- | |
64 | 59 | ||
65 | /* |
- | |
66 | * Invalidate all entries. |
60 | tlb_invalidate_all(); |
67 | */ |
- | |
68 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
- | |
69 | cp0_index_write(i); |
- | |
70 | tlbwi(); |
- | |
71 | } |
- | |
72 | 61 | ||
73 | /* |
62 | /* |
74 | * The kernel is going to make use of some wired |
63 | * The kernel is going to make use of some wired |
75 | * entries (e.g. mapping kernel stacks in kseg3). |
64 | * entries (e.g. mapping kernel stacks in kseg3). |
76 | */ |
65 | */ |
Line 407... | Line 396... | ||
407 | int i; |
396 | int i; |
408 | 397 | ||
409 | printf("TLB:\n"); |
398 | printf("TLB:\n"); |
410 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
399 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
411 | cp0_index_write(i); |
400 | cp0_index_write(i); |
412 | - | ||
413 | tlbr(); |
401 | tlbr(); |
414 | 402 | ||
415 | hi.value = cp0_entry_hi_read(); |
403 | hi.value = cp0_entry_hi_read(); |
416 | lo0.value = cp0_entry_lo0_read(); |
404 | lo0.value = cp0_entry_lo0_read(); |
417 | lo1.value = cp0_entry_lo1_read(); |
405 | lo1.value = cp0_entry_lo1_read(); |
Line 420... | Line 408... | ||
420 | "\t\t\tg[1]=%d, v[1]=%d, d[1]=%d, c[1]=%B, pfn[1]=%d\n", |
408 | "\t\t\tg[1]=%d, v[1]=%d, d[1]=%d, c[1]=%B, pfn[1]=%d\n", |
421 | i, hi.asid, hi.vpn2, lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn, |
409 | i, hi.asid, hi.vpn2, lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn, |
422 | lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn); |
410 | lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn); |
423 | } |
411 | } |
424 | } |
412 | } |
- | 413 | ||
- | 414 | /** Invalidate all TLB entries. */ |
|
- | 415 | void tlb_invalidate_all(void) |
|
- | 416 | { |
|
- | 417 | int i; |
|
- | 418 | ||
- | 419 | cp0_entry_hi_write(0); |
|
- | 420 | cp0_entry_lo0_write(0); |
|
- | 421 | cp0_entry_lo1_write(0); |
|
- | 422 | ||
- | 423 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
|
- | 424 | cp0_index_write(i); |
|
- | 425 | tlbwi(); |
|
- | 426 | } |
|
- | 427 | } |
|
- | 428 | ||
- | 429 | /** Invalidate all TLB entries belonging to specified address space. |
|
- | 430 | * |
|
- | 431 | * @param asid Address space identifier. |
|
- | 432 | */ |
|
- | 433 | void tlb_invalidate_asid(asid_t asid) |
|
- | 434 | { |
|
- | 435 | entry_hi_t hi; |
|
- | 436 | int i; |
|
- | 437 | ||
- | 438 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
|
- | 439 | cp0_index_write(i); |
|
- | 440 | tlbr(); |
|
- | 441 | ||
- | 442 | if (hi.asid == asid) { |
|
- | 443 | cp0_entry_lo0_write(0); |
|
- | 444 | cp0_entry_lo1_write(0); |
|
- | 445 | tlbwi(); |
|
- | 446 | } |
|
- | 447 | } |
|
- | 448 | ||
- | 449 | } |
|
- | 450 | ||
- | 451 | /** Invalidate TLB entry for specified page belonging to specified address space. |
|
- | 452 | * |
|
- | 453 | * @param asid Address space identifier. |
|
- | 454 | * @param page Page whose TLB entry is to be invalidated. |
|
- | 455 | */ |
|
- | 456 | void tlb_invalidate_page(asid_t asid, __address page) |
|
- | 457 | { |
|
- | 458 | entry_hi_t hi; |
|
- | 459 | tlb_index_t index; |
|
- | 460 | int i; |
|
- | 461 | ||
- | 462 | hi.value = 0; |
|
- | 463 | prepare_entry_hi(&hi, asid, page); |
|
- | 464 | ||
- | 465 | tlbp(); |
|
- | 466 | index.value = cp0_index_read(); |
|
- | 467 | ||
- | 468 | if (!index.p) { |
|
- | 469 | /* Entry was found, index register contains valid index. */ |
|
- | 470 | cp0_entry_lo0_write(0); |
|
- | 471 | cp0_entry_lo1_write(0); |
|
- | 472 | tlbwi(); |
|
- | 473 | } |
|
- | 474 | } |