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Line 60... Line 60...
60 
 *
 60 
 *
61 
 * HEAVYWEIGHT_HANDLER macro must cram into 16 bundles (48 instructions).
 61 
 * HEAVYWEIGHT_HANDLER macro must cram into 16 bundles (48 instructions).
62 
 * This goal is achieved by using procedure calls after RSE becomes operational.
 62 
 * This goal is achieved by using procedure calls after RSE becomes operational.
63 
 *
 63 
 *
64 
 * Some steps are skipped (enabling and disabling interrupts).
 64 
 * Some steps are skipped (enabling and disabling interrupts).
65 
 * Some steps are not fully supported yet (e.g. dealing with floating-point
 - 
 
66 
 * context).
 - 
 
67 
 *
 65 
 *
68 
 * @param offs Offset from the beginning of IVT.
 66 
 * @param offs Offset from the beginning of IVT.
69 
 * @param handler Interrupt handler address.
 67 
 * @param handler Interrupt handler address.
70 
 */
 68 
 */
71 
.macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler
 69 
.macro HEAVYWEIGHT_HANDLER offs, handler=universal_handler
Line 81... Line 79...
81
79
82 
	/*
 80 
	/*
83 
	 * Note that r24-r31 from bank 0 can be used only as long as PSR.ic = 0.
 81 
	 * Note that r24-r31 from bank 0 can be used only as long as PSR.ic = 0.
84 
	 */
 82 
	 */
85
83
86 
			/*Set up FPU as in interrupred*/
 84 
	/* Set up FPU as in interrupted context. */
87 
	mov r24=psr
 85 
	mov r24 = psr
88 
	mov r25=cr.ipsr
86 
	mov r25 = cr.ipsr
89 
	mov r26=(PSR_DFH_MASK)
 87 
	mov r26 = PSR_DFH_MASK
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	mov r27=(~(PSR_DFH_MASK));;
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	mov r27 = ~PSR_DFH_MASK ;;
91 
	and r26=r25,r26
 89 
	and r26 = r25, r26
92 
	and r24=r24,r27;;
 90 
	and r24 = r24, r27;;
93 
	or r24=r24,r26;;
 91 
	or r24 = r24, r26;;
94 
	mov psr.l=r24;;
 92 
	mov psr.l = r24;;
95 
	srlz.i
 93 
	srlz.i
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249 
 
 247 
 
250 
	mov cr.iip = r24;;
 248 
	mov cr.iip = r24;;
251 
	mov cr.iipa = r26
 249 
	mov cr.iipa = r26
252 
	mov cr.isr = r27
 250 
	mov cr.isr = r27
253 
	mov cr.ifa = r28
 251 
	mov cr.ifa = r28
- 
 
 252 
 
254 
			/*Set up FPU as in exception*/
 253 
	/* Set up FPU as in exception. */
255 
	mov r24=psr
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	mov r24 = psr
256 
	mov r26=(PSR_DFH_MASK)
 255 
	mov r26 = PSR_DFH_MASK
257 
	mov r27=(~(PSR_DFH_MASK));;
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	mov r27 = ~PSR_DFH_MASK ;;
258 
	and r25=r25,r27
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	and r25 = r25, r27
259 
	and r24=r24,r26;;
 258 
	and r24 = r24, r26 ;;
260 
	or r25=r25,r24;;
 259 
	or r25 = r25, r24;;
261 
	mov cr.ipsr = r25
 260 
	mov cr.ipsr = r25
262
261 
 
263 
 
 - 
 
264 
    /* 18. restore predicate registers from memory stack */
 262 
    /* 18. restore predicate registers from memory stack */
265 
	ld8 r29 = [r31], +8 ;;		/* load predicate registers */
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	ld8 r29 = [r31], +8 ;;		/* load predicate registers */
266 
	mov pr = r29
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	mov pr = r29
267
265
268 
    /* 19. return from interruption */
 266 
    /* 19. return from interruption */
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305 
	mov loc14 = b5
 303 
	mov loc14 = b5
306 
	mov loc15 = b6
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	mov loc15 = b6
307 
	mov loc16 = b7
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	mov loc16 = b7
308
306
309 
    /* 8. preserve general and floating-point registers */
 307 
    /* 8. preserve general and floating-point registers */
310 
	/* TODO: save floating-point context */
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311 
	mov loc17 = r1
 308 
	mov loc17 = r1
312 
	mov loc18 = r2
 309 
	mov loc18 = r2
313 
	mov loc19 = r3
 310 
	mov loc19 = r3
314 
	mov loc20 = r4
 311 
	mov loc20 = r4
315 
	mov loc21 = r5
 312 
	mov loc21 = r5
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338 
	mov loc43 = r28
 335 
	mov loc43 = r28
339 
	mov loc44 = r29
 336 
	mov loc44 = r29
340 
	mov loc45 = r30
 337 
	mov loc45 = r30
341 
	mov loc46 = r31
 338 
	mov loc46 = r31
342 
 
 339 
 
343 
	mov r24=96 + STACK_SCRATCH_AREA_SIZE
 340 
	add r24 = 96 + STACK_SCRATCH_AREA_SIZE, r12
344 
	mov r25=112 + STACK_SCRATCH_AREA_SIZE
341 
	add r25 = 112 + STACK_SCRATCH_AREA_SIZE, r12
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	mov r26=0 + STACK_SCRATCH_AREA_SIZE
 342 
	add r26 = 0 + STACK_SCRATCH_AREA_SIZE, r12
346 
	mov r27=16 + STACK_SCRATCH_AREA_SIZE
 343 
	add r27 = 16 + STACK_SCRATCH_AREA_SIZE, r12
347 
	mov r28=32 + STACK_SCRATCH_AREA_SIZE
 344 
	add r28 = 32 + STACK_SCRATCH_AREA_SIZE, r12
348 
	mov r29=48 + STACK_SCRATCH_AREA_SIZE
 345 
	add r29 = 48 + STACK_SCRATCH_AREA_SIZE, r12
349 
	mov r30=64 + STACK_SCRATCH_AREA_SIZE
 346 
	add r30 = 64 + STACK_SCRATCH_AREA_SIZE, r12
350 
	mov r31=80 + STACK_SCRATCH_AREA_SIZE;;
 347 
	add r31 = 80 + STACK_SCRATCH_AREA_SIZE, r12 ;;
351 
	add r24=r12,r24
 - 
 
352 
	add r25=r12,r25
 - 
 
353 
	add r26=r12,r26
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354 
	add r27=r12,r27
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355 
	add r28=r12,r28
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356 
	add r29=r12,r29
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357 
	add r30=r12,r30
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358 
	add r31=r12,r31;;
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359
348
360 
	stf.spill [r26]=f2,0x80
 349 
	stf.spill [r26] = f2, 0x80
361 
	stf.spill [r27]=f3,0x80
 350 
	stf.spill [r27] = f3, 0x80
362 
	stf.spill [r28]=f4,0x80
 351 
	stf.spill [r28] = f4, 0x80
363 
	stf.spill [r29]=f5,0x80
 352 
	stf.spill [r29] = f5, 0x80
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389 
	stf.spill [r28]=f28,0x80
 378 
	stf.spill [r28] = f28, 0x80
390 
	stf.spill [r29]=f29,0x80
 379 
	stf.spill [r29] = f29, 0x80
391 
	stf.spill [r30]=f30,0x80
 380 
	stf.spill [r30] = f30, 0x80
392 
	stf.spill [r31]=f31,0x80;;
 381 
	stf.spill [r31] = f31, 0x80 ;;
393 
 
 382 
 
394 
	/* preserve Floating point status register */
 383 
	mov loc47 = ar.fpsr	/* preserve floating point status register */
395 
	mov loc47 = ar.fpsr
 - 
 
396
384
397 
    /* 9. skipped (will not enable interrupts) */
 385 
    /* 9. skipped (will not enable interrupts) */
398 
	/*
 386 
	/*
399 
    	 * ssm PSR_I_MASK
 387 
    	 * ssm PSR_I_MASK
400 
	 * ;;
 388 
	 * ;;
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416 
	 * ;;
 404 
	 * ;;
417 
	 * srlz.d
 405 
	 * srlz.d
418 
	 */
 406 
	 */
419 
 
 407 
 
420 
    /* 13. restore general and floating-point registers */
 408 
    /* 13. restore general and floating-point registers */
421 
	/* TODO: restore floating-point context */
 - 
 
422 
	mov r24=96 + STACK_SCRATCH_AREA_SIZE
 409 
	add r24 = 96 + STACK_SCRATCH_AREA_SIZE, r12
423 
	mov r25=112 + STACK_SCRATCH_AREA_SIZE
410 
	add r25 = 112 + STACK_SCRATCH_AREA_SIZE, r12
424 
	mov r26=0 + STACK_SCRATCH_AREA_SIZE
 411 
	add r26 = 0 + STACK_SCRATCH_AREA_SIZE, r12
425 
	mov r27=16 + STACK_SCRATCH_AREA_SIZE
 412 
	add r27 = 16 + STACK_SCRATCH_AREA_SIZE, r12
426 
	mov r28=32 + STACK_SCRATCH_AREA_SIZE
 413 
	add r28 = 32 + STACK_SCRATCH_AREA_SIZE, r12
427 
	mov r29=48 + STACK_SCRATCH_AREA_SIZE
 414 
	add r29 = 48 + STACK_SCRATCH_AREA_SIZE, r12
428 
	mov r30=64 + STACK_SCRATCH_AREA_SIZE
 415 
	add r30 = 64 + STACK_SCRATCH_AREA_SIZE, r12
429 
	mov r31=80 + STACK_SCRATCH_AREA_SIZE;;
 416 
	add r31 = 80 + STACK_SCRATCH_AREA_SIZE, r12 ;;
430 
	add r24=r12,r24
 - 
 
431 
	add r25=r12,r25
 - 
 
432 
	add r26=r12,r26
 - 
 
433 
	add r27=r12,r27
 - 
 
434 
	add r28=r12,r28
 - 
 
435 
	add r29=r12,r29
 - 
 
436 
	add r30=r12,r30
 - 
 
437 
	add r31=r12,r31;;
 - 
 
438 
 
 - 
 
439
417 
 
440 
	ldf.fill f2=[r26],0x80
 418 
	ldf.fill f2 = [r26], 0x80
441 
	ldf.fill f3=[r27],0x80
 419 
	ldf.fill f3 = [r27], 0x80
442 
	ldf.fill f4=[r28],0x80
 420 
	ldf.fill f4 = [r28], 0x80
443 
	ldf.fill f5=[r29],0x80
 421 
	ldf.fill f5 = [r29], 0x80
Line 469... Line 447...
469 
	ldf.fill f28=[r28],0x80
 447 
	ldf.fill f28 = [r28], 0x80
470 
	ldf.fill f29=[r29],0x80
 448 
	ldf.fill f29 = [r29], 0x80
471 
	ldf.fill f30=[r30],0x80
 449 
	ldf.fill f30 = [r30], 0x80
472 
	ldf.fill f31=[r31],0x80;;
 450 
	ldf.fill f31 = [r31], 0x80 ;;
473
451
474
- 
 
475 
	mov r1 = loc17
 452 
	mov r1 = loc17
476 
	mov r2 = loc18
 453 
	mov r2 = loc18
477 
	mov r3 = loc19
 454 
	mov r3 = loc19
478 
	mov r4 = loc20
 455 
	mov r4 = loc20
479 
	mov r5 = loc21
 456 
	mov r5 = loc21
Line 502... Line 479...
502 
	mov r28 = loc43
 479 
	mov r28 = loc43
503 
	mov r29 = loc44
 480 
	mov r29 = loc44
504 
	mov r30 = loc45
 481 
	mov r30 = loc45
505 
	mov r31 = loc46
 482 
	mov r31 = loc46
506
483 
 
507 
	/* restore Floating point status register */
 484 
	mov ar.fpsr = loc47	/* restore floating point status register */
508 
	mov ar.fpsr = loc47
 - 
 
509
485
510 
    /* 14. restore branch and application registers */
 486 
    /* 14. restore branch and application registers */
511 
    	mov ar.unat = loc3
 487 
    	mov ar.unat = loc3
512 
	mov ar.lc = loc4
 488 
	mov ar.lc = loc4
513 
	mov ar.ec = loc5
 489 
	mov ar.ec = loc5
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	HEAVYWEIGHT_HANDLER 0x7b00
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	HEAVYWEIGHT_HANDLER 0x7b00
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	HEAVYWEIGHT_HANDLER 0x7c00
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	HEAVYWEIGHT_HANDLER 0x7c00
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	HEAVYWEIGHT_HANDLER 0x7d00
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	HEAVYWEIGHT_HANDLER 0x7d00
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	HEAVYWEIGHT_HANDLER 0x7e00
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	HEAVYWEIGHT_HANDLER 0x7e00
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	HEAVYWEIGHT_HANDLER 0x7f00
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	HEAVYWEIGHT_HANDLER 0x7f00
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611 
 
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612 
 
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613 
 
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