Rev 11 | Rev 16 | Go to most recent revision | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 11 | Rev 15 | ||
---|---|---|---|
Line 112... | Line 112... | ||
112 | l_apic_debug(); |
112 | l_apic_debug(); |
113 | } |
113 | } |
114 | 114 | ||
115 | void apic_spurious(__u8 n, __u32 stack[]) |
115 | void apic_spurious(__u8 n, __u32 stack[]) |
116 | { |
116 | { |
117 | printf("cpu%d: APIC spurious interrupt\n", the->cpu->id); |
117 | printf("cpu%d: APIC spurious interrupt\n", CPU->id); |
118 | } |
118 | } |
119 | 119 | ||
120 | int apic_poll_errors(void) |
120 | int apic_poll_errors(void) |
121 | { |
121 | { |
122 | __u32 esr; |
122 | __u32 esr; |
Line 140... | Line 140... | ||
140 | 140 | ||
141 | return !esr; |
141 | return !esr; |
142 | } |
142 | } |
143 | 143 | ||
144 | /* |
144 | /* |
145 | * Send all CPUs excluding the->cpu IPI vector. |
145 | * Send all CPUs excluding CPU IPI vector. |
146 | */ |
146 | */ |
147 | int l_apic_broadcast_custom_ipi(__u8 vector) |
147 | int l_apic_broadcast_custom_ipi(__u8 vector) |
148 | { |
148 | { |
149 | __u32 lo; |
149 | __u32 lo; |
150 | 150 | ||
Line 230... | Line 230... | ||
230 | tmp = l_apic[SVR] & SVRClear; |
230 | tmp = l_apic[SVR] & SVRClear; |
231 | l_apic[SVR] = tmp | (1<<8) | (VECTOR_APIC_SPUR); |
231 | l_apic[SVR] = tmp | (1<<8) | (VECTOR_APIC_SPUR); |
232 | 232 | ||
233 | l_apic[TPR] &= TPRClear; |
233 | l_apic[TPR] &= TPRClear; |
234 | 234 | ||
235 | if (the->cpu->arch.family >= 6) |
235 | if (CPU->arch.family >= 6) |
236 | enable_l_apic_in_msr(); |
236 | enable_l_apic_in_msr(); |
237 | 237 | ||
238 | tmp = l_apic[ICRlo] & ICRloClear; |
238 | tmp = l_apic[ICRlo] & ICRloClear; |
239 | l_apic[ICRlo] = tmp | DLVRMODE_INIT | DESTMODE_PHYS | LEVEL_DEASSERT | SHORTHAND_INCL | TRGRMODE_LEVEL; |
239 | l_apic[ICRlo] = tmp | DLVRMODE_INIT | DESTMODE_PHYS | LEVEL_DEASSERT | SHORTHAND_INCL | TRGRMODE_LEVEL; |
240 | 240 | ||
Line 268... | Line 268... | ||
268 | void l_apic_debug(void) |
268 | void l_apic_debug(void) |
269 | { |
269 | { |
270 | #ifdef LAPIC_VERBOSE |
270 | #ifdef LAPIC_VERBOSE |
271 | int i, lint; |
271 | int i, lint; |
272 | 272 | ||
273 | printf("LVT on cpu%d, LAPIC ID: %d\n", the->cpu->id, (l_apic[L_APIC_ID] >> 24)&0xf); |
273 | printf("LVT on cpu%d, LAPIC ID: %d\n", CPU->id, (l_apic[L_APIC_ID] >> 24)&0xf); |
274 | 274 | ||
275 | printf("LVT_Tm: "); |
275 | printf("LVT_Tm: "); |
276 | if (l_apic[LVT_Tm] & (1<<17)) printf("periodic"); else printf("one-shot"); putchar(','); |
276 | if (l_apic[LVT_Tm] & (1<<17)) printf("periodic"); else printf("one-shot"); putchar(','); |
277 | if (l_apic[LVT_Tm] & (1<<16)) printf("masked"); else printf("not masked"); putchar(','); |
277 | if (l_apic[LVT_Tm] & (1<<16)) printf("masked"); else printf("not masked"); putchar(','); |
278 | if (l_apic[LVT_Tm] & (1<<12)) printf("send pending"); else printf("idle"); putchar(','); |
278 | if (l_apic[LVT_Tm] & (1<<12)) printf("send pending"); else printf("idle"); putchar(','); |
Line 302... | Line 302... | ||
302 | printf("%B\n", l_apic[LVT_Err] & 0xff); |
302 | printf("%B\n", l_apic[LVT_Err] & 0xff); |
303 | 303 | ||
304 | /* |
304 | /* |
305 | * This register is supported only on P6 and higher. |
305 | * This register is supported only on P6 and higher. |
306 | */ |
306 | */ |
307 | if (the->cpu->family > 5) { |
307 | if (CPU->family > 5) { |
308 | printf("LVT_PCINT: "); |
308 | printf("LVT_PCINT: "); |
309 | if (l_apic[LVT_PCINT] & (1<<16)) printf("masked"); else printf("not masked"); putchar(','); |
309 | if (l_apic[LVT_PCINT] & (1<<16)) printf("masked"); else printf("not masked"); putchar(','); |
310 | if (l_apic[LVT_PCINT] & (1<<12)) printf("send pending"); else printf("idle"); putchar(','); |
310 | if (l_apic[LVT_PCINT] & (1<<12)) printf("send pending"); else printf("idle"); putchar(','); |
311 | switch ((l_apic[LVT_PCINT] >> 8)&7) { |
311 | switch ((l_apic[LVT_PCINT] >> 8)&7) { |
312 | case 0: printf("fixed"); break; |
312 | case 0: printf("fixed"); break; |