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Rev 143 | Rev 144 | ||
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Line 126... | Line 126... | ||
126 | trap_register( 7, nm_fault); |
126 | trap_register( 7, nm_fault); |
127 | trap_register(12, ss_fault); |
127 | trap_register(12, ss_fault); |
128 | } |
128 | } |
129 | 129 | ||
130 | 130 | ||
131 | // Clean IOPL(12,13) and NT(14) flags in EFLAGS register |
131 | /* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */ |
132 | static void clean_IOPL_NT_flags(void) |
132 | static void clean_IOPL_NT_flags(void) |
133 | { |
133 | { |
134 | asm |
134 | asm |
135 | ( |
135 | ( |
136 | "pushfl;" |
136 | "pushfl;" |
Line 142... | Line 142... | ||
142 | : |
142 | : |
143 | :"%eax" |
143 | :"%eax" |
144 | ); |
144 | ); |
145 | } |
145 | } |
146 | 146 | ||
147 | // Clean AM(18) flag in CR0 register |
147 | /* Clean AM(18) flag in CR0 register */ |
148 | static void clean_AM_flag(void) |
148 | static void clean_AM_flag(void) |
149 | { |
149 | { |
150 | asm |
150 | asm |
151 | ( |
151 | ( |
152 | "mov %%cr0,%%eax;" |
152 | "mov %%cr0,%%eax;" |
Line 198... | Line 198... | ||
198 | * As of this moment, the current CPU has its own GDT pointing |
198 | * As of this moment, the current CPU has its own GDT pointing |
199 | * to its own TSS. We just need to load the TR register. |
199 | * to its own TSS. We just need to load the TR register. |
200 | */ |
200 | */ |
201 | __asm__("ltr %0" : : "r" ((__u16) selector(TSS_DES))); |
201 | __asm__("ltr %0" : : "r" ((__u16) selector(TSS_DES))); |
202 | 202 | ||
203 | clean_IOPL_NT_flags(); //Disable I/O on nonprivileged levels |
203 | clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */ |
204 | clean_AM_flag(); //Disable alignment check |
204 | clean_AM_flag(); /* Disable alignment check */ |
205 | } |
205 | } |