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Line 54... | Line 54... | ||
54 | { |
54 | { |
55 | long r = 1; |
55 | long r = 1; |
56 | 56 | ||
57 | __asm__ volatile ( |
57 | __asm__ volatile ( |
58 | "lock xaddq %1, %0\n" |
58 | "lock xaddq %1, %0\n" |
59 | : "=m" (val->count) : "r" (r) |
59 | : "=m" (val->count), "+r" (r) |
60 | ); |
60 | ); |
61 | 61 | ||
62 | return r; |
62 | return r; |
63 | } |
63 | } |
64 | 64 | ||
Line 66... | Line 66... | ||
66 | { |
66 | { |
67 | long r = -1; |
67 | long r = -1; |
68 | 68 | ||
69 | __asm__ volatile ( |
69 | __asm__ volatile ( |
70 | "lock xaddq %1, %0\n" |
70 | "lock xaddq %1, %0\n" |
71 | : "=m" (val->count) : "r" (r) |
71 | : "=m" (val->count), "+r" (r) |
72 | ); |
72 | ); |
73 | 73 | ||
74 | return r; |
74 | return r; |
75 | } |
75 | } |
76 | 76 |