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Rev 984 | Rev 1072 | ||
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Line 139... | Line 139... | ||
139 | : "=r" (v) |
139 | : "=r" (v) |
140 | ); |
140 | ); |
141 | return v; |
141 | return v; |
142 | } |
142 | } |
143 | 143 | ||
144 | /** Read CR0 |
- | |
145 | * |
- | |
146 | * Return value in CR0 |
- | |
147 | * |
- | |
148 | * @return Value read. |
- | |
149 | */ |
- | |
150 | static inline __u64 read_cr0(void) |
- | |
151 | { |
- | |
152 | __u64 v; |
- | |
153 | __asm__ volatile ("movq %%cr0,%0\n" : "=r" (v)); |
- | |
154 | return v; |
- | |
155 | } |
- | |
156 | - | ||
157 | /** Read CR2 |
- | |
158 | * |
- | |
159 | * Return value in CR2 |
- | |
160 | * |
- | |
161 | * @return Value read. |
- | |
162 | */ |
- | |
163 | static inline __u64 read_cr2(void) |
- | |
164 | { |
- | |
165 | __u64 v; |
- | |
166 | __asm__ volatile ("movq %%cr2,%0\n" : "=r" (v)); |
- | |
167 | return v; |
- | |
168 | } |
- | |
169 | - | ||
170 | /** Write CR3 |
- | |
171 | * |
- | |
172 | * Write value to CR3. |
- | |
173 | * |
- | |
174 | * @param v Value to be written. |
- | |
175 | */ |
- | |
176 | static inline void write_cr3(__u64 v) |
- | |
177 | { |
- | |
178 | __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); |
- | |
179 | } |
- | |
180 | - | ||
181 | /** Read CR3 |
- | |
182 | * |
- | |
183 | * Return value in CR3 |
- | |
184 | * |
- | |
185 | * @return Value read. |
- | |
186 | */ |
- | |
187 | static inline __u64 read_cr3(void) |
- | |
188 | { |
- | |
189 | __u64 v; |
- | |
190 | __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); |
- | |
191 | return v; |
- | |
192 | } |
- | |
193 | - | ||
194 | /** Write to MSR */ |
144 | /** Write to MSR */ |
195 | static inline void write_msr(__u32 msr, __u64 value) |
145 | static inline void write_msr(__u32 msr, __u64 value) |
196 | { |
146 | { |
197 | __asm__ volatile ( |
147 | __asm__ volatile ( |
198 | "wrmsr;" : : "c" (msr), |
148 | "wrmsr;" : : "c" (msr), |
Line 248... | Line 198... | ||
248 | static inline void invlpg(__address addr) |
198 | static inline void invlpg(__address addr) |
249 | { |
199 | { |
250 | __asm__ volatile ("invlpg %0\n" :: "m" (*((__native *)addr))); |
200 | __asm__ volatile ("invlpg %0\n" :: "m" (*((__native *)addr))); |
251 | } |
201 | } |
252 | 202 | ||
- | 203 | #define GEN_READ_REG(reg) static inline __native read_ ##reg (void) \ |
|
- | 204 | { \ |
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- | 205 | __native res; \ |
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- | 206 | __asm__ volatile ("movq %%" #reg ", %0" : "=r" (res) ); \ |
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- | 207 | return res; \ |
|
- | 208 | } |
|
- | 209 | ||
- | 210 | #define GEN_WRITE_REG(reg) static inline void write_ ##reg (__native regn) \ |
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- | 211 | { \ |
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- | 212 | __asm__ volatile ("movq %0, %%" #reg : : "r" (regn)); \ |
|
- | 213 | } |
|
- | 214 | ||
- | 215 | GEN_READ_REG(cr0); |
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- | 216 | GEN_READ_REG(cr2); |
|
- | 217 | GEN_READ_REG(cr3); |
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- | 218 | GEN_WRITE_REG(cr3); |
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- | 219 | ||
- | 220 | GEN_READ_REG(dr0); |
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- | 221 | GEN_READ_REG(dr1); |
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- | 222 | GEN_READ_REG(dr2); |
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- | 223 | GEN_READ_REG(dr3); |
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- | 224 | GEN_READ_REG(dr6); |
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- | 225 | GEN_READ_REG(dr7); |
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- | 226 | ||
- | 227 | GEN_WRITE_REG(dr0); |
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- | 228 | GEN_WRITE_REG(dr1); |
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- | 229 | GEN_WRITE_REG(dr2); |
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- | 230 | GEN_WRITE_REG(dr3); |
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- | 231 | GEN_WRITE_REG(dr6); |
|
- | 232 | GEN_WRITE_REG(dr7); |
|
- | 233 | ||
- | 234 | ||
253 | extern size_t interrupt_handler_size; |
235 | extern size_t interrupt_handler_size; |
254 | extern void interrupt_handlers(void); |
236 | extern void interrupt_handlers(void); |
255 | 237 | ||
256 | #endif |
238 | #endif |