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1 | # |
1 | # |
2 | # Copyright (C) 2005 Jakub Vana |
2 | # Copyright (C) 2005 Jakub Vana |
3 | # Copyright (C) 2005 Jakub Jermar |
- | |
4 | # All rights reserved. |
3 | # All rights reserved. |
5 | # |
4 | # |
6 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
7 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
8 | # are met: |
7 | # are met: |
Line 26... | Line 25... | ||
26 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | # |
27 | # |
29 | 28 | ||
30 | #include <arch/stack.h> |
29 | #include <arch/stack.h> |
31 | #include <arch/register.h> |
- | |
32 | 30 | ||
33 | #define STACK_ITEMS 12 |
31 | #define STACK_ITEMS 12 |
34 | #define STACK_FRAME_SIZE ((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE) |
32 | #define STACK_FRAME_SIZE ((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE) |
35 | 33 | ||
36 | #if (STACK_FRAME_SIZE % STACK_ALIGNMENT != 0) |
34 | #if (STACK_FRAME_SIZE % STACK_ALIGNMENT != 0) |
Line 104... | Line 102... | ||
104 | 102 | ||
105 | mov r27 = ar.rnat |
103 | mov r27 = ar.rnat |
106 | mov r28 = ar.bspstore ;; |
104 | mov r28 = ar.bspstore ;; |
107 | 105 | ||
108 | /* assume kernel backing store */ |
106 | /* assume kernel backing store */ |
109 | /* mov ar.bspstore = r28 ;; */ |
107 | mov ar.bspstore = r28 ;; |
110 | 108 | ||
111 | mov r29 = ar.bsp |
109 | mov r29 = ar.bsp |
112 | 110 | ||
113 | st8 [r31] = r27, -8 ;; /* save ar.rnat */ |
111 | st8 [r31] = r27, -8 ;; /* save ar.rnat */ |
114 | st8 [r31] = r28, -8 ;; /* save ar.bspstore */ |
112 | st8 [r31] = r28, -8 ;; /* save ar.bspstore */ |
Line 144... | Line 142... | ||
144 | ld8 r27 = [r31], +8 ;; /* load ar.rnat */ |
142 | ld8 r27 = [r31], +8 ;; /* load ar.rnat */ |
145 | ld8 r26 = [r31], +8 ;; /* load cr.ifs */ |
143 | ld8 r26 = [r31], +8 ;; /* load cr.ifs */ |
146 | ld8 r25 = [r31], +8 ;; /* load ar.pfs */ |
144 | ld8 r25 = [r31], +8 ;; /* load ar.pfs */ |
147 | ld8 r24 = [r31], +8 ;; /* load ar.rsc */ |
145 | ld8 r24 = [r31], +8 ;; /* load ar.rsc */ |
148 | 146 | ||
149 | /* mov ar.bspstore = r28 ;; */ /* (step 4) */ |
147 | mov ar.bspstore = r28 ;; /* (step 4) */ |
150 | /* mov ar.rnat = r27 */ /* (step 5) */ |
148 | mov ar.rnat = r27 /* (step 5) */ |
151 | 149 | ||
152 | mov ar.pfs = r25 /* (step 6) */ |
150 | mov ar.pfs = r25 /* (step 6) */ |
153 | mov cr.ifs = r26 |
151 | mov cr.ifs = r26 |
154 | 152 | ||
155 | mov ar.rsc = r24 /* (step 7) */ |
153 | mov ar.rsc = r24 /* (step 7) */ |
Line 189... | Line 187... | ||
189 | mov out0 = r26 |
187 | mov out0 = r26 |
190 | 188 | ||
191 | add out1 = STACK_SCRATCH_AREA_SIZE, r12 |
189 | add out1 = STACK_SCRATCH_AREA_SIZE, r12 |
192 | 190 | ||
193 | /* 6. switch to bank 1 and reenable PSR.ic */ |
191 | /* 6. switch to bank 1 and reenable PSR.ic */ |
194 | ssm PSR_IC_MASK |
192 | ssm 0x2000 |
195 | bsw.1 ;; |
193 | bsw.1 ;; |
196 | srlz.d |
194 | srlz.d |
197 | 195 | ||
198 | /* 7. preserve branch and application registers */ |
196 | /* 7. preserve branch and application registers */ |
199 | mov loc3 = ar.unat |
197 | mov loc3 = ar.unat |
Line 245... | Line 243... | ||
245 | mov loc44 = r29 |
243 | mov loc44 = r29 |
246 | mov loc45 = r30 |
244 | mov loc45 = r30 |
247 | mov loc46 = r31 |
245 | mov loc46 = r31 |
248 | 246 | ||
249 | /* 9. skipped (will not enable interrupts) */ |
247 | /* 9. skipped (will not enable interrupts) */ |
250 | /* |
- | |
251 | * ssm PSR_I_MASK |
- | |
252 | * ;; |
- | |
253 | * srlz.d |
- | |
254 | */ |
- | |
255 | 248 | ||
256 | /* 10. call handler */ |
249 | /* 10. call handler */ |
257 | mov b1 = loc2 |
250 | mov b1 = loc2 |
258 | br.call.sptk.many b0 = b1 |
251 | br.call.sptk.many b0 = b1 |
259 | 252 | ||
260 | /* 11. return from handler */ |
253 | /* 11. return from handler */ |
261 | 0: |
254 | 0: |
262 | 255 | ||
263 | /* 12. skipped (will not disable interrupts) */ |
256 | /* 12. skipped (will not disable interrupts) */ |
264 | /* |
- | |
265 | * rsm PSR_I_MASK |
- | |
266 | * ;; |
- | |
267 | * srlz.d |
- | |
268 | */ |
- | |
269 | 257 | ||
270 | /* 13. restore general and floating-point registers */ |
258 | /* 13. restore general and floating-point registers */ |
271 | /* TODO: restore floating-point context */ |
259 | /* TODO: restore floating-point context */ |
272 | mov r1 = loc17 |
260 | mov r1 = loc17 |
273 | mov r2 = loc18 |
261 | mov r2 = loc18 |
Line 317... | Line 305... | ||
317 | mov b5 = loc14 |
305 | mov b5 = loc14 |
318 | mov b6 = loc15 |
306 | mov b6 = loc15 |
319 | mov b7 = loc16 |
307 | mov b7 = loc16 |
320 | 308 | ||
321 | /* 15. disable PSR.ic and switch to bank 0 */ |
309 | /* 15. disable PSR.ic and switch to bank 0 */ |
322 | rsm PSR_IC_MASK |
310 | rsm 0x2000 |
323 | bsw.0 ;; |
311 | bsw.0 ;; |
324 | srlz.d |
312 | srlz.d |
325 | 313 | ||
326 | mov r24 = loc1 |
314 | mov r24 = loc1 |
327 | mov ar.pfs = loc0 |
315 | mov ar.pfs = loc0 |