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49 | #define FW_PAGE_WIDTH 28 /* 256M */ |
49 | #define FW_PAGE_WIDTH 28 /* 256M */ |
50 | 50 | ||
51 | #define USPACE_IO_PAGE_WIDTH 12 /* 4K */ |
51 | #define USPACE_IO_PAGE_WIDTH 12 /* 4K */ |
52 | 52 | ||
53 | 53 | ||
54 | 54 | /* |
|
55 | /** Staticly mapped IO spaces - offsets to 0xe...00 of virtual adresses |
55 | * Statically mapped IO spaces - offsets to 0xe...00 of virtual addresses |
56 | becauce of "minimal virtual bits implemented is 51" |
56 | * because of "minimal virtual bits implemented is 51" it is possible to |
57 | it is possible to have here values up to 0x0007000000000000 |
57 | * have values up to 0x0007000000000000 |
58 | */ |
58 | */ |
59 | 59 | ||
60 | /* Firmware area (bellow 4GB in phys mem) */ |
60 | /* Firmware area (bellow 4GB in phys mem) */ |
61 | #define FW_OFFSET 0x00000000F0000000 |
61 | #define FW_OFFSET 0x00000000F0000000 |
62 | /* Legacy IO space */ |
62 | /* Legacy IO space */ |
63 | #define IO_OFFSET 0x0001000000000000 |
63 | #define IO_OFFSET 0x0001000000000000 |
64 | /* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000*/ |
64 | /* Videoram - now mapped to 0 as VGA text mode vram on 0xb8000 */ |
65 | #define VIO_OFFSET 0x0002000000000000 |
65 | #define VIO_OFFSET 0x0002000000000000 |
66 | 66 | ||
67 | 67 | ||
68 | - | ||
69 | - | ||
70 | #define PPN_SHIFT 12 |
68 | #define PPN_SHIFT 12 |
71 | 69 | ||
72 | #define VRN_SHIFT 61 |
70 | #define VRN_SHIFT 61 |
73 | #define VRN_MASK (7LL << VRN_SHIFT) |
71 | #define VRN_MASK (7LL << VRN_SHIFT) |
74 | #define VA2VRN(va) ((va)>>VRN_SHIFT) |
72 | #define VA2VRN(va) ((va)>>VRN_SHIFT) |