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Rev 3536 | Rev 4377 | ||
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Line 63... | Line 63... | ||
63 | VendorIntel |
63 | VendorIntel |
64 | }; |
64 | }; |
65 | 65 | ||
66 | static char *vendor_str[] = { |
66 | static char *vendor_str[] = { |
67 | "Unknown Vendor", |
67 | "Unknown Vendor", |
68 | "AuthenticAMD", |
68 | "AMD", |
69 | "GenuineIntel" |
69 | "Intel" |
70 | }; |
70 | }; |
71 | 71 | ||
72 | void fpu_disable(void) |
72 | void fpu_disable(void) |
73 | { |
73 | { |
74 | asm volatile ( |
74 | asm volatile ( |
75 | "mov %%cr0,%%eax;" |
75 | "mov %%cr0, %%eax\n" |
76 | "or $8,%%eax;" |
76 | "or $8, %%eax\n" |
77 | "mov %%eax,%%cr0;" |
77 | "mov %%eax, %%cr0\n" |
78 | : |
- | |
79 | : |
- | |
80 | :"%eax" |
78 | ::: "%eax" |
81 | ); |
79 | ); |
82 | } |
80 | } |
83 | 81 | ||
84 | void fpu_enable(void) |
82 | void fpu_enable(void) |
85 | { |
83 | { |
86 | asm volatile ( |
84 | asm volatile ( |
87 | "mov %%cr0,%%eax;" |
85 | "mov %%cr0, %%eax\n" |
88 | "and $0xffFFffF7,%%eax;" |
86 | "and $0xffFFffF7, %%eax\n" |
89 | "mov %%eax,%%cr0;" |
87 | "mov %%eax,%%cr0\n" |
90 | : |
- | |
91 | : |
- | |
92 | :"%eax" |
88 | ::: "%eax" |
93 | ); |
89 | ); |
94 | } |
90 | } |
95 | 91 | ||
96 | void cpu_arch_init(void) |
92 | void cpu_arch_init(void) |
97 | { |
93 | { |
Line 115... | Line 111... | ||
115 | else |
111 | else |
116 | fpu_fsr(); |
112 | fpu_fsr(); |
117 | 113 | ||
118 | if (fi.bits.sse) { |
114 | if (fi.bits.sse) { |
119 | asm volatile ( |
115 | asm volatile ( |
120 | "mov %%cr4,%0\n" |
116 | "mov %%cr4, %[help]\n" |
121 | "or %1,%0\n" |
117 | "or %[mask], %[help]\n" |
122 | "mov %0,%%cr4\n" |
118 | "mov %[help], %%cr4\n" |
123 | : "+r" (help) |
119 | : [help] "+r" (help) |
124 | : "i" (CR4_OSFXSR_MASK|(1<<10)) |
120 | : [mask] "i" (CR4_OSFXSR_MASK | (1 << 10)) |
125 | ); |
121 | ); |
126 | } |
122 | } |
127 | 123 | ||
128 | /* Setup fast SYSENTER/SYSEXIT syscalls */ |
124 | /* Setup fast SYSENTER/SYSEXIT syscalls */ |
129 | syscall_setup_cpu(); |
125 | syscall_setup_cpu(); |
Line 138... | Line 134... | ||
138 | cpuid(0, &info); |
134 | cpuid(0, &info); |
139 | 135 | ||
140 | /* |
136 | /* |
141 | * Check for AMD processor. |
137 | * Check for AMD processor. |
142 | */ |
138 | */ |
- | 139 | if ((info.cpuid_ebx == AMD_CPUID_EBX) |
|
143 | if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) { |
140 | && (info.cpuid_ecx == AMD_CPUID_ECX) |
- | 141 | && (info.cpuid_edx == AMD_CPUID_EDX)) |
|
144 | CPU->arch.vendor = VendorAMD; |
142 | CPU->arch.vendor = VendorAMD; |
145 | } |
- | |
146 | 143 | ||
147 | /* |
144 | /* |
148 | * Check for Intel processor. |
145 | * Check for Intel processor. |
149 | */ |
146 | */ |
- | 147 | if ((info.cpuid_ebx == INTEL_CPUID_EBX) |
|
150 | if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) { |
148 | && (info.cpuid_ecx == INTEL_CPUID_ECX) |
- | 149 | && (info.cpuid_edx == INTEL_CPUID_EDX)) |
|
151 | CPU->arch.vendor = VendorIntel; |
150 | CPU->arch.vendor = VendorIntel; |
152 | } |
- | |
153 | 151 | ||
154 | cpuid(1, &info); |
152 | cpuid(1, &info); |
155 | CPU->arch.family = (info.cpuid_eax>>8)&0xf; |
153 | CPU->arch.family = (info.cpuid_eax >> 8) & 0x0f; |
156 | CPU->arch.model = (info.cpuid_eax>>4)&0xf; |
154 | CPU->arch.model = (info.cpuid_eax >> 4) & 0x0f; |
157 | CPU->arch.stepping = (info.cpuid_eax>>0)&0xf; |
155 | CPU->arch.stepping = (info.cpuid_eax >> 0) & 0x0f; |
158 | } |
156 | } |
159 | } |
157 | } |
160 | 158 | ||
161 | void cpu_print_report(cpu_t* m) |
159 | void cpu_print_report(cpu_t* cpu) |
162 | { |
160 | { |
163 | printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n", |
161 | printf("cpu%u: (%s family=%u model=%u stepping=%u) %" PRIu16 " MHz\n", |
164 | m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping, |
162 | cpu->id, vendor_str[cpu->arch.vendor], cpu->arch.family, |
165 | m->frequency_mhz); |
163 | cpu->arch.model, cpu->arch.stepping, cpu->frequency_mhz); |
166 | } |
164 | } |
167 | 165 | ||
168 | /** @} |
166 | /** @} |
169 | */ |
167 | */ |