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Line 32... | Line 32... | ||
32 | /** @file |
32 | /** @file |
33 | * @brief Exception handlers and exception initialization routines. |
33 | * @brief Exception handlers and exception initialization routines. |
34 | */ |
34 | */ |
35 | 35 | ||
36 | #include <arch/exception.h> |
36 | #include <arch/exception.h> |
37 | #include <arch/debug/print.h> |
- | |
38 | #include <arch/memstr.h> |
37 | #include <arch/memstr.h> |
39 | #include <arch/regutils.h> |
38 | #include <arch/regutils.h> |
40 | #include <interrupt.h> |
39 | #include <interrupt.h> |
41 | #include <arch/machine.h> |
- | |
42 | #include <arch/mm/page_fault.h> |
40 | #include <arch/mm/page_fault.h> |
43 | #include <arch/barrier.h> |
41 | #include <arch/barrier.h> |
- | 42 | #include <arch/drivers/gxemul.h> |
|
44 | #include <print.h> |
43 | #include <print.h> |
45 | #include <syscall/syscall.h> |
44 | #include <syscall/syscall.h> |
46 | 45 | ||
47 | /** Offset used in calculation of exception handler's relative address. |
46 | /** Offset used in calculation of exception handler's relative address. |
48 | * |
47 | * |
Line 61... | Line 60... | ||
61 | 60 | ||
62 | /** Switches to kernel stack and saves all registers there. |
61 | /** Switches to kernel stack and saves all registers there. |
63 | * |
62 | * |
64 | * Temporary exception stack is used to save a few registers |
63 | * Temporary exception stack is used to save a few registers |
65 | * before stack switch takes place. |
64 | * before stack switch takes place. |
- | 65 | * |
|
66 | */ |
66 | */ |
67 | inline static void setup_stack_and_save_regs() |
67 | inline static void setup_stack_and_save_regs() |
68 | { |
68 | { |
69 | asm volatile( |
69 | asm volatile ( |
70 | "ldr r13, =exc_stack \n" |
70 | "ldr r13, =exc_stack\n" |
Line 98... | Line 98... | ||
98 | "mov r3, r13 \n" |
98 | "mov r3, r13\n" |
99 | "stmfd r13!, {r2} \n" |
99 | "stmfd r13!, {r2}\n" |
100 | "mov r2, lr \n" |
100 | "mov r2, lr\n" |
101 | "stmfd r13!, {r4-r12} \n" |
101 | "stmfd r13!, {r4-r12}\n" |
102 | "mov r1, r13 \n" |
102 | "mov r1, r13\n" |
- | 103 | ||
103 | /* the following two lines are for debugging */ |
104 | /* the following two lines are for debugging */ |
104 | "mov sp, #0 \n" |
105 | "mov sp, #0\n" |
105 | "mov lr, #0 \n" |
106 | "mov lr, #0\n" |
106 | "msr cpsr_c, r0 \n" |
107 | "msr cpsr_c, r0\n" |
107 | 108 | ||
Line 111... | Line 112... | ||
111 | "stmfd r1!, {r2} \n" |
112 | "stmfd r1!, {r2}\n" |
112 | "stmfd r1!, {r3} \n" |
113 | "stmfd r1!, {r3}\n" |
113 | "mrs r0, spsr \n" |
114 | "mrs r0, spsr\n" |
114 | "stmfd r1!, {r0} \n" |
115 | "stmfd r1!, {r0}\n" |
115 | "mov r13, r1 \n" |
116 | "mov r13, r1\n" |
- | 117 | ||
116 | "2:\n" |
118 | "2:\n" |
117 | ); |
119 | ); |
118 | } |
120 | } |
119 | 121 | ||
120 | /** Returns from exception mode. |
122 | /** Returns from exception mode. |
Line 188... | Line 190... | ||
188 | ); |
190 | ); |
189 | } |
191 | } |
190 | 192 | ||
191 | /** Calls exception dispatch routine. */ |
193 | /** Calls exception dispatch routine. */ |
192 | #define CALL_EXC_DISPATCH(exception) \ |
194 | #define CALL_EXC_DISPATCH(exception) \ |
- | 195 | asm volatile ( \ |
|
193 | asm("mov r0, %0" : : "i" (exception)); \ |
196 | "mov r0, %[exc]\n" \ |
194 | asm("mov r1, r13"); \ |
197 | "mov r1, r13\n" \ |
195 | asm("bl exc_dispatch"); |
198 | "bl exc_dispatch\n" \ |
- | 199 | :: [exc] "i" (exception) \ |
|
- | 200 | );\ |
|
196 | 201 | ||
197 | /** General exception handler. |
202 | /** General exception handler. |
198 | * |
203 | * |
199 | * Stores registers, dispatches the exception, |
204 | * Stores registers, dispatches the exception, |
200 | * and finally restores registers and returns from exception processing. |
205 | * and finally restores registers and returns from exception processing. |
Line 252... | Line 257... | ||
252 | } |
257 | } |
253 | 258 | ||
254 | /** Low-level Prefetch Abort Exception handler. */ |
259 | /** Low-level Prefetch Abort Exception handler. */ |
255 | static void prefetch_abort_exception_entry(void) |
260 | static void prefetch_abort_exception_entry(void) |
256 | { |
261 | { |
- | 262 | asm volatile ( |
|
257 | asm("sub lr, lr, #4"); |
263 | "sub lr, lr, #4" |
- | 264 | ); |
|
- | 265 | ||
258 | PROCESS_EXCEPTION(EXC_PREFETCH_ABORT); |
266 | PROCESS_EXCEPTION(EXC_PREFETCH_ABORT); |
259 | } |
267 | } |
260 | 268 | ||
261 | /** Low-level Data Abort Exception handler. */ |
269 | /** Low-level Data Abort Exception handler. */ |
262 | static void data_abort_exception_entry(void) |
270 | static void data_abort_exception_entry(void) |
263 | { |
271 | { |
- | 272 | asm volatile ( |
|
264 | asm("sub lr, lr, #8"); |
273 | "sub lr, lr, #8" |
- | 274 | ); |
|
- | 275 | ||
265 | PROCESS_EXCEPTION(EXC_DATA_ABORT); |
276 | PROCESS_EXCEPTION(EXC_DATA_ABORT); |
266 | } |
277 | } |
267 | 278 | ||
268 | /** Low-level Interrupt Exception handler. |
279 | /** Low-level Interrupt Exception handler. |
269 | * |
280 | * |
Line 271... | Line 282... | ||
271 | * because of possible occurence of nested interrupt exception, which |
282 | * because of possible occurence of nested interrupt exception, which |
272 | * would overwrite (and thus spoil) stack pointer. |
283 | * would overwrite (and thus spoil) stack pointer. |
273 | */ |
284 | */ |
274 | static void irq_exception_entry(void) |
285 | static void irq_exception_entry(void) |
275 | { |
286 | { |
- | 287 | asm volatile ( |
|
276 | asm("sub lr, lr, #4"); |
288 | "sub lr, lr, #4" |
- | 289 | ); |
|
- | 290 | ||
277 | setup_stack_and_save_regs(); |
291 | setup_stack_and_save_regs(); |
278 | 292 | ||
279 | switch_to_irq_servicing_mode(); |
293 | switch_to_irq_servicing_mode(); |
280 | 294 | ||
281 | CALL_EXC_DISPATCH(EXC_IRQ) |
295 | CALL_EXC_DISPATCH(EXC_IRQ) |
Line 291... | Line 305... | ||
291 | { |
305 | { |
292 | istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2, |
306 | istate->r0 = syscall_handler(istate->r0, istate->r1, istate->r2, |
293 | istate->r3, istate->r4, istate->r5, istate->r6); |
307 | istate->r3, istate->r4, istate->r5, istate->r6); |
294 | } |
308 | } |
295 | 309 | ||
- | 310 | /** Returns the mask of active interrupts. */ |
|
- | 311 | static inline uint32_t gxemul_irqc_get_sources(void) |
|
- | 312 | { |
|
- | 313 | return *((uint32_t *) gxemul_irqc); |
|
- | 314 | } |
|
- | 315 | ||
296 | /** Interrupt Exception handler. |
316 | /** Interrupt Exception handler. |
297 | * |
317 | * |
298 | * Determines the sources of interrupt and calls their handlers. |
318 | * Determines the sources of interrupt and calls their handlers. |
299 | */ |
319 | */ |
300 | static void irq_exception(int exc_no, istate_t *istate) |
320 | static void irq_exception(int exc_no, istate_t *istate) |
301 | { |
321 | { |
- | 322 | uint32_t sources = gxemul_irqc_get_sources(); |
|
- | 323 | unsigned int i; |
|
- | 324 | ||
- | 325 | for (i = 0; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
|
- | 326 | if (sources & (1 << i)) { |
|
302 | machine_irq_exception(exc_no, istate); |
327 | irq_t *irq = irq_dispatch_and_lock(i); |
- | 328 | if (irq) { |
|
- | 329 | /* The IRQ handler was found. */ |
|
- | 330 | irq->handler(irq); |
|
- | 331 | spinlock_unlock(&irq->lock); |
|
- | 332 | } else { |
|
- | 333 | /* Spurious interrupt.*/ |
|
- | 334 | printf("cpu%d: spurious interrupt (inum=%d)\n", |
|
- | 335 | CPU->id, i); |
|
- | 336 | } |
|
- | 337 | } |
|
- | 338 | } |
|
303 | } |
339 | } |
304 | 340 | ||
305 | /** Fills exception vectors with appropriate exception handlers. */ |
341 | /** Fills exception vectors with appropriate exception handlers. */ |
306 | void install_exception_handlers(void) |
342 | void install_exception_handlers(void) |
307 | { |
343 | { |
Line 331... | Line 367... | ||
331 | /** Activates use of high exception vectors addresses. */ |
367 | /** Activates use of high exception vectors addresses. */ |
332 | static void high_vectors(void) |
368 | static void high_vectors(void) |
333 | { |
369 | { |
334 | uint32_t control_reg; |
370 | uint32_t control_reg; |
335 | 371 | ||
- | 372 | asm volatile ( |
|
- | 373 | "mrc p15, 0, %[control_reg], c1, c1" |
|
336 | asm volatile("mrc p15, 0, %0, c1, c1" : "=r" (control_reg)); |
374 | : [control_reg] "=r" (control_reg) |
- | 375 | ); |
|
337 | 376 | ||
338 | /* switch on the high vectors bit */ |
377 | /* switch on the high vectors bit */ |
339 | control_reg |= CP15_R1_HIGH_VECTORS_BIT; |
378 | control_reg |= CP15_R1_HIGH_VECTORS_BIT; |
340 | 379 | ||
- | 380 | asm volatile ( |
|
- | 381 | "mcr p15, 0, %[control_reg], c1, c1" |
|
341 | asm volatile("mcr p15, 0, %0, c1, c1" : : "r" (control_reg)); |
382 | :: [control_reg] "r" (control_reg) |
- | 383 | ); |
|
342 | } |
384 | } |
343 | #endif |
385 | #endif |
344 | 386 | ||
345 | /** Initializes exception handling. |
387 | /** Initializes exception handling. |
346 | * |
388 | * |
Line 365... | Line 407... | ||
365 | * |
407 | * |
366 | * @param istate Structure to be printed. |
408 | * @param istate Structure to be printed. |
367 | */ |
409 | */ |
368 | void print_istate(istate_t *istate) |
410 | void print_istate(istate_t *istate) |
369 | { |
411 | { |
370 | dprintf("istate dump:\n"); |
412 | printf("istate dump:\n"); |
371 | 413 | ||
372 | dprintf(" r0: %x r1: %x r2: %x r3: %x\n", |
414 | printf(" r0: %x r1: %x r2: %x r3: %x\n", |
373 | istate->r0, istate->r1, istate->r2, istate->r3); |
415 | istate->r0, istate->r1, istate->r2, istate->r3); |
374 | dprintf(" r4: %x r5: %x r6: %x r7: %x\n", |
416 | printf(" r4: %x r5: %x r6: %x r7: %x\n", |
375 | istate->r4, istate->r5, istate->r6, istate->r7); |
417 | istate->r4, istate->r5, istate->r6, istate->r7); |
376 | dprintf(" r8: %x r8: %x r10: %x r11: %x\n", |
418 | printf(" r8: %x r8: %x r10: %x r11: %x\n", |
377 | istate->r8, istate->r9, istate->r10, istate->r11); |
419 | istate->r8, istate->r9, istate->r10, istate->r11); |
378 | dprintf(" r12: %x sp: %x lr: %x spsr: %x\n", |
420 | printf(" r12: %x sp: %x lr: %x spsr: %x\n", |
379 | istate->r12, istate->sp, istate->lr, istate->spsr); |
421 | istate->r12, istate->sp, istate->lr, istate->spsr); |
380 | 422 | ||
381 | dprintf(" pc: %x\n", istate->pc); |
423 | printf(" pc: %x\n", istate->pc); |
382 | } |
424 | } |
383 | 425 | ||
384 | /** @} |
426 | /** @} |
385 | */ |
427 | */ |