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36 | 36 | ||
37 | #ifndef KERN_NS16550_H_ |
37 | #ifndef KERN_NS16550_H_ |
38 | #define KERN_NS16550_H_ |
38 | #define KERN_NS16550_H_ |
39 | 39 | ||
40 | #include <console/chardev.h> |
40 | #include <console/chardev.h> |
- | 41 | #include <ddi/irq.h> |
|
41 | #include <ipc/irq.h> |
42 | #include <ipc/irq.h> |
42 | 43 | ||
43 | extern void ns16550_init(devno_t devno, inr_t inr, uintptr_t vaddr); |
44 | extern void ns16550_init(devno_t, uintptr_t, inr_t, cir_t, void *); |
44 | extern void ns16550_poll(void); |
45 | extern void ns16550_poll(void); |
45 | extern void ns16550_grab(void); |
46 | extern void ns16550_grab(void); |
46 | extern void ns16550_release(void); |
47 | extern void ns16550_release(void); |
47 | extern char ns16550_key_read(chardev_t *d); |
48 | extern char ns16550_key_read(chardev_t *); |
48 | extern irq_ownership_t ns16550_claim(void); |
49 | extern irq_ownership_t ns16550_claim(void); |
49 | extern void ns16550_irq_handler(irq_t *irq, void *arg, ...); |
50 | extern void ns16550_irq_handler(irq_t *, void *, ...); |
50 | 51 | ||
51 | #include <arch/types.h> |
52 | #include <arch/types.h> |
52 | #ifndef ia64 |
53 | #ifndef ia64 |
53 | #include <arch/drivers/kbd.h> |
54 | #include <arch/drivers/kbd.h> |
54 | #endif |
55 | #endif |
Line 56... | Line 57... | ||
56 | #define RBR_REG 0 /** Receiver Buffer Register. */ |
57 | #define RBR_REG 0 /** Receiver Buffer Register. */ |
57 | #define IER_REG 1 /** Interrupt Enable Register. */ |
58 | #define IER_REG 1 /** Interrupt Enable Register. */ |
58 | #define IIR_REG 2 /** Interrupt Ident Register (read). */ |
59 | #define IIR_REG 2 /** Interrupt Ident Register (read). */ |
59 | #define FCR_REG 2 /** FIFO control register (write). */ |
60 | #define FCR_REG 2 /** FIFO control register (write). */ |
60 | #define LCR_REG 3 /** Line Control register. */ |
61 | #define LCR_REG 3 /** Line Control register. */ |
- | 62 | #define MCR_REG 4 /** Modem Control Register. */ |
|
61 | #define LSR_REG 5 /** Line Status Register. */ |
63 | #define LSR_REG 5 /** Line Status Register. */ |
62 | 64 | ||
63 | #define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ |
65 | #define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ |
64 | 66 | ||
65 | #define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ |
67 | #define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ |
66 | 68 | ||
- | 69 | #define MCR_OUT2 0x08 /** OUT2. */ |
|
- | 70 | ||
67 | /** Structure representing the ns16550 device. */ |
71 | /** Structure representing the ns16550 device. */ |
68 | typedef struct { |
72 | typedef struct { |
69 | devno_t devno; |
73 | devno_t devno; |
70 | volatile ioport_t io_port; /** Memory mapped registers of the ns16550. */ |
74 | /** Memory mapped registers of the ns16550. */ |
- | 75 | volatile ioport_t io_port; |
|
71 | } ns16550_t; |
76 | } ns16550_t; |
72 | 77 | ||
73 | static inline uint8_t ns16550_rbr_read(ns16550_t *dev) |
78 | static inline uint8_t ns16550_rbr_read(ns16550_t *dev) |
74 | { |
79 | { |
75 | return inb(dev->io_port+RBR_REG); |
80 | return inb(dev->io_port + RBR_REG); |
Line 112... | Line 117... | ||
112 | static inline uint8_t ns16550_lsr_read(ns16550_t *dev) |
117 | static inline uint8_t ns16550_lsr_read(ns16550_t *dev) |
113 | { |
118 | { |
114 | return inb(dev->io_port+LSR_REG); |
119 | return inb(dev->io_port + LSR_REG); |
115 | } |
120 | } |
116 | 121 | ||
- | 122 | static inline uint8_t ns16550_mcr_read(ns16550_t *dev) |
|
- | 123 | { |
|
- | 124 | return inb(dev->io_port + MCR_REG); |
|
- | 125 | } |
|
117 | 126 | ||
- | 127 | static inline void ns16550_mcr_write(ns16550_t *dev, uint8_t v) |
|
- | 128 | { |
|
- | 129 | outb(dev->io_port + MCR_REG, v); |
|
- | 130 | } |
|
118 | 131 | ||
119 | #endif |
132 | #endif |
120 | 133 | ||
121 | /** @} |
134 | /** @} |
122 | */ |
135 | */ |