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Line 61... | Line 61... | ||
61 | 61 | ||
62 | /** Switches to kernel stack and saves all registers there. |
62 | /** Switches to kernel stack and saves all registers there. |
63 | * |
63 | * |
64 | * Temporary exception stack is used to save a few registers |
64 | * Temporary exception stack is used to save a few registers |
65 | * before stack switch takes place. |
65 | * before stack switch takes place. |
- | 66 | * |
|
66 | */ |
67 | */ |
67 | inline static void setup_stack_and_save_regs() |
68 | inline static void setup_stack_and_save_regs() |
68 | { |
69 | { |
69 | asm volatile( |
70 | asm volatile ( |
70 | "ldr r13, =exc_stack \n" |
71 | "ldr r13, =exc_stack\n" |
Line 98... | Line 99... | ||
98 | "mov r3, r13 \n" |
99 | "mov r3, r13\n" |
99 | "stmfd r13!, {r2} \n" |
100 | "stmfd r13!, {r2}\n" |
100 | "mov r2, lr \n" |
101 | "mov r2, lr\n" |
101 | "stmfd r13!, {r4-r12} \n" |
102 | "stmfd r13!, {r4-r12}\n" |
102 | "mov r1, r13 \n" |
103 | "mov r1, r13\n" |
- | 104 | ||
103 | /* the following two lines are for debugging */ |
105 | /* the following two lines are for debugging */ |
104 | "mov sp, #0 \n" |
106 | "mov sp, #0\n" |
105 | "mov lr, #0 \n" |
107 | "mov lr, #0\n" |
106 | "msr cpsr_c, r0 \n" |
108 | "msr cpsr_c, r0\n" |
107 | 109 | ||
Line 111... | Line 113... | ||
111 | "stmfd r1!, {r2} \n" |
113 | "stmfd r1!, {r2}\n" |
112 | "stmfd r1!, {r3} \n" |
114 | "stmfd r1!, {r3}\n" |
113 | "mrs r0, spsr \n" |
115 | "mrs r0, spsr\n" |
114 | "stmfd r1!, {r0} \n" |
116 | "stmfd r1!, {r0}\n" |
115 | "mov r13, r1 \n" |
117 | "mov r13, r1\n" |
- | 118 | ||
116 | "2:\n" |
119 | "2:\n" |
117 | ); |
120 | ); |
118 | } |
121 | } |
119 | 122 | ||
120 | /** Returns from exception mode. |
123 | /** Returns from exception mode. |
Line 188... | Line 191... | ||
188 | ); |
191 | ); |
189 | } |
192 | } |
190 | 193 | ||
191 | /** Calls exception dispatch routine. */ |
194 | /** Calls exception dispatch routine. */ |
192 | #define CALL_EXC_DISPATCH(exception) \ |
195 | #define CALL_EXC_DISPATCH(exception) \ |
- | 196 | asm volatile ( \ |
|
193 | asm("mov r0, %0" : : "i" (exception)); \ |
197 | "mov r0, %[exc]\n" \ |
194 | asm("mov r1, r13"); \ |
198 | "mov r1, r13\n" \ |
195 | asm("bl exc_dispatch"); |
199 | "bl exc_dispatch\n" \ |
- | 200 | :: [exc] "i" (exception) \ |
|
- | 201 | );\ |
|
196 | 202 | ||
197 | /** General exception handler. |
203 | /** General exception handler. |
198 | * |
204 | * |
199 | * Stores registers, dispatches the exception, |
205 | * Stores registers, dispatches the exception, |
200 | * and finally restores registers and returns from exception processing. |
206 | * and finally restores registers and returns from exception processing. |
Line 331... | Line 337... | ||
331 | /** Activates use of high exception vectors addresses. */ |
337 | /** Activates use of high exception vectors addresses. */ |
332 | static void high_vectors(void) |
338 | static void high_vectors(void) |
333 | { |
339 | { |
334 | uint32_t control_reg; |
340 | uint32_t control_reg; |
335 | 341 | ||
- | 342 | asm volatile ( |
|
- | 343 | "mrc p15, 0, %[control_reg], c1, c1" |
|
336 | asm volatile("mrc p15, 0, %0, c1, c1" : "=r" (control_reg)); |
344 | : [control_reg] "=r" (control_reg) |
- | 345 | ); |
|
337 | 346 | ||
338 | /* switch on the high vectors bit */ |
347 | /* switch on the high vectors bit */ |
339 | control_reg |= CP15_R1_HIGH_VECTORS_BIT; |
348 | control_reg |= CP15_R1_HIGH_VECTORS_BIT; |
340 | 349 | ||
- | 350 | asm volatile ( |
|
- | 351 | "mcr p15, 0, %[control_reg], c1, c1" |
|
341 | asm volatile("mcr p15, 0, %0, c1, c1" : : "r" (control_reg)); |
352 | :: [control_reg] "r" (control_reg) |
- | 353 | ); |
|
342 | } |
354 | } |
343 | #endif |
355 | #endif |
344 | 356 | ||
345 | /** Initializes exception handling. |
357 | /** Initializes exception handling. |
346 | * |
358 | * |