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Rev 3022 | Rev 4055 | ||
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Line 110... | Line 110... | ||
110 | d->offset_16_31 = offset >> 16; |
110 | d->offset_16_31 = offset >> 16; |
111 | } |
111 | } |
112 | 112 | ||
113 | void tss_initialize(tss_t *t) |
113 | void tss_initialize(tss_t *t) |
114 | { |
114 | { |
115 | memsetb((uintptr_t) t, sizeof(struct tss), 0); |
115 | memsetb(t, sizeof(struct tss), 0); |
116 | } |
116 | } |
117 | 117 | ||
118 | /* |
118 | /* |
119 | * This function takes care of proper setup of IDT and IDTR. |
119 | * This function takes care of proper setup of IDT and IDTR. |
120 | */ |
120 | */ |
Line 196... | Line 196... | ||
196 | tss_p = &tss; |
196 | tss_p = &tss; |
197 | } |
197 | } |
198 | else { |
198 | else { |
199 | tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC); |
199 | tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC); |
200 | if (!tss_p) |
200 | if (!tss_p) |
201 | panic("could not allocate TSS\n"); |
201 | panic("Cannot allocate TSS."); |
202 | } |
202 | } |
203 | 203 | ||
204 | tss_initialize(tss_p); |
204 | tss_initialize(tss_p); |
205 | 205 | ||
206 | gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL; |
206 | gdt_p[TSS_DES].access = AR_PRESENT | AR_TSS | DPL_KERNEL; |
Line 238... | Line 238... | ||
238 | void arch_reboot(void) |
238 | void arch_reboot(void) |
239 | { |
239 | { |
240 | preemption_disable(); |
240 | preemption_disable(); |
241 | ipl_t ipl = interrupts_disable(); |
241 | ipl_t ipl = interrupts_disable(); |
242 | 242 | ||
243 | memsetb((uintptr_t) idt, sizeof(idt), 0); |
243 | memsetb(idt, sizeof(idt), 0); |
244 | 244 | ||
245 | ptr_16_32_t idtr; |
245 | ptr_16_32_t idtr; |
246 | idtr.limit = sizeof(idt); |
246 | idtr.limit = sizeof(idt); |
247 | idtr.base = (uintptr_t) idt; |
247 | idtr.base = (uintptr_t) idt; |
248 | idtr_load(&idtr); |
248 | idtr_load(&idtr); |