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56 | "cpuid\n" |
56 | "cpuid\n" |
57 | ::: "eax", "ebx", "ecx", "edx", "memory" |
57 | ::: "eax", "ebx", "ecx", "edx", "memory" |
58 | ); |
58 | ); |
59 | } |
59 | } |
60 | 60 | ||
61 | #ifdef CONFIG_FENCES_P4 |
61 | #if defined(CONFIG_FENCES_P4) |
62 | # define memory_barrier() asm volatile ("mfence\n" ::: "memory") |
62 | #define memory_barrier() asm volatile ("mfence\n" ::: "memory") |
63 | # define read_barrier() asm volatile ("lfence\n" ::: "memory") |
63 | #define read_barrier() asm volatile ("lfence\n" ::: "memory") |
64 | # ifdef CONFIG_WEAK_MEMORY |
64 | #ifdef CONFIG_WEAK_MEMORY |
65 | # define write_barrier() asm volatile ("sfence\n" ::: "memory") |
65 | #define write_barrier() asm volatile ("sfence\n" ::: "memory") |
66 | # else |
66 | #else |
67 | # define write_barrier() asm volatile( "" ::: "memory"); |
67 | #define write_barrier() asm volatile ("" ::: "memory"); |
68 | # endif |
68 | #endif |
69 | #elif CONFIG_FENCES_P3 |
69 | #elif defined(CONFIG_FENCES_P3) |
70 | # define memory_barrier() cpuid_serialization() |
70 | #define memory_barrier() cpuid_serialization() |
71 | # define read_barrier() cpuid_serialization() |
71 | #define read_barrier() cpuid_serialization() |
72 | # ifdef CONFIG_WEAK_MEMORY |
72 | #ifdef CONFIG_WEAK_MEMORY |
73 | # define write_barrier() asm volatile ("sfence\n" ::: "memory") |
73 | #define write_barrier() asm volatile ("sfence\n" ::: "memory") |
74 | # else |
74 | #else |
Line 82... | Line 82... | ||
82 | # else |
82 | #else |
83 | # define write_barrier() asm volatile( "" ::: "memory"); |
83 | #define write_barrier() asm volatile ("" ::: "memory"); |
84 | # endif |
84 | #endif |
85 | #endif |
85 | #endif |
86 | 86 | ||
- | 87 | /* |
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- | 88 | * On ia32, the hardware takes care about instruction and data cache coherence, |
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- | 89 | * even on SMP systems. We issue a write barrier to be sure that writes |
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- | 90 | * queueing in the store buffer drain to the memory (even though it would be |
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- | 91 | * sufficient for them to drain to the D-cache). |
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- | 92 | */ |
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- | 93 | #define smc_coherence(a) write_barrier() |
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- | 94 | #define smc_coherence_block(a, l) write_barrier() |
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- | 95 | ||
87 | #endif |
96 | #endif |
88 | 97 | ||
89 | /** @} |
98 | /** @} |
90 | */ |
99 | */ |