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Line 43... | Line 43... | ||
43 | #include <ddi/device.h> |
43 | #include <ddi/device.h> |
44 | #include <mm/page.h> |
44 | #include <mm/page.h> |
45 | #include <arch/machine.h> |
45 | #include <arch/machine.h> |
46 | #include <arch/debug/print.h> |
46 | #include <arch/debug/print.h> |
47 | 47 | ||
48 | - | ||
49 | /* Addresses of devices. */ |
48 | /* Addresses of devices. */ |
50 | #define GXEMUL_VIDEORAM 0x10000000 |
49 | #define GXEMUL_VIDEORAM 0x10000000 |
51 | #define GXEMUL_KBD 0x10000000 |
50 | #define GXEMUL_KBD 0x10000000 |
52 | #define GXEMUL_HALT_OFFSET 0x10 |
51 | #define GXEMUL_HALT_OFFSET 0x10 |
53 | #define GXEMUL_RTC 0x15000000 |
52 | #define GXEMUL_RTC 0x15000000 |
Line 58... | Line 57... | ||
58 | #define GXEMUL_IRQC_UNMASK_OFFSET 0x8 |
57 | #define GXEMUL_IRQC_UNMASK_OFFSET 0x8 |
59 | #define GXEMUL_MP 0x11000000 |
58 | #define GXEMUL_MP 0x11000000 |
60 | #define GXEMUL_MP_MEMSIZE_OFFSET 0x0090 |
59 | #define GXEMUL_MP_MEMSIZE_OFFSET 0x0090 |
61 | #define GXEMUL_FB 0x12000000 |
60 | #define GXEMUL_FB 0x12000000 |
62 | 61 | ||
63 | - | ||
64 | /* IRQs */ |
62 | /* IRQs */ |
65 | #define GXEMUL_KBD_IRQ 2 |
63 | #define GXEMUL_KBD_IRQ 2 |
66 | #define GXEMUL_TIMER_IRQ 4 |
64 | #define GXEMUL_TIMER_IRQ 4 |
67 | 65 | ||
68 | static gxemul_hw_map_t gxemul_hw_map; |
66 | static gxemul_hw_map_t gxemul_hw_map; |
Line 86... | Line 84... | ||
86 | 84 | ||
87 | 85 | ||
88 | /** Returns the mask of active interrupts. */ |
86 | /** Returns the mask of active interrupts. */ |
89 | static inline uint32_t gxemul_irqc_get_sources(void) |
87 | static inline uint32_t gxemul_irqc_get_sources(void) |
90 | { |
88 | { |
91 | return *(uint32_t*) gxemul_hw_map.irqc; |
89 | return *((uint32_t *) gxemul_hw_map.irqc); |
92 | } |
90 | } |
93 | 91 | ||
94 | 92 | ||
95 | /** Masks interrupt. |
93 | /** Masks interrupt. |
96 | * |
94 | * |
97 | * @param irq interrupt number |
95 | * @param irq interrupt number |
98 | */ |
96 | */ |
99 | static inline void gxemul_irqc_mask(uint32_t irq) |
97 | static inline void gxemul_irqc_mask(uint32_t irq) |
100 | { |
98 | { |
101 | *(uint32_t*) gxemul_hw_map.irqc_mask = irq; |
99 | *((uint32_t *) gxemul_hw_map.irqc_mask) = irq; |
102 | } |
100 | } |
103 | 101 | ||
104 | 102 | ||
105 | /** Unmasks interrupt. |
103 | /** Unmasks interrupt. |
106 | * |
104 | * |
107 | * @param irq interrupt number |
105 | * @param irq interrupt number |
108 | */ |
106 | */ |
109 | static inline void gxemul_irqc_unmask(uint32_t irq) |
107 | static inline void gxemul_irqc_unmask(uint32_t irq) |
110 | { |
108 | { |
111 | *(uint32_t*) gxemul_hw_map.irqc_unmask = irq; |
109 | *((uint32_t *) gxemul_hw_map.irqc_unmask) = irq; |
112 | } |
110 | } |
113 | 111 | ||
114 | 112 | ||
115 | /** Initializes #gxemul_hw_map. */ |
113 | /** Initializes #gxemul_hw_map. */ |
116 | void gxemul_hw_map_init(void) |
114 | void gxemul_hw_map_init(void) |
Line 121... | Line 119... | ||
121 | gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE); |
119 | gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE); |
122 | 120 | ||
123 | gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET; |
121 | gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET; |
124 | gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET; |
122 | gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET; |
125 | gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET; |
123 | gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET; |
126 | gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET; |
124 | gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + |
- | 125 | GXEMUL_IRQC_UNMASK_OFFSET; |
|
127 | 126 | ||
128 | hw_map_init_called = true; |
127 | hw_map_init_called = true; |
129 | } |
128 | } |
130 | 129 | ||
131 | 130 | ||
Line 137... | Line 136... | ||
137 | static void gxemul_write(chardev_t *dev, const char ch) |
136 | static void gxemul_write(chardev_t *dev, const char ch) |
138 | { |
137 | { |
139 | *((char *) gxemul_hw_map.videoram) = ch; |
138 | *((char *) gxemul_hw_map.videoram) = ch; |
140 | } |
139 | } |
141 | 140 | ||
142 | - | ||
143 | /** Enables gxemul keyboard (interrupt unmasked). |
141 | /** Enables gxemul keyboard (interrupt unmasked). |
144 | * |
142 | * |
145 | * @param dev Not used. |
143 | * @param dev Not used. |
146 | * |
144 | * |
147 | * Called from getc(). |
145 | * Called from getc(). |
Line 149... | Line 147... | ||
149 | static void gxemul_kbd_enable(chardev_t *dev) |
147 | static void gxemul_kbd_enable(chardev_t *dev) |
150 | { |
148 | { |
151 | gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
149 | gxemul_irqc_unmask(GXEMUL_KBD_IRQ); |
152 | } |
150 | } |
153 | 151 | ||
154 | - | ||
155 | /** Disables gxemul keyboard (interrupt masked). |
152 | /** Disables gxemul keyboard (interrupt masked). |
156 | * |
153 | * |
157 | * @param dev not used |
154 | * @param dev not used |
158 | * |
155 | * |
159 | * Called from getc(). |
156 | * Called from getc(). |
Line 161... | Line 158... | ||
161 | static void gxemul_kbd_disable(chardev_t *dev) |
158 | static void gxemul_kbd_disable(chardev_t *dev) |
162 | { |
159 | { |
163 | gxemul_irqc_mask(GXEMUL_KBD_IRQ); |
160 | gxemul_irqc_mask(GXEMUL_KBD_IRQ); |
164 | } |
161 | } |
165 | 162 | ||
166 | - | ||
167 | /** Read character using polling, assume interrupts disabled. |
163 | /** Read character using polling, assume interrupts disabled. |
168 | * |
164 | * |
169 | * @param dev Not used. |
165 | * @param dev Not used. |
170 | */ |
166 | */ |
171 | static char gxemul_do_read(chardev_t *dev) |
167 | static char gxemul_do_read(chardev_t *dev) |
Line 182... | Line 178... | ||
182 | return ch; |
178 | return ch; |
183 | } |
179 | } |
184 | } |
180 | } |
185 | } |
181 | } |
186 | 182 | ||
187 | - | ||
188 | /** Process keyboard interrupt. |
183 | /** Process keyboard interrupt. |
189 | * |
184 | * |
190 | * @param irq IRQ information. |
185 | * @param irq IRQ information. |
191 | * @param arg Not used. |
186 | * @param arg Not used. |
192 | */ |
187 | */ |
Line 206... | Line 201... | ||
206 | } |
201 | } |
207 | chardev_push_character(&console, ch); |
202 | chardev_push_character(&console, ch); |
208 | } |
203 | } |
209 | } |
204 | } |
210 | 205 | ||
211 | - | ||
212 | static irq_ownership_t gxemul_claim(void) |
206 | static irq_ownership_t gxemul_claim(void) |
213 | { |
207 | { |
214 | return IRQ_ACCEPT; |
208 | return IRQ_ACCEPT; |
215 | } |
209 | } |
216 | 210 | ||
Line 223... | Line 217... | ||
223 | gxemul_console_irq.notif_cfg.notify = false; |
217 | gxemul_console_irq.notif_cfg.notify = false; |
224 | spinlock_unlock(&gxemul_console_irq.lock); |
218 | spinlock_unlock(&gxemul_console_irq.lock); |
225 | interrupts_restore(ipl); |
219 | interrupts_restore(ipl); |
226 | } |
220 | } |
227 | 221 | ||
228 | - | ||
229 | /** Return console to userspace. */ |
222 | /** Return console to userspace. */ |
230 | void gxemul_release_console(void) |
223 | void gxemul_release_console(void) |
231 | { |
224 | { |
232 | ipl_t ipl = interrupts_disable(); |
225 | ipl_t ipl = interrupts_disable(); |
233 | spinlock_lock(&gxemul_console_irq.lock); |
226 | spinlock_lock(&gxemul_console_irq.lock); |
Line 236... | Line 229... | ||
236 | } |
229 | } |
237 | spinlock_unlock(&gxemul_console_irq.lock); |
230 | spinlock_unlock(&gxemul_console_irq.lock); |
238 | interrupts_restore(ipl); |
231 | interrupts_restore(ipl); |
239 | } |
232 | } |
240 | 233 | ||
241 | - | ||
242 | /** Initializes console object representing gxemul console. |
234 | /** Initializes console object representing gxemul console. |
243 | * |
235 | * |
244 | * @param devno device number. |
236 | * @param devno device number. |
245 | */ |
237 | */ |
246 | void gxemul_console_init(devno_t devno) |
238 | void gxemul_console_init(devno_t devno) |
Line 262... | Line 254... | ||
262 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
254 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
263 | sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ); |
255 | sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ); |
264 | sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd); |
256 | sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd); |
265 | } |
257 | } |
266 | 258 | ||
267 | - | ||
268 | - | ||
269 | /** Starts gxemul Real Time Clock device, which asserts regular interrupts. |
259 | /** Starts gxemul Real Time Clock device, which asserts regular interrupts. |
270 | * |
260 | * |
271 | * @param frequency Interrupts frequency (0 disables RTC). |
261 | * @param frequency Interrupts frequency (0 disables RTC). |
272 | */ |
262 | */ |
273 | static void gxemul_timer_start(uint32_t frequency) |
263 | static void gxemul_timer_start(uint32_t frequency) |
274 | { |
264 | { |
275 | *(uint32_t*) gxemul_hw_map.rtc_freq = frequency; |
265 | *((uint32_t*) gxemul_hw_map.rtc_freq) = frequency; |
276 | } |
266 | } |
277 | 267 | ||
278 | - | ||
279 | static irq_ownership_t gxemul_timer_claim(void) |
268 | static irq_ownership_t gxemul_timer_claim(void) |
280 | { |
269 | { |
281 | return IRQ_ACCEPT; |
270 | return IRQ_ACCEPT; |
282 | } |
271 | } |
283 | 272 | ||
284 | - | ||
285 | /** Timer interrupt handler. |
273 | /** Timer interrupt handler. |
286 | * |
274 | * |
287 | * @param irq Interrupt information. |
275 | * @param irq Interrupt information. |
288 | * @param arg Not used. |
276 | * @param arg Not used. |
289 | */ |
277 | */ |
Line 296... | Line 284... | ||
296 | spinlock_unlock(&irq->lock); |
284 | spinlock_unlock(&irq->lock); |
297 | clock(); |
285 | clock(); |
298 | spinlock_lock(&irq->lock); |
286 | spinlock_lock(&irq->lock); |
299 | 287 | ||
300 | /* acknowledge tick */ |
288 | /* acknowledge tick */ |
301 | *(uint32_t*) gxemul_hw_map.rtc_ack = 0; |
289 | *((uint32_t*) gxemul_hw_map.rtc_ack) = 0; |
302 | } |
290 | } |
303 | 291 | ||
304 | - | ||
305 | /** Initializes and registers timer interrupt handler. */ |
292 | /** Initializes and registers timer interrupt handler. */ |
306 | static void gxemul_timer_irq_init() |
293 | static void gxemul_timer_irq_init(void) |
307 | { |
294 | { |
308 | irq_initialize(&gxemul_timer_irq); |
295 | irq_initialize(&gxemul_timer_irq); |
309 | gxemul_timer_irq.devno = device_assign_devno(); |
296 | gxemul_timer_irq.devno = device_assign_devno(); |
310 | gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ; |
297 | gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ; |
311 | gxemul_timer_irq.claim = gxemul_timer_claim; |
298 | gxemul_timer_irq.claim = gxemul_timer_claim; |
Line 318... | Line 305... | ||
318 | /** Starts timer. |
305 | /** Starts timer. |
319 | * |
306 | * |
320 | * Initiates regular timer interrupts after initializing |
307 | * Initiates regular timer interrupts after initializing |
321 | * corresponding interrupt handler. |
308 | * corresponding interrupt handler. |
322 | */ |
309 | */ |
323 | void gxemul_timer_irq_start() |
310 | void gxemul_timer_irq_start(void) |
324 | { |
311 | { |
325 | gxemul_timer_irq_init(); |
312 | gxemul_timer_irq_init(); |
326 | gxemul_timer_start(GXEMUL_TIMER_FREQ); |
313 | gxemul_timer_start(GXEMUL_TIMER_FREQ); |
327 | } |
314 | } |
328 | 315 | ||
329 | - | ||
330 | /** Returns the size of emulated memory. |
316 | /** Returns the size of emulated memory. |
331 | * |
317 | * |
332 | * @return Size in bytes. |
318 | * @return Size in bytes. |
333 | */ |
319 | */ |
334 | size_t gxemul_get_memory_size(void) |
320 | size_t gxemul_get_memory_size(void) |
335 | { |
321 | { |
336 | return *((int*)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET)); |
322 | return *((int *) (GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET)); |
337 | } |
323 | } |
338 | 324 | ||
339 | - | ||
340 | /** Prints a character. |
325 | /** Prints a character. |
341 | * |
326 | * |
342 | * @param ch Character to be printed. |
327 | * @param ch Character to be printed. |
343 | */ |
328 | */ |
344 | void gxemul_debug_putc(char ch) |
329 | void gxemul_debug_putc(char ch) |
Line 351... | Line 336... | ||
351 | } |
336 | } |
352 | 337 | ||
353 | *(addr) = ch; |
338 | *(addr) = ch; |
354 | } |
339 | } |
355 | 340 | ||
356 | - | ||
357 | /** Stops gxemul. */ |
341 | /** Stops gxemul. */ |
358 | void gxemul_cpu_halt(void) |
342 | void gxemul_cpu_halt(void) |
359 | { |
343 | { |
360 | char * addr = 0; |
344 | char * addr = 0; |
361 | if (!hw_map_init_called) { |
345 | if (!hw_map_init_called) { |
Line 365... | Line 349... | ||
365 | } |
349 | } |
366 | 350 | ||
367 | *(addr + GXEMUL_HALT_OFFSET) = '\0'; |
351 | *(addr + GXEMUL_HALT_OFFSET) = '\0'; |
368 | } |
352 | } |
369 | 353 | ||
370 | - | ||
371 | /** Gxemul specific interrupt exception handler. |
354 | /** Gxemul specific interrupt exception handler. |
372 | * |
355 | * |
373 | * Determines sources of the interrupt from interrupt controller and |
356 | * Determines sources of the interrupt from interrupt controller and |
374 | * calls high-level handlers for them. |
357 | * calls high-level handlers for them. |
375 | * |
358 | * |
Line 377... | Line 360... | ||
377 | * @param istate Saved processor state. |
360 | * @param istate Saved processor state. |
378 | */ |
361 | */ |
379 | void gxemul_irq_exception(int exc_no, istate_t *istate) |
362 | void gxemul_irq_exception(int exc_no, istate_t *istate) |
380 | { |
363 | { |
381 | uint32_t sources = gxemul_irqc_get_sources(); |
364 | uint32_t sources = gxemul_irqc_get_sources(); |
382 | int i = 0; |
365 | int i; |
- | 366 | ||
383 | for (; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
367 | for (i = 0; i < GXEMUL_IRQC_MAX_IRQ; i++) { |
384 | if (sources & (1 << i)) { |
368 | if (sources & (1 << i)) { |
385 | irq_t *irq = irq_dispatch_and_lock(i); |
369 | irq_t *irq = irq_dispatch_and_lock(i); |
386 | if (irq) { |
370 | if (irq) { |
387 | /* The IRQ handler was found. */ |
371 | /* The IRQ handler was found. */ |
388 | irq->handler(irq, irq->arg); |
372 | irq->handler(irq, irq->arg); |
389 | spinlock_unlock(&irq->lock); |
373 | spinlock_unlock(&irq->lock); |
390 | } else { |
374 | } else { |
391 | /* Spurious interrupt.*/ |
375 | /* Spurious interrupt.*/ |
392 | dprintf("cpu%d: spurious interrupt (inum=%d)\n", CPU->id, i); |
376 | dprintf("cpu%d: spurious interrupt (inum=%d)\n", |
- | 377 | CPU->id, i); |
|
393 | } |
378 | } |
394 | } |
379 | } |
395 | } |
380 | } |
396 | } |
381 | } |
397 | 382 |