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44 | 44 | ||
45 | #include <arch/debug_print/print.h> |
45 | #include <arch/debug_print/print.h> |
46 | #include <print.h> |
46 | #include <print.h> |
47 | #include <config.h> |
47 | #include <config.h> |
48 | #include <interrupt.h> |
48 | #include <interrupt.h> |
49 | #include <arch/machine.h> |
49 | #include <arch/regutils.h> |
50 | - | ||
- | 50 | //#include <arch/drivers/init.h> |
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- | 51 | #include <userspace.h> |
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51 | bootinfo_t bootinfo; |
52 | bootinfo_t bootinfo; |
52 | 53 | ||
- | 54 | //TODO: Remove include and move into exceptio.c |
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- | 55 | #include <arch/exception.h> |
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- | 56 | ||
- | 57 | #include <syscall/syscall.h> |
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- | 58 | static void tmp_swi_exception(int exc_no, istate_t* istate) |
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- | 59 | { |
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- | 60 | ASSERT(exc_no == EXC_SWI); |
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- | 61 | ASSERT(istate); |
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- | 62 | // TODO: Alf ... remove aftet swi_exception is tested |
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- | 63 | dprintf("\nSWI - istate dump input :\n"); |
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- | 64 | dprintf(" r0:%X r1:%X r2:%X r3:%X\n", istate->r0, istate->r1, istate->r2, istate->r3); |
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- | 65 | dprintf(" r4:%X r5:%X r6:%X r7:%X\n", istate->r4, istate->r5, istate->r6, istate->r7); |
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- | 66 | dprintf(" r8:%X r8:%X r10:%X r11:%X\n", istate->r8, istate->r9, istate->r10, istate->r11); |
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- | 67 | dprintf(" r12:%X r13:%X lr:%X spsr:%X\n", istate->r12, istate->sp, istate->lr, istate->spsr); |
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- | 68 | dprintf(" prev_lr:%X prev_sp:%X\n", istate->r12, istate->prev_lr, istate->prev_sp); |
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- | 69 | // call kernel to serve syscall |
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- | 70 | istate->r0 = syscall_handler( |
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- | 71 | istate->r0, |
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- | 72 | istate->r1, |
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- | 73 | istate->r2, |
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- | 74 | istate->r3, |
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- | 75 | istate->r4); |
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- | 76 | ||
- | 77 | // TODO: Alf ... remove aftet swi_exception is tested |
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- | 78 | dprintf("\nSWI - Istate dump after :\n"); |
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- | 79 | dprintf(" r0:%X r1:%X r2:%X r3:%X\n", istate->r0, istate->r1, istate->r2, istate->r3); |
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- | 80 | dprintf(" r4:%X r5:%X r6:%X r7:%X\n", istate->r4, istate->r5, istate->r6, istate->r7); |
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- | 81 | dprintf(" r8:%X r8:%X r10:%X r11:%X\n", istate->r8, istate->r9, istate->r10, istate->r11); |
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- | 82 | dprintf(" r12:%X r13:%X lr:%X spsr:%X\n", istate->r12, istate->sp, istate->lr, istate->spsr); |
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- | 83 | dprintf(" prev_lr:%X prev_sp:%X\n", istate->r12, istate->prev_lr, istate->prev_sp); |
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- | 84 | } |
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- | 85 | ||
- | 86 | ||
53 | void arch_pre_main(void) |
87 | void arch_pre_main(void) |
54 | { |
88 | { |
55 | dprintf("arch_pre_main\n"); |
89 | dprintf("arch_pre_main\n"); |
56 | int i; |
90 | int i; |
57 | 91 | ||
Line 73... | Line 107... | ||
73 | /* It is not assumed by default */ |
107 | /* It is not assumed by default */ |
74 | interrupts_disable(); |
108 | interrupts_disable(); |
75 | 109 | ||
76 | } |
110 | } |
77 | 111 | ||
- | 112 | void prefetch_exception_generator(void); |
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- | 113 | ||
78 | void arch_post_mm_init(void) |
114 | void arch_post_mm_init(void) |
79 | { |
115 | { |
80 | dprintf("arch_post_mm_init start()\n"); |
116 | dprintf("arch_post_mm_init start()\n"); |
81 | /* Initialize dispatch table |
117 | /* Initialize dispatch table |
82 | Note: Have to be after page_init() */ |
118 | Note: Have to be after page_init() */ |
83 | exception_init(); |
119 | exception_init(); |
84 | 120 | ||
85 | machine_hw_map_init(); |
121 | // drivers_init(); |
86 | interrupt_init(); |
122 | interrupt_init(); |
87 | 123 | ||
88 | console_init(device_assign_devno()); |
124 | // console_init(device_assign_devno()); |
89 | //fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); |
125 | //fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); |
90 | 126 | ||
91 | interrupts_enable(); |
127 | // interrupts_enable(); |
- | 128 | // asm __volatile__ ("ldr pc, =0x70000000"); // prefetch exception |
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92 | // while(1); |
129 | //while(1); |
- | 130 | /* |
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- | 131 | uspace_arg_t uspace; |
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- | 132 | uspace.uspace_entry = (void*)prefetch_exception_generator; |
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- | 133 | uspace.uspace_stack = (void*)0x6000000; |
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- | 134 | uspace.uspace_uarg = &uspace; |
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- | 135 | |
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- | 136 | userspace(&uspace); |
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- | 137 | */ |
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93 | dprintf("arch_post_mm_init end()\n"); |
138 | dprintf("arch_post_mm_init end()\n"); |
94 | } |
139 | } |
95 | 140 | ||
96 | void arch_post_cpu_init(void) |
141 | void arch_post_cpu_init(void) |
97 | { |
142 | { |
Line 123... | Line 168... | ||
123 | void after_thread_ran_arch(void) |
168 | void after_thread_ran_arch(void) |
124 | { |
169 | { |
125 | /* TODO */ |
170 | /* TODO */ |
126 | } |
171 | } |
127 | 172 | ||
- | 173 | /** Struct to hold general purpose register values */ |
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- | 174 | typedef struct { |
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- | 175 | uint32_t r0; |
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- | 176 | uint32_t r1; |
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- | 177 | uint32_t r2; |
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- | 178 | uint32_t r3; |
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- | 179 | uint32_t r4; |
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- | 180 | uint32_t r5; |
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- | 181 | uint32_t r6; |
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- | 182 | uint32_t r7; |
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- | 183 | uint32_t r8; |
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- | 184 | uint32_t r9; |
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- | 185 | uint32_t r10; |
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- | 186 | uint32_t r11; |
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- | 187 | uint32_t r12; |
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- | 188 | uint32_t sp; |
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- | 189 | uint32_t lr; |
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- | 190 | uint32_t pc; |
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- | 191 | } ustate_t; |
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- | 192 | ||
- | 193 | ||
- | 194 | void prefetch_exception_generator(void) { |
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- | 195 | asm __volatile__ ( |
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- | 196 | "ldr pc, =0x7000000" |
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- | 197 | ); |
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- | 198 | ||
- | 199 | } |
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- | 200 | ||
- | 201 | /** Change processor mode and jump into addres specified in |
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- | 202 | * kernel_uarg.uspace_entry |
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- | 203 | * \param kernel_uarg information needed for correct setting of userspace |
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- | 204 | */ |
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- | 205 | void userspace(uspace_arg_t *kernel_uarg) |
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- | 206 | { |
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- | 207 | // WILL be changed .. after exception return .. eret will be done |
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- | 208 | /* |
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- | 209 | volatile ustate_t ustate; |
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- | 210 | dprintf("userspce krnl_uard .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n", |
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- | 211 | (unsigned int)(kernel_uarg->uspace_uarg), |
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- | 212 | kernel_uarg->uspace_entry, |
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- | 213 | kernel_uarg->uspace_stack); |
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- | 214 | // Step 1 ... prepare user space environmen |
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- | 215 | // set first paramater |
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- | 216 | ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg; |
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- | 217 | // clear other registers |
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- | 218 | ustate.r1 = ustate.r2 = ustate.r3 = ustate.r4 = |
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- | 219 | ustate.r5 = ustate.r6 = ustate.r7 = ustate.r8 = |
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- | 220 | ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1; |
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- | 221 | ustate.lr = 3; |
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- | 222 | // set user stack |
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- | 223 | ustate.sp = ((uint32_t)kernel_uarg->uspace_stack)+PAGE_SIZE; |
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- | 224 | // set where uspace executin starts |
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- | 225 | ustate.pc = (uintptr_t) kernel_uarg->uspace_entry; |
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- | 226 | ||
- | 227 | // status register in user mode |
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- | 228 | ipl_t cpsr = current_status_reg_read(); |
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- | 229 | cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE; |
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- | 230 | // |
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- | 231 | ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | ABORT_MODE; |
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- | 232 | ||
- | 233 | asm __volatile__ ( |
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- | 234 | "mov r0, %0 \n" // save pointer into ustate struct |
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- | 235 | "mov r1, %1 \n" // save cspr |
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- | 236 | "msr cpsr_c, %2 \n" // change mode into any exception mode |
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- | 237 | "msr spsr_c, r1 \n" // set saved cpsr ... as user mode |
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- | 238 | "ldmfd r0, {r0-r12, sp, lr, pc}^\n" // jump into user mode |
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- | 239 | : // no output |
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- | 240 | : "r"(&ustate), "r"(cpsr), "r"(tmpsr) // |
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- | 241 | : "r0","r1" |
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- | 242 | ); |
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- | 243 | ||
- | 244 | while(1) |
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- | 245 | ; |
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- | 246 | */ |
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- | 247 | ||
- | 248 | } |
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128 | /** @} |
249 | /** @} |
129 | */ |
250 | */ |
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