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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Ondrej Palkovsky |
2 | * Copyright (c) 2006 Ondrej Palkovsky |
3 | * Copyright (c) 2006 Jakub Jermar |
3 | * Copyright (c) 2006 Jakub Jermar |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | /** @addtogroup genericipc |
30 | /** @addtogroup genericipc |
31 | * @{ |
31 | * @{ |
32 | */ |
32 | */ |
33 | /** |
33 | /** |
34 | * @file |
34 | * @file |
35 | * @brief IRQ notification framework. |
35 | * @brief IRQ notification framework. |
36 | * |
36 | * |
37 | * This framework allows applications to register to receive a notification |
37 | * This framework allows applications to register to receive a notification |
38 | * when interrupt is detected. The application may provide a simple 'top-half' |
38 | * when interrupt is detected. The application may provide a simple 'top-half' |
39 | * handler as part of its registration, which can perform simple operations |
39 | * handler as part of its registration, which can perform simple operations |
40 | * (read/write port/memory, add information to notification ipc message). |
40 | * (read/write port/memory, add information to notification ipc message). |
41 | * |
41 | * |
42 | * The structure of a notification message is as follows: |
42 | * The structure of a notification message is as follows: |
43 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall |
43 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall |
44 | * - ARG1: payload modified by a 'top-half' handler |
44 | * - ARG1: payload modified by a 'top-half' handler |
45 | * - ARG2: payload modified by a 'top-half' handler |
45 | * - ARG2: payload modified by a 'top-half' handler |
46 | * - ARG3: payload modified by a 'top-half' handler |
46 | * - ARG3: payload modified by a 'top-half' handler |
47 | * - ARG4: payload modified by a 'top-half' handler |
47 | * - ARG4: payload modified by a 'top-half' handler |
48 | * - ARG5: payload modified by a 'top-half' handler |
48 | * - ARG5: payload modified by a 'top-half' handler |
49 | * - in_phone_hash: interrupt counter (may be needed to assure correct order |
49 | * - in_phone_hash: interrupt counter (may be needed to assure correct order |
50 | * in multithreaded drivers) |
50 | * in multithreaded drivers) |
51 | * |
51 | * |
52 | * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(), |
52 | * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(), |
53 | * ipc_irq_cleanup() and IRQ handlers: |
53 | * ipc_irq_cleanup() and IRQ handlers: |
54 | * |
54 | * |
55 | * By always taking all of the uspace IRQ hash table lock, IRQ structure lock |
55 | * By always taking all of the uspace IRQ hash table lock, IRQ structure lock |
56 | * and answerbox lock, we can rule out race conditions between the |
56 | * and answerbox lock, we can rule out race conditions between the |
57 | * registration functions and also the cleanup function. Thus the observer can |
57 | * registration functions and also the cleanup function. Thus the observer can |
58 | * either see the IRQ structure present in both the hash table and the |
58 | * either see the IRQ structure present in both the hash table and the |
59 | * answerbox list or absent in both. Views in which the IRQ structure would be |
59 | * answerbox list or absent in both. Views in which the IRQ structure would be |
60 | * linked in the hash table but not in the answerbox list, or vice versa, are |
60 | * linked in the hash table but not in the answerbox list, or vice versa, are |
61 | * not possible. |
61 | * not possible. |
62 | * |
62 | * |
63 | * By always taking the hash table lock and the IRQ structure lock, we can |
63 | * By always taking the hash table lock and the IRQ structure lock, we can |
64 | * rule out a scenario in which we would free up an IRQ structure, which is |
64 | * rule out a scenario in which we would free up an IRQ structure, which is |
65 | * still referenced by, for example, an IRQ handler. The locking scheme forces |
65 | * still referenced by, for example, an IRQ handler. The locking scheme forces |
66 | * us to lock the IRQ structure only after any progressing IRQs on that |
66 | * us to lock the IRQ structure only after any progressing IRQs on that |
67 | * structure are finished. Because we hold the hash table lock, we prevent new |
67 | * structure are finished. Because we hold the hash table lock, we prevent new |
68 | * IRQs from taking new references to the IRQ structure. |
68 | * IRQs from taking new references to the IRQ structure. |
69 | */ |
69 | */ |
70 | 70 | ||
71 | #include <arch.h> |
71 | #include <arch.h> |
72 | #include <mm/slab.h> |
72 | #include <mm/slab.h> |
73 | #include <errno.h> |
73 | #include <errno.h> |
74 | #include <ddi/irq.h> |
74 | #include <ddi/irq.h> |
75 | #include <ipc/ipc.h> |
75 | #include <ipc/ipc.h> |
76 | #include <ipc/irq.h> |
76 | #include <ipc/irq.h> |
77 | #include <syscall/copy.h> |
77 | #include <syscall/copy.h> |
78 | #include <console/console.h> |
78 | #include <console/console.h> |
79 | #include <print.h> |
79 | #include <print.h> |
80 | 80 | ||
81 | /** Free the top-half pseudocode. |
81 | /** Free the top-half pseudocode. |
82 | * |
82 | * |
83 | * @param code Pointer to the top-half pseudocode. |
83 | * @param code Pointer to the top-half pseudocode. |
84 | */ |
84 | */ |
85 | static void code_free(irq_code_t *code) |
85 | static void code_free(irq_code_t *code) |
86 | { |
86 | { |
87 | if (code) { |
87 | if (code) { |
88 | free(code->cmds); |
88 | free(code->cmds); |
89 | free(code); |
89 | free(code); |
90 | } |
90 | } |
91 | } |
91 | } |
92 | 92 | ||
93 | /** Copy the top-half pseudocode from userspace into the kernel. |
93 | /** Copy the top-half pseudocode from userspace into the kernel. |
94 | * |
94 | * |
95 | * @param ucode Userspace address of the top-half pseudocode. |
95 | * @param ucode Userspace address of the top-half pseudocode. |
96 | * |
96 | * |
97 | * @return Kernel address of the copied pseudocode. |
97 | * @return Kernel address of the copied pseudocode. |
98 | */ |
98 | */ |
99 | static irq_code_t *code_from_uspace(irq_code_t *ucode) |
99 | static irq_code_t *code_from_uspace(irq_code_t *ucode) |
100 | { |
100 | { |
101 | irq_code_t *code; |
101 | irq_code_t *code; |
102 | irq_cmd_t *ucmds; |
102 | irq_cmd_t *ucmds; |
103 | int rc; |
103 | int rc; |
104 | 104 | ||
105 | code = malloc(sizeof(*code), 0); |
105 | code = malloc(sizeof(*code), 0); |
106 | rc = copy_from_uspace(code, ucode, sizeof(*code)); |
106 | rc = copy_from_uspace(code, ucode, sizeof(*code)); |
107 | if (rc != 0) { |
107 | if (rc != 0) { |
108 | free(code); |
108 | free(code); |
109 | return NULL; |
109 | return NULL; |
110 | } |
110 | } |
111 | 111 | ||
112 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) { |
112 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) { |
113 | free(code); |
113 | free(code); |
114 | return NULL; |
114 | return NULL; |
115 | } |
115 | } |
116 | ucmds = code->cmds; |
116 | ucmds = code->cmds; |
117 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0); |
117 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0); |
118 | rc = copy_from_uspace(code->cmds, ucmds, |
118 | rc = copy_from_uspace(code->cmds, ucmds, |
119 | sizeof(code->cmds[0]) * code->cmdcount); |
119 | sizeof(code->cmds[0]) * code->cmdcount); |
120 | if (rc != 0) { |
120 | if (rc != 0) { |
121 | free(code->cmds); |
121 | free(code->cmds); |
122 | free(code); |
122 | free(code); |
123 | return NULL; |
123 | return NULL; |
124 | } |
124 | } |
125 | 125 | ||
126 | return code; |
126 | return code; |
127 | } |
127 | } |
128 | 128 | ||
129 | /** Register an answerbox as a receiving end for IRQ notifications. |
129 | /** Register an answerbox as a receiving end for IRQ notifications. |
130 | * |
130 | * |
131 | * @param box Receiving answerbox. |
131 | * @param box Receiving answerbox. |
132 | * @param inr IRQ number. |
132 | * @param inr IRQ number. |
133 | * @param devno Device number. |
133 | * @param devno Device number. |
134 | * @param method Method to be associated with the notification. |
134 | * @param method Method to be associated with the notification. |
135 | * @param ucode Uspace pointer to top-half pseudocode. |
135 | * @param ucode Uspace pointer to top-half pseudocode. |
136 | * |
136 | * |
137 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success. |
137 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success. |
138 | */ |
138 | */ |
139 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno, |
139 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno, |
140 | unative_t method, irq_code_t *ucode) |
140 | unative_t method, irq_code_t *ucode) |
141 | { |
141 | { |
142 | ipl_t ipl; |
142 | ipl_t ipl; |
143 | irq_code_t *code; |
143 | irq_code_t *code; |
144 | irq_t *irq; |
144 | irq_t *irq; |
145 | unative_t key[] = { |
145 | unative_t key[] = { |
146 | (unative_t) inr, |
146 | (unative_t) inr, |
147 | (unative_t) devno |
147 | (unative_t) devno |
148 | }; |
148 | }; |
149 | 149 | ||
150 | if (ucode) { |
150 | if (ucode) { |
151 | code = code_from_uspace(ucode); |
151 | code = code_from_uspace(ucode); |
152 | if (!code) |
152 | if (!code) |
153 | return EBADMEM; |
153 | return EBADMEM; |
154 | } else { |
154 | } else { |
155 | code = NULL; |
155 | code = NULL; |
156 | } |
156 | } |
157 | 157 | ||
158 | /* |
158 | /* |
159 | * Allocate and populate the IRQ structure. |
159 | * Allocate and populate the IRQ structure. |
160 | */ |
160 | */ |
161 | irq = malloc(sizeof(irq_t), 0); |
161 | irq = malloc(sizeof(irq_t), 0); |
162 | irq_initialize(irq); |
162 | irq_initialize(irq); |
163 | irq->devno = devno; |
163 | irq->devno = devno; |
164 | irq->inr = inr; |
164 | irq->inr = inr; |
165 | irq->claim = ipc_irq_top_half_claim; |
165 | irq->claim = ipc_irq_top_half_claim; |
166 | irq->handler = ipc_irq_top_half_handler; |
166 | irq->handler = ipc_irq_top_half_handler; |
167 | irq->notif_cfg.notify = true; |
167 | irq->notif_cfg.notify = true; |
168 | irq->notif_cfg.answerbox = box; |
168 | irq->notif_cfg.answerbox = box; |
169 | irq->notif_cfg.method = method; |
169 | irq->notif_cfg.method = method; |
170 | irq->notif_cfg.code = code; |
170 | irq->notif_cfg.code = code; |
171 | irq->notif_cfg.counter = 0; |
171 | irq->notif_cfg.counter = 0; |
172 | 172 | ||
173 | /* |
173 | /* |
174 | * Enlist the IRQ structure in the uspace IRQ hash table and the |
174 | * Enlist the IRQ structure in the uspace IRQ hash table and the |
175 | * answerbox's list. |
175 | * answerbox's list. |
176 | */ |
176 | */ |
177 | ipl = interrupts_disable(); |
177 | ipl = interrupts_disable(); |
178 | spinlock_lock(&irq_uspace_hash_table_lock); |
178 | spinlock_lock(&irq_uspace_hash_table_lock); |
179 | spinlock_lock(&irq->lock); |
179 | spinlock_lock(&irq->lock); |
180 | spinlock_lock(&box->irq_lock); |
180 | spinlock_lock(&box->irq_lock); |
181 | if (hash_table_find(&irq_uspace_hash_table, key)) { |
181 | if (hash_table_find(&irq_uspace_hash_table, key)) { |
182 | code_free(code); |
182 | code_free(code); |
183 | spinlock_unlock(&box->irq_lock); |
183 | spinlock_unlock(&box->irq_lock); |
184 | spinlock_unlock(&irq->lock); |
184 | spinlock_unlock(&irq->lock); |
185 | spinlock_unlock(&irq_uspace_hash_table_lock); |
185 | spinlock_unlock(&irq_uspace_hash_table_lock); |
186 | free(irq); |
186 | free(irq); |
187 | interrupts_restore(ipl); |
187 | interrupts_restore(ipl); |
188 | return EEXISTS; |
188 | return EEXISTS; |
189 | } |
189 | } |
190 | hash_table_insert(&irq_uspace_hash_table, key, &irq->link); |
190 | hash_table_insert(&irq_uspace_hash_table, key, &irq->link); |
191 | list_append(&irq->notif_cfg.link, &box->irq_head); |
191 | list_append(&irq->notif_cfg.link, &box->irq_head); |
192 | spinlock_unlock(&box->irq_lock); |
192 | spinlock_unlock(&box->irq_lock); |
193 | spinlock_unlock(&irq->lock); |
193 | spinlock_unlock(&irq->lock); |
194 | spinlock_unlock(&irq_uspace_hash_table_lock); |
194 | spinlock_unlock(&irq_uspace_hash_table_lock); |
195 | 195 | ||
196 | interrupts_restore(ipl); |
196 | interrupts_restore(ipl); |
197 | return EOK; |
197 | return EOK; |
198 | } |
198 | } |
199 | 199 | ||
200 | /** Unregister task from IRQ notification. |
200 | /** Unregister task from IRQ notification. |
201 | * |
201 | * |
202 | * @param box Answerbox associated with the notification. |
202 | * @param box Answerbox associated with the notification. |
203 | * @param inr IRQ number. |
203 | * @param inr IRQ number. |
204 | * @param devno Device number. |
204 | * @param devno Device number. |
205 | */ |
205 | */ |
206 | int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno) |
206 | int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno) |
207 | { |
207 | { |
208 | ipl_t ipl; |
208 | ipl_t ipl; |
209 | unative_t key[] = { |
209 | unative_t key[] = { |
210 | (unative_t) inr, |
210 | (unative_t) inr, |
211 | (unative_t) devno |
211 | (unative_t) devno |
212 | }; |
212 | }; |
213 | link_t *lnk; |
213 | link_t *lnk; |
214 | irq_t *irq; |
214 | irq_t *irq; |
215 | 215 | ||
216 | ipl = interrupts_disable(); |
216 | ipl = interrupts_disable(); |
217 | spinlock_lock(&irq_uspace_hash_table_lock); |
217 | spinlock_lock(&irq_uspace_hash_table_lock); |
218 | lnk = hash_table_find(&irq_uspace_hash_table, key); |
218 | lnk = hash_table_find(&irq_uspace_hash_table, key); |
219 | if (!lnk) { |
219 | if (!lnk) { |
220 | spinlock_unlock(&irq_uspace_hash_table_lock); |
220 | spinlock_unlock(&irq_uspace_hash_table_lock); |
221 | interrupts_restore(ipl); |
221 | interrupts_restore(ipl); |
222 | return ENOENT; |
222 | return ENOENT; |
223 | } |
223 | } |
224 | irq = hash_table_get_instance(lnk, irq_t, link); |
224 | irq = hash_table_get_instance(lnk, irq_t, link); |
225 | spinlock_lock(&irq->lock); |
225 | spinlock_lock(&irq->lock); |
226 | spinlock_lock(&box->irq_lock); |
226 | spinlock_lock(&box->irq_lock); |
227 | 227 | ||
228 | ASSERT(irq->notif_cfg.answerbox == box); |
228 | ASSERT(irq->notif_cfg.answerbox == box); |
229 | 229 | ||
230 | /* Free up the pseudo code and associated structures. */ |
230 | /* Free up the pseudo code and associated structures. */ |
231 | code_free(irq->notif_cfg.code); |
231 | code_free(irq->notif_cfg.code); |
232 | 232 | ||
233 | /* Remove the IRQ from the answerbox's list. */ |
233 | /* Remove the IRQ from the answerbox's list. */ |
234 | list_remove(&irq->notif_cfg.link); |
234 | list_remove(&irq->notif_cfg.link); |
235 | 235 | ||
236 | /* Remove the IRQ from the uspace IRQ hash table. */ |
236 | /* Remove the IRQ from the uspace IRQ hash table. */ |
237 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
237 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
238 | 238 | ||
239 | spinlock_unlock(&irq_uspace_hash_table_lock); |
239 | spinlock_unlock(&irq_uspace_hash_table_lock); |
240 | spinlock_unlock(&irq->lock); |
240 | spinlock_unlock(&irq->lock); |
241 | spinlock_unlock(&box->irq_lock); |
241 | spinlock_unlock(&box->irq_lock); |
242 | 242 | ||
243 | /* Free up the IRQ structure. */ |
243 | /* Free up the IRQ structure. */ |
244 | free(irq); |
244 | free(irq); |
245 | 245 | ||
246 | interrupts_restore(ipl); |
246 | interrupts_restore(ipl); |
247 | return EOK; |
247 | return EOK; |
248 | } |
248 | } |
249 | 249 | ||
250 | 250 | ||
251 | /** Disconnect all IRQ notifications from an answerbox. |
251 | /** Disconnect all IRQ notifications from an answerbox. |
252 | * |
252 | * |
253 | * This function is effective because the answerbox contains |
253 | * This function is effective because the answerbox contains |
254 | * list of all irq_t structures that are registered to |
254 | * list of all irq_t structures that are registered to |
255 | * send notifications to it. |
255 | * send notifications to it. |
256 | * |
256 | * |
257 | * @param box Answerbox for which we want to carry out the cleanup. |
257 | * @param box Answerbox for which we want to carry out the cleanup. |
258 | */ |
258 | */ |
259 | void ipc_irq_cleanup(answerbox_t *box) |
259 | void ipc_irq_cleanup(answerbox_t *box) |
260 | { |
260 | { |
261 | ipl_t ipl; |
261 | ipl_t ipl; |
262 | 262 | ||
263 | loop: |
263 | loop: |
264 | ipl = interrupts_disable(); |
264 | ipl = interrupts_disable(); |
265 | spinlock_lock(&irq_uspace_hash_table_lock); |
265 | spinlock_lock(&irq_uspace_hash_table_lock); |
266 | spinlock_lock(&box->irq_lock); |
266 | spinlock_lock(&box->irq_lock); |
267 | 267 | ||
268 | while (box->irq_head.next != &box->irq_head) { |
268 | while (box->irq_head.next != &box->irq_head) { |
269 | link_t *cur = box->irq_head.next; |
269 | link_t *cur = box->irq_head.next; |
270 | irq_t *irq; |
270 | irq_t *irq; |
271 | DEADLOCK_PROBE_INIT(p_irqlock); |
271 | DEADLOCK_PROBE_INIT(p_irqlock); |
272 | unative_t key[2]; |
272 | unative_t key[2]; |
273 | 273 | ||
274 | irq = list_get_instance(cur, irq_t, notif_cfg.link); |
274 | irq = list_get_instance(cur, irq_t, notif_cfg.link); |
275 | if (!spinlock_trylock(&irq->lock)) { |
275 | if (!spinlock_trylock(&irq->lock)) { |
276 | /* |
276 | /* |
277 | * Avoid deadlock by trying again. |
277 | * Avoid deadlock by trying again. |
278 | */ |
278 | */ |
279 | spinlock_unlock(&box->irq_lock); |
279 | spinlock_unlock(&box->irq_lock); |
280 | spinlock_unlock(&irq_uspace_hash_table_lock); |
280 | spinlock_unlock(&irq_uspace_hash_table_lock); |
281 | interrupts_restore(ipl); |
281 | interrupts_restore(ipl); |
282 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD); |
282 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD); |
283 | goto loop; |
283 | goto loop; |
284 | } |
284 | } |
285 | key[0] = irq->inr; |
285 | key[0] = irq->inr; |
286 | key[1] = irq->devno; |
286 | key[1] = irq->devno; |
287 | 287 | ||
288 | 288 | ||
289 | ASSERT(irq->notif_cfg.answerbox == box); |
289 | ASSERT(irq->notif_cfg.answerbox == box); |
290 | 290 | ||
291 | /* Unlist from the answerbox. */ |
291 | /* Unlist from the answerbox. */ |
292 | list_remove(&irq->notif_cfg.link); |
292 | list_remove(&irq->notif_cfg.link); |
293 | 293 | ||
294 | /* Remove from the hash table. */ |
294 | /* Remove from the hash table. */ |
295 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
295 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
296 | 296 | ||
297 | /* Free up the pseudo code and associated structures. */ |
297 | /* Free up the pseudo code and associated structures. */ |
298 | code_free(irq->notif_cfg.code); |
298 | code_free(irq->notif_cfg.code); |
299 | 299 | ||
300 | spinlock_unlock(&irq->lock); |
300 | spinlock_unlock(&irq->lock); |
301 | free(irq); |
301 | free(irq); |
302 | } |
302 | } |
303 | 303 | ||
304 | spinlock_unlock(&box->irq_lock); |
304 | spinlock_unlock(&box->irq_lock); |
305 | spinlock_unlock(&irq_uspace_hash_table_lock); |
305 | spinlock_unlock(&irq_uspace_hash_table_lock); |
306 | interrupts_restore(ipl); |
306 | interrupts_restore(ipl); |
307 | } |
307 | } |
308 | 308 | ||
309 | /** Add a call to the proper answerbox queue. |
309 | /** Add a call to the proper answerbox queue. |
310 | * |
310 | * |
311 | * Assume irq->lock is locked. |
311 | * Assume irq->lock is locked. |
312 | * |
312 | * |
313 | * @param irq IRQ structure referencing the target answerbox. |
313 | * @param irq IRQ structure referencing the target answerbox. |
314 | * @param call IRQ notification call. |
314 | * @param call IRQ notification call. |
315 | */ |
315 | */ |
316 | static void send_call(irq_t *irq, call_t *call) |
316 | static void send_call(irq_t *irq, call_t *call) |
317 | { |
317 | { |
318 | spinlock_lock(&irq->notif_cfg.answerbox->irq_lock); |
318 | spinlock_lock(&irq->notif_cfg.answerbox->irq_lock); |
319 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs); |
319 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs); |
320 | spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock); |
320 | spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock); |
321 | 321 | ||
322 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST); |
322 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST); |
323 | } |
323 | } |
324 | 324 | ||
325 | /** Apply the top-half pseudo code to find out whether to accept the IRQ or not. |
325 | /** Apply the top-half pseudo code to find out whether to accept the IRQ or not. |
326 | * |
326 | * |
327 | * @param irq IRQ structure. |
327 | * @param irq IRQ structure. |
328 | * |
328 | * |
329 | * @return IRQ_ACCEPT if the interrupt is accepted by the |
329 | * @return IRQ_ACCEPT if the interrupt is accepted by the |
330 | * pseudocode. IRQ_DECLINE otherwise. |
330 | * pseudocode. IRQ_DECLINE otherwise. |
331 | */ |
331 | */ |
332 | irq_ownership_t ipc_irq_top_half_claim(irq_t *irq) |
332 | irq_ownership_t ipc_irq_top_half_claim(irq_t *irq) |
333 | { |
333 | { |
334 | unsigned int i; |
334 | unsigned int i; |
335 | unative_t dstval; |
335 | unative_t dstval; |
336 | irq_code_t *code = irq->notif_cfg.code; |
336 | irq_code_t *code = irq->notif_cfg.code; |
337 | unative_t *scratch = irq->notif_cfg.scratch; |
337 | unative_t *scratch = irq->notif_cfg.scratch; |
338 | 338 | ||
339 | 339 | ||
340 | if (!irq->notif_cfg.notify) |
340 | if (!irq->notif_cfg.notify) |
341 | return IRQ_DECLINE; |
341 | return IRQ_DECLINE; |
342 | 342 | ||
343 | if (!code) |
343 | if (!code) |
344 | return IRQ_DECLINE; |
344 | return IRQ_DECLINE; |
345 | 345 | ||
346 | for (i = 0; i < code->cmdcount; i++) { |
346 | for (i = 0; i < code->cmdcount; i++) { |
347 | unsigned int srcarg = code->cmds[i].srcarg; |
347 | unsigned int srcarg = code->cmds[i].srcarg; |
348 | unsigned int dstarg = code->cmds[i].dstarg; |
348 | unsigned int dstarg = code->cmds[i].dstarg; |
349 | 349 | ||
350 | if (srcarg >= IPC_CALL_LEN) |
350 | if (srcarg >= IPC_CALL_LEN) |
351 | break; |
351 | break; |
352 | if (dstarg >= IPC_CALL_LEN) |
352 | if (dstarg >= IPC_CALL_LEN) |
353 | break; |
353 | break; |
354 | 354 | ||
355 | switch (code->cmds[i].cmd) { |
355 | switch (code->cmds[i].cmd) { |
356 | case CMD_PIO_READ_8: |
356 | case CMD_PIO_READ_8: |
357 | dstval = pio_read_8((ioport8_t *) code->cmds[i].addr); |
357 | dstval = pio_read_8((ioport8_t *) code->cmds[i].addr); |
358 | if (dstarg) |
358 | if (dstarg) |
359 | scratch[dstarg] = dstval; |
359 | scratch[dstarg] = dstval; |
360 | break; |
360 | break; |
361 | case CMD_PIO_READ_16: |
361 | case CMD_PIO_READ_16: |
362 | dstval = pio_read_16((ioport16_t *) code->cmds[i].addr); |
362 | dstval = pio_read_16((ioport16_t *) code->cmds[i].addr); |
363 | if (dstarg) |
363 | if (dstarg) |
364 | scratch[dstarg] = dstval; |
364 | scratch[dstarg] = dstval; |
365 | break; |
365 | break; |
366 | case CMD_PIO_READ_32: |
366 | case CMD_PIO_READ_32: |
367 | dstval = pio_read_32((ioport32_t *) code->cmds[i].addr); |
367 | dstval = pio_read_32((ioport32_t *) code->cmds[i].addr); |
368 | if (dstarg) |
368 | if (dstarg) |
369 | scratch[dstarg] = dstval; |
369 | scratch[dstarg] = dstval; |
370 | break; |
370 | break; |
371 | case CMD_PIO_WRITE_8: |
371 | case CMD_PIO_WRITE_8: |
372 | pio_write_8((ioport8_t *) code->cmds[i].addr, |
372 | pio_write_8((ioport8_t *) code->cmds[i].addr, |
373 | (uint8_t) code->cmds[i].value); |
373 | (uint8_t) code->cmds[i].value); |
374 | break; |
374 | break; |
375 | case CMD_PIO_WRITE_16: |
375 | case CMD_PIO_WRITE_16: |
376 | pio_write_16((ioport16_t *) code->cmds[i].addr, |
376 | pio_write_16((ioport16_t *) code->cmds[i].addr, |
377 | (uint16_t) code->cmds[i].value); |
377 | (uint16_t) code->cmds[i].value); |
378 | break; |
378 | break; |
379 | case CMD_PIO_WRITE_32: |
379 | case CMD_PIO_WRITE_32: |
380 | pio_write_32((ioport32_t *) code->cmds[i].addr, |
380 | pio_write_32((ioport32_t *) code->cmds[i].addr, |
381 | (uint32_t) code->cmds[i].value); |
381 | (uint32_t) code->cmds[i].value); |
382 | break; |
382 | break; |
383 | case CMD_BTEST: |
383 | case CMD_BTEST: |
384 | if (srcarg && dstarg) { |
384 | if (srcarg && dstarg) { |
385 | dstval = scratch[srcarg] & code->cmds[i].value; |
385 | dstval = scratch[srcarg] & code->cmds[i].value; |
386 | scratch[dstarg] = dstval; |
386 | scratch[dstarg] = dstval; |
387 | } |
387 | } |
388 | break; |
388 | break; |
389 | case CMD_PREDICATE: |
389 | case CMD_PREDICATE: |
390 | if (srcarg && !scratch[srcarg]) { |
390 | if (srcarg && !scratch[srcarg]) { |
391 | i += code->cmds[i].value; |
391 | i += code->cmds[i].value; |
392 | continue; |
392 | continue; |
393 | } |
393 | } |
394 | break; |
394 | break; |
395 | case CMD_ACCEPT: |
395 | case CMD_ACCEPT: |
396 | return IRQ_ACCEPT; |
396 | return IRQ_ACCEPT; |
397 | break; |
397 | break; |
398 | case CMD_DECLINE: |
398 | case CMD_DECLINE: |
399 | default: |
399 | default: |
400 | return IRQ_DECLINE; |
400 | return IRQ_DECLINE; |
401 | } |
401 | } |
402 | } |
402 | } |
403 | 403 | ||
404 | return IRQ_DECLINE; |
404 | return IRQ_DECLINE; |
405 | } |
405 | } |
406 | 406 | ||
407 | 407 | ||
408 | /* IRQ top-half handler. |
408 | /* IRQ top-half handler. |
409 | * |
409 | * |
410 | * We expect interrupts to be disabled and the irq->lock already held. |
410 | * We expect interrupts to be disabled and the irq->lock already held. |
411 | * |
411 | * |
412 | * @param irq IRQ structure. |
412 | * @param irq IRQ structure. |
413 | */ |
413 | */ |
414 | void ipc_irq_top_half_handler(irq_t *irq) |
414 | void ipc_irq_top_half_handler(irq_t *irq) |
415 | { |
415 | { |
416 | ASSERT(irq); |
416 | ASSERT(irq); |
417 | 417 | ||
418 | if (irq->notif_cfg.answerbox) { |
418 | if (irq->notif_cfg.answerbox) { |
419 | call_t *call; |
419 | call_t *call; |
420 | 420 | ||
421 | call = ipc_call_alloc(FRAME_ATOMIC); |
421 | call = ipc_call_alloc(FRAME_ATOMIC); |
422 | if (!call) |
422 | if (!call) |
423 | return; |
423 | return; |
424 | 424 | ||
425 | call->flags |= IPC_CALL_NOTIF; |
425 | call->flags |= IPC_CALL_NOTIF; |
426 | /* Put a counter to the message */ |
426 | /* Put a counter to the message */ |
427 | call->priv = ++irq->notif_cfg.counter; |
427 | call->priv = ++irq->notif_cfg.counter; |
428 | 428 | ||
429 | /* Set up args */ |
429 | /* Set up args */ |
430 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
430 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
431 | IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]); |
431 | IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]); |
432 | IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]); |
432 | IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]); |
433 | IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]); |
433 | IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]); |
434 | IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]); |
434 | IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]); |
435 | IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]); |
435 | IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]); |
436 | 436 | ||
437 | send_call(irq, call); |
437 | send_call(irq, call); |
438 | } |
438 | } |
439 | } |
439 | } |
440 | 440 | ||
441 | /** Send notification message. |
441 | /** Send notification message. |
442 | * |
442 | * |
443 | * @param irq IRQ structure. |
443 | * @param irq IRQ structure. |
444 | * @param a1 Driver-specific payload argument. |
444 | * @param a1 Driver-specific payload argument. |
445 | * @param a2 Driver-specific payload argument. |
445 | * @param a2 Driver-specific payload argument. |
446 | * @param a3 Driver-specific payload argument. |
446 | * @param a3 Driver-specific payload argument. |
447 | * @param a4 Driver-specific payload argument. |
447 | * @param a4 Driver-specific payload argument. |
448 | * @param a5 Driver-specific payload argument. |
448 | * @param a5 Driver-specific payload argument. |
449 | */ |
449 | */ |
450 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3, |
450 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3, |
451 | unative_t a4, unative_t a5) |
451 | unative_t a4, unative_t a5) |
452 | { |
452 | { |
453 | call_t *call; |
453 | call_t *call; |
454 | 454 | ||
455 | spinlock_lock(&irq->lock); |
455 | spinlock_lock(&irq->lock); |
456 | 456 | ||
457 | if (irq->notif_cfg.answerbox) { |
457 | if (irq->notif_cfg.answerbox) { |
458 | call = ipc_call_alloc(FRAME_ATOMIC); |
458 | call = ipc_call_alloc(FRAME_ATOMIC); |
459 | if (!call) { |
459 | if (!call) { |
460 | spinlock_unlock(&irq->lock); |
460 | spinlock_unlock(&irq->lock); |
461 | return; |
461 | return; |
462 | } |
462 | } |
463 | call->flags |= IPC_CALL_NOTIF; |
463 | call->flags |= IPC_CALL_NOTIF; |
464 | /* Put a counter to the message */ |
464 | /* Put a counter to the message */ |
465 | call->priv = ++irq->notif_cfg.counter; |
465 | call->priv = ++irq->notif_cfg.counter; |
466 | 466 | ||
467 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
467 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
468 | IPC_SET_ARG1(call->data, a1); |
468 | IPC_SET_ARG1(call->data, a1); |
469 | IPC_SET_ARG2(call->data, a2); |
469 | IPC_SET_ARG2(call->data, a2); |
470 | IPC_SET_ARG3(call->data, a3); |
470 | IPC_SET_ARG3(call->data, a3); |
471 | IPC_SET_ARG4(call->data, a4); |
471 | IPC_SET_ARG4(call->data, a4); |
472 | IPC_SET_ARG5(call->data, a5); |
472 | IPC_SET_ARG5(call->data, a5); |
473 | 473 | ||
474 | send_call(irq, call); |
474 | send_call(irq, call); |
475 | } |
475 | } |
476 | spinlock_unlock(&irq->lock); |
476 | spinlock_unlock(&irq->lock); |
477 | } |
477 | } |
478 | 478 | ||
479 | /** @} |
479 | /** @} |
480 | */ |
480 | */ |
481 | 481 |