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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Ondrej Palkovsky |
2 | * Copyright (c) 2006 Ondrej Palkovsky |
3 | * Copyright (c) 2006 Jakub Jermar |
3 | * Copyright (c) 2006 Jakub Jermar |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | /** @addtogroup genericipc |
30 | /** @addtogroup genericipc |
31 | * @{ |
31 | * @{ |
32 | */ |
32 | */ |
33 | /** |
33 | /** |
34 | * @file |
34 | * @file |
35 | * @brief IRQ notification framework. |
35 | * @brief IRQ notification framework. |
36 | * |
36 | * |
37 | * This framework allows applications to register to receive a notification |
37 | * This framework allows applications to register to receive a notification |
38 | * when interrupt is detected. The application may provide a simple 'top-half' |
38 | * when interrupt is detected. The application may provide a simple 'top-half' |
39 | * handler as part of its registration, which can perform simple operations |
39 | * handler as part of its registration, which can perform simple operations |
40 | * (read/write port/memory, add information to notification ipc message). |
40 | * (read/write port/memory, add information to notification ipc message). |
41 | * |
41 | * |
42 | * The structure of a notification message is as follows: |
42 | * The structure of a notification message is as follows: |
43 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall |
43 | * - METHOD: method as registered by the SYS_IPC_REGISTER_IRQ syscall |
44 | * - ARG1: payload modified by a 'top-half' handler |
44 | * - ARG1: payload modified by a 'top-half' handler |
45 | * - ARG2: payload modified by a 'top-half' handler |
45 | * - ARG2: payload modified by a 'top-half' handler |
46 | * - ARG3: payload modified by a 'top-half' handler |
46 | * - ARG3: payload modified by a 'top-half' handler |
47 | * - ARG4: payload modified by a 'top-half' handler |
47 | * - ARG4: payload modified by a 'top-half' handler |
48 | * - ARG5: payload modified by a 'top-half' handler |
48 | * - ARG5: payload modified by a 'top-half' handler |
49 | * - in_phone_hash: interrupt counter (may be needed to assure correct order |
49 | * - in_phone_hash: interrupt counter (may be needed to assure correct order |
50 | * in multithreaded drivers) |
50 | * in multithreaded drivers) |
51 | * |
51 | * |
52 | * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(), |
52 | * Note on synchronization for ipc_irq_register(), ipc_irq_unregister(), |
53 | * ipc_irq_cleanup() and IRQ handlers: |
53 | * ipc_irq_cleanup() and IRQ handlers: |
54 | * |
54 | * |
55 | * By always taking all of the uspace IRQ hash table lock, IRQ structure lock |
55 | * By always taking all of the uspace IRQ hash table lock, IRQ structure lock |
56 | * and answerbox lock, we can rule out race conditions between the |
56 | * and answerbox lock, we can rule out race conditions between the |
57 | * registration functions and also the cleanup function. Thus the observer can |
57 | * registration functions and also the cleanup function. Thus the observer can |
58 | * either see the IRQ structure present in both the hash table and the |
58 | * either see the IRQ structure present in both the hash table and the |
59 | * answerbox list or absent in both. Views in which the IRQ structure would be |
59 | * answerbox list or absent in both. Views in which the IRQ structure would be |
60 | * linked in the hash table but not in the answerbox list, or vice versa, are |
60 | * linked in the hash table but not in the answerbox list, or vice versa, are |
61 | * not possible. |
61 | * not possible. |
62 | * |
62 | * |
63 | * By always taking the hash table lock and the IRQ structure lock, we can |
63 | * By always taking the hash table lock and the IRQ structure lock, we can |
64 | * rule out a scenario in which we would free up an IRQ structure, which is |
64 | * rule out a scenario in which we would free up an IRQ structure, which is |
65 | * still referenced by, for example, an IRQ handler. The locking scheme forces |
65 | * still referenced by, for example, an IRQ handler. The locking scheme forces |
66 | * us to lock the IRQ structure only after any progressing IRQs on that |
66 | * us to lock the IRQ structure only after any progressing IRQs on that |
67 | * structure are finished. Because we hold the hash table lock, we prevent new |
67 | * structure are finished. Because we hold the hash table lock, we prevent new |
68 | * IRQs from taking new references to the IRQ structure. |
68 | * IRQs from taking new references to the IRQ structure. |
69 | */ |
69 | */ |
70 | 70 | ||
71 | #include <arch.h> |
71 | #include <arch.h> |
72 | #include <mm/slab.h> |
72 | #include <mm/slab.h> |
73 | #include <errno.h> |
73 | #include <errno.h> |
74 | #include <ddi/irq.h> |
74 | #include <ddi/irq.h> |
75 | #include <ipc/ipc.h> |
75 | #include <ipc/ipc.h> |
76 | #include <ipc/irq.h> |
76 | #include <ipc/irq.h> |
77 | #include <syscall/copy.h> |
77 | #include <syscall/copy.h> |
78 | #include <console/console.h> |
78 | #include <console/console.h> |
79 | #include <print.h> |
79 | #include <print.h> |
80 | 80 | ||
81 | /** Free the top-half pseudocode. |
81 | /** Free the top-half pseudocode. |
82 | * |
82 | * |
83 | * @param code Pointer to the top-half pseudocode. |
83 | * @param code Pointer to the top-half pseudocode. |
84 | */ |
84 | */ |
85 | static void code_free(irq_code_t *code) |
85 | static void code_free(irq_code_t *code) |
86 | { |
86 | { |
87 | if (code) { |
87 | if (code) { |
88 | free(code->cmds); |
88 | free(code->cmds); |
89 | free(code); |
89 | free(code); |
90 | } |
90 | } |
91 | } |
91 | } |
92 | 92 | ||
93 | /** Copy the top-half pseudocode from userspace into the kernel. |
93 | /** Copy the top-half pseudocode from userspace into the kernel. |
94 | * |
94 | * |
95 | * @param ucode Userspace address of the top-half pseudocode. |
95 | * @param ucode Userspace address of the top-half pseudocode. |
96 | * |
96 | * |
97 | * @return Kernel address of the copied pseudocode. |
97 | * @return Kernel address of the copied pseudocode. |
98 | */ |
98 | */ |
99 | static irq_code_t *code_from_uspace(irq_code_t *ucode) |
99 | static irq_code_t *code_from_uspace(irq_code_t *ucode) |
100 | { |
100 | { |
101 | irq_code_t *code; |
101 | irq_code_t *code; |
102 | irq_cmd_t *ucmds; |
102 | irq_cmd_t *ucmds; |
103 | int rc; |
103 | int rc; |
104 | 104 | ||
105 | code = malloc(sizeof(*code), 0); |
105 | code = malloc(sizeof(*code), 0); |
106 | rc = copy_from_uspace(code, ucode, sizeof(*code)); |
106 | rc = copy_from_uspace(code, ucode, sizeof(*code)); |
107 | if (rc != 0) { |
107 | if (rc != 0) { |
108 | free(code); |
108 | free(code); |
109 | return NULL; |
109 | return NULL; |
110 | } |
110 | } |
111 | 111 | ||
112 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) { |
112 | if (code->cmdcount > IRQ_MAX_PROG_SIZE) { |
113 | free(code); |
113 | free(code); |
114 | return NULL; |
114 | return NULL; |
115 | } |
115 | } |
116 | ucmds = code->cmds; |
116 | ucmds = code->cmds; |
117 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0); |
117 | code->cmds = malloc(sizeof(code->cmds[0]) * code->cmdcount, 0); |
118 | rc = copy_from_uspace(code->cmds, ucmds, |
118 | rc = copy_from_uspace(code->cmds, ucmds, |
119 | sizeof(code->cmds[0]) * code->cmdcount); |
119 | sizeof(code->cmds[0]) * code->cmdcount); |
120 | if (rc != 0) { |
120 | if (rc != 0) { |
121 | free(code->cmds); |
121 | free(code->cmds); |
122 | free(code); |
122 | free(code); |
123 | return NULL; |
123 | return NULL; |
124 | } |
124 | } |
125 | 125 | ||
126 | return code; |
126 | return code; |
127 | } |
127 | } |
128 | 128 | ||
129 | /** Register an answerbox as a receiving end for IRQ notifications. |
129 | /** Register an answerbox as a receiving end for IRQ notifications. |
130 | * |
130 | * |
131 | * @param box Receiving answerbox. |
131 | * @param box Receiving answerbox. |
132 | * @param inr IRQ number. |
132 | * @param inr IRQ number. |
133 | * @param devno Device number. |
133 | * @param devno Device number. |
134 | * @param method Method to be associated with the notification. |
134 | * @param method Method to be associated with the notification. |
135 | * @param ucode Uspace pointer to top-half pseudocode. |
135 | * @param ucode Uspace pointer to top-half pseudocode. |
136 | * |
136 | * |
137 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success. |
137 | * @return EBADMEM, ENOENT or EEXISTS on failure or 0 on success. |
138 | */ |
138 | */ |
139 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno, |
139 | int ipc_irq_register(answerbox_t *box, inr_t inr, devno_t devno, |
140 | unative_t method, irq_code_t *ucode) |
140 | unative_t method, irq_code_t *ucode) |
141 | { |
141 | { |
142 | ipl_t ipl; |
142 | ipl_t ipl; |
143 | irq_code_t *code; |
143 | irq_code_t *code; |
144 | irq_t *irq; |
144 | irq_t *irq; |
- | 145 | link_t *hlp; |
|
145 | unative_t key[] = { |
146 | unative_t key[] = { |
146 | (unative_t) inr, |
147 | (unative_t) inr, |
147 | (unative_t) devno |
148 | (unative_t) devno |
148 | }; |
149 | }; |
149 | 150 | ||
150 | if (ucode) { |
151 | if (ucode) { |
151 | code = code_from_uspace(ucode); |
152 | code = code_from_uspace(ucode); |
152 | if (!code) |
153 | if (!code) |
153 | return EBADMEM; |
154 | return EBADMEM; |
154 | } else { |
155 | } else { |
155 | code = NULL; |
156 | code = NULL; |
156 | } |
157 | } |
157 | 158 | ||
158 | /* |
159 | /* |
159 | * Allocate and populate the IRQ structure. |
160 | * Allocate and populate the IRQ structure. |
160 | */ |
161 | */ |
161 | irq = malloc(sizeof(irq_t), 0); |
162 | irq = malloc(sizeof(irq_t), 0); |
162 | irq_initialize(irq); |
163 | irq_initialize(irq); |
163 | irq->devno = devno; |
164 | irq->devno = devno; |
164 | irq->inr = inr; |
165 | irq->inr = inr; |
165 | irq->claim = ipc_irq_top_half_claim; |
166 | irq->claim = ipc_irq_top_half_claim; |
166 | irq->handler = ipc_irq_top_half_handler; |
167 | irq->handler = ipc_irq_top_half_handler; |
167 | irq->notif_cfg.notify = true; |
168 | irq->notif_cfg.notify = true; |
168 | irq->notif_cfg.answerbox = box; |
169 | irq->notif_cfg.answerbox = box; |
169 | irq->notif_cfg.method = method; |
170 | irq->notif_cfg.method = method; |
170 | irq->notif_cfg.code = code; |
171 | irq->notif_cfg.code = code; |
171 | irq->notif_cfg.counter = 0; |
172 | irq->notif_cfg.counter = 0; |
172 | 173 | ||
173 | /* |
174 | /* |
174 | * Enlist the IRQ structure in the uspace IRQ hash table and the |
175 | * Enlist the IRQ structure in the uspace IRQ hash table and the |
175 | * answerbox's list. |
176 | * answerbox's list. |
176 | */ |
177 | */ |
177 | ipl = interrupts_disable(); |
178 | ipl = interrupts_disable(); |
178 | spinlock_lock(&irq_uspace_hash_table_lock); |
179 | spinlock_lock(&irq_uspace_hash_table_lock); |
- | 180 | hlp = hash_table_find(&irq_uspace_hash_table, key); |
|
- | 181 | if (hlp) { |
|
- | 182 | irq_t *hirq = hash_table_get_instance(hlp, irq_t, link); |
|
179 | spinlock_lock(&irq->lock); |
183 | /* hirq is locked */ |
180 | spinlock_lock(&box->irq_lock); |
184 | spinlock_unlock(&hirq->lock); |
181 | if (hash_table_find(&irq_uspace_hash_table, key)) { |
- | |
182 | code_free(code); |
185 | code_free(code); |
183 | spinlock_unlock(&box->irq_lock); |
- | |
184 | spinlock_unlock(&irq->lock); |
- | |
185 | spinlock_unlock(&irq_uspace_hash_table_lock); |
186 | spinlock_unlock(&irq_uspace_hash_table_lock); |
186 | free(irq); |
187 | free(irq); |
187 | interrupts_restore(ipl); |
188 | interrupts_restore(ipl); |
188 | return EEXISTS; |
189 | return EEXISTS; |
189 | } |
190 | } |
- | 191 | spinlock_lock(&irq->lock); /* not really necessary, but paranoid */ |
|
- | 192 | spinlock_lock(&box->irq_lock); |
|
190 | hash_table_insert(&irq_uspace_hash_table, key, &irq->link); |
193 | hash_table_insert(&irq_uspace_hash_table, key, &irq->link); |
191 | list_append(&irq->notif_cfg.link, &box->irq_head); |
194 | list_append(&irq->notif_cfg.link, &box->irq_head); |
192 | spinlock_unlock(&box->irq_lock); |
195 | spinlock_unlock(&box->irq_lock); |
193 | spinlock_unlock(&irq->lock); |
196 | spinlock_unlock(&irq->lock); |
194 | spinlock_unlock(&irq_uspace_hash_table_lock); |
197 | spinlock_unlock(&irq_uspace_hash_table_lock); |
195 | 198 | ||
196 | interrupts_restore(ipl); |
199 | interrupts_restore(ipl); |
197 | return EOK; |
200 | return EOK; |
198 | } |
201 | } |
199 | 202 | ||
200 | /** Unregister task from IRQ notification. |
203 | /** Unregister task from IRQ notification. |
201 | * |
204 | * |
202 | * @param box Answerbox associated with the notification. |
205 | * @param box Answerbox associated with the notification. |
203 | * @param inr IRQ number. |
206 | * @param inr IRQ number. |
204 | * @param devno Device number. |
207 | * @param devno Device number. |
205 | */ |
208 | */ |
206 | int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno) |
209 | int ipc_irq_unregister(answerbox_t *box, inr_t inr, devno_t devno) |
207 | { |
210 | { |
208 | ipl_t ipl; |
211 | ipl_t ipl; |
209 | unative_t key[] = { |
212 | unative_t key[] = { |
210 | (unative_t) inr, |
213 | (unative_t) inr, |
211 | (unative_t) devno |
214 | (unative_t) devno |
212 | }; |
215 | }; |
213 | link_t *lnk; |
216 | link_t *lnk; |
214 | irq_t *irq; |
217 | irq_t *irq; |
215 | 218 | ||
216 | ipl = interrupts_disable(); |
219 | ipl = interrupts_disable(); |
217 | spinlock_lock(&irq_uspace_hash_table_lock); |
220 | spinlock_lock(&irq_uspace_hash_table_lock); |
218 | lnk = hash_table_find(&irq_uspace_hash_table, key); |
221 | lnk = hash_table_find(&irq_uspace_hash_table, key); |
219 | if (!lnk) { |
222 | if (!lnk) { |
220 | spinlock_unlock(&irq_uspace_hash_table_lock); |
223 | spinlock_unlock(&irq_uspace_hash_table_lock); |
221 | interrupts_restore(ipl); |
224 | interrupts_restore(ipl); |
222 | return ENOENT; |
225 | return ENOENT; |
223 | } |
226 | } |
224 | irq = hash_table_get_instance(lnk, irq_t, link); |
227 | irq = hash_table_get_instance(lnk, irq_t, link); |
225 | spinlock_lock(&irq->lock); |
228 | /* irq is locked */ |
226 | spinlock_lock(&box->irq_lock); |
229 | spinlock_lock(&box->irq_lock); |
227 | 230 | ||
228 | ASSERT(irq->notif_cfg.answerbox == box); |
231 | ASSERT(irq->notif_cfg.answerbox == box); |
229 | 232 | ||
230 | /* Free up the pseudo code and associated structures. */ |
233 | /* Free up the pseudo code and associated structures. */ |
231 | code_free(irq->notif_cfg.code); |
234 | code_free(irq->notif_cfg.code); |
232 | 235 | ||
233 | /* Remove the IRQ from the answerbox's list. */ |
236 | /* Remove the IRQ from the answerbox's list. */ |
234 | list_remove(&irq->notif_cfg.link); |
237 | list_remove(&irq->notif_cfg.link); |
235 | 238 | ||
- | 239 | /* |
|
- | 240 | * We need to drop the IRQ lock now because hash_table_remove() will try |
|
- | 241 | * to reacquire it. That basically violates the natural locking order, |
|
- | 242 | * but a deadlock in hash_table_remove() is prevented by the fact that |
|
- | 243 | * we already held the IRQ lock and didn't drop the hash table lock in |
|
- | 244 | * the meantime. |
|
- | 245 | */ |
|
- | 246 | spinlock_unlock(&irq->lock); |
|
- | 247 | ||
236 | /* Remove the IRQ from the uspace IRQ hash table. */ |
248 | /* Remove the IRQ from the uspace IRQ hash table. */ |
237 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
249 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
238 | 250 | ||
239 | spinlock_unlock(&irq_uspace_hash_table_lock); |
251 | spinlock_unlock(&irq_uspace_hash_table_lock); |
240 | spinlock_unlock(&irq->lock); |
- | |
241 | spinlock_unlock(&box->irq_lock); |
252 | spinlock_unlock(&box->irq_lock); |
242 | 253 | ||
243 | /* Free up the IRQ structure. */ |
254 | /* Free up the IRQ structure. */ |
244 | free(irq); |
255 | free(irq); |
245 | 256 | ||
246 | interrupts_restore(ipl); |
257 | interrupts_restore(ipl); |
247 | return EOK; |
258 | return EOK; |
248 | } |
259 | } |
249 | 260 | ||
250 | 261 | ||
251 | /** Disconnect all IRQ notifications from an answerbox. |
262 | /** Disconnect all IRQ notifications from an answerbox. |
252 | * |
263 | * |
253 | * This function is effective because the answerbox contains |
264 | * This function is effective because the answerbox contains |
254 | * list of all irq_t structures that are registered to |
265 | * list of all irq_t structures that are registered to |
255 | * send notifications to it. |
266 | * send notifications to it. |
256 | * |
267 | * |
257 | * @param box Answerbox for which we want to carry out the cleanup. |
268 | * @param box Answerbox for which we want to carry out the cleanup. |
258 | */ |
269 | */ |
259 | void ipc_irq_cleanup(answerbox_t *box) |
270 | void ipc_irq_cleanup(answerbox_t *box) |
260 | { |
271 | { |
261 | ipl_t ipl; |
272 | ipl_t ipl; |
262 | 273 | ||
263 | loop: |
274 | loop: |
264 | ipl = interrupts_disable(); |
275 | ipl = interrupts_disable(); |
265 | spinlock_lock(&irq_uspace_hash_table_lock); |
276 | spinlock_lock(&irq_uspace_hash_table_lock); |
266 | spinlock_lock(&box->irq_lock); |
277 | spinlock_lock(&box->irq_lock); |
267 | 278 | ||
268 | while (box->irq_head.next != &box->irq_head) { |
279 | while (box->irq_head.next != &box->irq_head) { |
269 | link_t *cur = box->irq_head.next; |
280 | link_t *cur = box->irq_head.next; |
270 | irq_t *irq; |
281 | irq_t *irq; |
271 | DEADLOCK_PROBE_INIT(p_irqlock); |
282 | DEADLOCK_PROBE_INIT(p_irqlock); |
272 | unative_t key[2]; |
283 | unative_t key[2]; |
273 | 284 | ||
274 | irq = list_get_instance(cur, irq_t, notif_cfg.link); |
285 | irq = list_get_instance(cur, irq_t, notif_cfg.link); |
275 | if (!spinlock_trylock(&irq->lock)) { |
286 | if (!spinlock_trylock(&irq->lock)) { |
276 | /* |
287 | /* |
277 | * Avoid deadlock by trying again. |
288 | * Avoid deadlock by trying again. |
278 | */ |
289 | */ |
279 | spinlock_unlock(&box->irq_lock); |
290 | spinlock_unlock(&box->irq_lock); |
280 | spinlock_unlock(&irq_uspace_hash_table_lock); |
291 | spinlock_unlock(&irq_uspace_hash_table_lock); |
281 | interrupts_restore(ipl); |
292 | interrupts_restore(ipl); |
282 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD); |
293 | DEADLOCK_PROBE(p_irqlock, DEADLOCK_THRESHOLD); |
283 | goto loop; |
294 | goto loop; |
284 | } |
295 | } |
285 | key[0] = irq->inr; |
296 | key[0] = irq->inr; |
286 | key[1] = irq->devno; |
297 | key[1] = irq->devno; |
287 | 298 | ||
288 | 299 | ||
289 | ASSERT(irq->notif_cfg.answerbox == box); |
300 | ASSERT(irq->notif_cfg.answerbox == box); |
290 | 301 | ||
291 | /* Unlist from the answerbox. */ |
302 | /* Unlist from the answerbox. */ |
292 | list_remove(&irq->notif_cfg.link); |
303 | list_remove(&irq->notif_cfg.link); |
293 | 304 | ||
294 | /* Free up the pseudo code and associated structures. */ |
305 | /* Free up the pseudo code and associated structures. */ |
295 | code_free(irq->notif_cfg.code); |
306 | code_free(irq->notif_cfg.code); |
296 | 307 | ||
- | 308 | /* |
|
- | 309 | * We need to drop the IRQ lock now because hash_table_remove() |
|
- | 310 | * will try to reacquire it. That basically violates the natural |
|
- | 311 | * locking order, but a deadlock in hash_table_remove() is |
|
- | 312 | * prevented by the fact that we already held the IRQ lock and |
|
- | 313 | * didn't drop the hash table lock in the meantime. |
|
- | 314 | */ |
|
297 | spinlock_unlock(&irq->lock); |
315 | spinlock_unlock(&irq->lock); |
298 | 316 | ||
299 | /* Remove from the hash table. */ |
317 | /* Remove from the hash table. */ |
300 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
318 | hash_table_remove(&irq_uspace_hash_table, key, 2); |
301 | 319 | ||
302 | free(irq); |
320 | free(irq); |
303 | } |
321 | } |
304 | 322 | ||
305 | spinlock_unlock(&box->irq_lock); |
323 | spinlock_unlock(&box->irq_lock); |
306 | spinlock_unlock(&irq_uspace_hash_table_lock); |
324 | spinlock_unlock(&irq_uspace_hash_table_lock); |
307 | interrupts_restore(ipl); |
325 | interrupts_restore(ipl); |
308 | } |
326 | } |
309 | 327 | ||
310 | /** Add a call to the proper answerbox queue. |
328 | /** Add a call to the proper answerbox queue. |
311 | * |
329 | * |
312 | * Assume irq->lock is locked. |
330 | * Assume irq->lock is locked. |
313 | * |
331 | * |
314 | * @param irq IRQ structure referencing the target answerbox. |
332 | * @param irq IRQ structure referencing the target answerbox. |
315 | * @param call IRQ notification call. |
333 | * @param call IRQ notification call. |
316 | */ |
334 | */ |
317 | static void send_call(irq_t *irq, call_t *call) |
335 | static void send_call(irq_t *irq, call_t *call) |
318 | { |
336 | { |
319 | spinlock_lock(&irq->notif_cfg.answerbox->irq_lock); |
337 | spinlock_lock(&irq->notif_cfg.answerbox->irq_lock); |
320 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs); |
338 | list_append(&call->link, &irq->notif_cfg.answerbox->irq_notifs); |
321 | spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock); |
339 | spinlock_unlock(&irq->notif_cfg.answerbox->irq_lock); |
322 | 340 | ||
323 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST); |
341 | waitq_wakeup(&irq->notif_cfg.answerbox->wq, WAKEUP_FIRST); |
324 | } |
342 | } |
325 | 343 | ||
326 | /** Apply the top-half pseudo code to find out whether to accept the IRQ or not. |
344 | /** Apply the top-half pseudo code to find out whether to accept the IRQ or not. |
327 | * |
345 | * |
328 | * @param irq IRQ structure. |
346 | * @param irq IRQ structure. |
329 | * |
347 | * |
330 | * @return IRQ_ACCEPT if the interrupt is accepted by the |
348 | * @return IRQ_ACCEPT if the interrupt is accepted by the |
331 | * pseudocode. IRQ_DECLINE otherwise. |
349 | * pseudocode. IRQ_DECLINE otherwise. |
332 | */ |
350 | */ |
333 | irq_ownership_t ipc_irq_top_half_claim(irq_t *irq) |
351 | irq_ownership_t ipc_irq_top_half_claim(irq_t *irq) |
334 | { |
352 | { |
335 | unsigned int i; |
353 | unsigned int i; |
336 | unative_t dstval; |
354 | unative_t dstval; |
337 | irq_code_t *code = irq->notif_cfg.code; |
355 | irq_code_t *code = irq->notif_cfg.code; |
338 | unative_t *scratch = irq->notif_cfg.scratch; |
356 | unative_t *scratch = irq->notif_cfg.scratch; |
339 | 357 | ||
340 | 358 | ||
341 | if (!irq->notif_cfg.notify) |
359 | if (!irq->notif_cfg.notify) |
342 | return IRQ_DECLINE; |
360 | return IRQ_DECLINE; |
343 | 361 | ||
344 | if (!code) |
362 | if (!code) |
345 | return IRQ_DECLINE; |
363 | return IRQ_DECLINE; |
346 | 364 | ||
347 | for (i = 0; i < code->cmdcount; i++) { |
365 | for (i = 0; i < code->cmdcount; i++) { |
348 | unsigned int srcarg = code->cmds[i].srcarg; |
366 | unsigned int srcarg = code->cmds[i].srcarg; |
349 | unsigned int dstarg = code->cmds[i].dstarg; |
367 | unsigned int dstarg = code->cmds[i].dstarg; |
350 | 368 | ||
351 | if (srcarg >= IPC_CALL_LEN) |
369 | if (srcarg >= IPC_CALL_LEN) |
352 | break; |
370 | break; |
353 | if (dstarg >= IPC_CALL_LEN) |
371 | if (dstarg >= IPC_CALL_LEN) |
354 | break; |
372 | break; |
355 | 373 | ||
356 | switch (code->cmds[i].cmd) { |
374 | switch (code->cmds[i].cmd) { |
357 | case CMD_PIO_READ_8: |
375 | case CMD_PIO_READ_8: |
358 | dstval = pio_read_8((ioport8_t *) code->cmds[i].addr); |
376 | dstval = pio_read_8((ioport8_t *) code->cmds[i].addr); |
359 | if (dstarg) |
377 | if (dstarg) |
360 | scratch[dstarg] = dstval; |
378 | scratch[dstarg] = dstval; |
361 | break; |
379 | break; |
362 | case CMD_PIO_READ_16: |
380 | case CMD_PIO_READ_16: |
363 | dstval = pio_read_16((ioport16_t *) code->cmds[i].addr); |
381 | dstval = pio_read_16((ioport16_t *) code->cmds[i].addr); |
364 | if (dstarg) |
382 | if (dstarg) |
365 | scratch[dstarg] = dstval; |
383 | scratch[dstarg] = dstval; |
366 | break; |
384 | break; |
367 | case CMD_PIO_READ_32: |
385 | case CMD_PIO_READ_32: |
368 | dstval = pio_read_32((ioport32_t *) code->cmds[i].addr); |
386 | dstval = pio_read_32((ioport32_t *) code->cmds[i].addr); |
369 | if (dstarg) |
387 | if (dstarg) |
370 | scratch[dstarg] = dstval; |
388 | scratch[dstarg] = dstval; |
371 | break; |
389 | break; |
372 | case CMD_PIO_WRITE_8: |
390 | case CMD_PIO_WRITE_8: |
373 | pio_write_8((ioport8_t *) code->cmds[i].addr, |
391 | pio_write_8((ioport8_t *) code->cmds[i].addr, |
374 | (uint8_t) code->cmds[i].value); |
392 | (uint8_t) code->cmds[i].value); |
375 | break; |
393 | break; |
376 | case CMD_PIO_WRITE_16: |
394 | case CMD_PIO_WRITE_16: |
377 | pio_write_16((ioport16_t *) code->cmds[i].addr, |
395 | pio_write_16((ioport16_t *) code->cmds[i].addr, |
378 | (uint16_t) code->cmds[i].value); |
396 | (uint16_t) code->cmds[i].value); |
379 | break; |
397 | break; |
380 | case CMD_PIO_WRITE_32: |
398 | case CMD_PIO_WRITE_32: |
381 | pio_write_32((ioport32_t *) code->cmds[i].addr, |
399 | pio_write_32((ioport32_t *) code->cmds[i].addr, |
382 | (uint32_t) code->cmds[i].value); |
400 | (uint32_t) code->cmds[i].value); |
383 | break; |
401 | break; |
384 | case CMD_BTEST: |
402 | case CMD_BTEST: |
385 | if (srcarg && dstarg) { |
403 | if (srcarg && dstarg) { |
386 | dstval = scratch[srcarg] & code->cmds[i].value; |
404 | dstval = scratch[srcarg] & code->cmds[i].value; |
387 | scratch[dstarg] = dstval; |
405 | scratch[dstarg] = dstval; |
388 | } |
406 | } |
389 | break; |
407 | break; |
390 | case CMD_PREDICATE: |
408 | case CMD_PREDICATE: |
391 | if (srcarg && !scratch[srcarg]) { |
409 | if (srcarg && !scratch[srcarg]) { |
392 | i += code->cmds[i].value; |
410 | i += code->cmds[i].value; |
393 | continue; |
411 | continue; |
394 | } |
412 | } |
395 | break; |
413 | break; |
396 | case CMD_ACCEPT: |
414 | case CMD_ACCEPT: |
397 | return IRQ_ACCEPT; |
415 | return IRQ_ACCEPT; |
398 | break; |
416 | break; |
399 | case CMD_DECLINE: |
417 | case CMD_DECLINE: |
400 | default: |
418 | default: |
401 | return IRQ_DECLINE; |
419 | return IRQ_DECLINE; |
402 | } |
420 | } |
403 | } |
421 | } |
404 | 422 | ||
405 | return IRQ_DECLINE; |
423 | return IRQ_DECLINE; |
406 | } |
424 | } |
407 | 425 | ||
408 | 426 | ||
409 | /* IRQ top-half handler. |
427 | /* IRQ top-half handler. |
410 | * |
428 | * |
411 | * We expect interrupts to be disabled and the irq->lock already held. |
429 | * We expect interrupts to be disabled and the irq->lock already held. |
412 | * |
430 | * |
413 | * @param irq IRQ structure. |
431 | * @param irq IRQ structure. |
414 | */ |
432 | */ |
415 | void ipc_irq_top_half_handler(irq_t *irq) |
433 | void ipc_irq_top_half_handler(irq_t *irq) |
416 | { |
434 | { |
417 | ASSERT(irq); |
435 | ASSERT(irq); |
418 | 436 | ||
419 | if (irq->notif_cfg.answerbox) { |
437 | if (irq->notif_cfg.answerbox) { |
420 | call_t *call; |
438 | call_t *call; |
421 | 439 | ||
422 | call = ipc_call_alloc(FRAME_ATOMIC); |
440 | call = ipc_call_alloc(FRAME_ATOMIC); |
423 | if (!call) |
441 | if (!call) |
424 | return; |
442 | return; |
425 | 443 | ||
426 | call->flags |= IPC_CALL_NOTIF; |
444 | call->flags |= IPC_CALL_NOTIF; |
427 | /* Put a counter to the message */ |
445 | /* Put a counter to the message */ |
428 | call->priv = ++irq->notif_cfg.counter; |
446 | call->priv = ++irq->notif_cfg.counter; |
429 | 447 | ||
430 | /* Set up args */ |
448 | /* Set up args */ |
431 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
449 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
432 | IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]); |
450 | IPC_SET_ARG1(call->data, irq->notif_cfg.scratch[1]); |
433 | IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]); |
451 | IPC_SET_ARG2(call->data, irq->notif_cfg.scratch[2]); |
434 | IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]); |
452 | IPC_SET_ARG3(call->data, irq->notif_cfg.scratch[3]); |
435 | IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]); |
453 | IPC_SET_ARG4(call->data, irq->notif_cfg.scratch[4]); |
436 | IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]); |
454 | IPC_SET_ARG5(call->data, irq->notif_cfg.scratch[5]); |
437 | 455 | ||
438 | send_call(irq, call); |
456 | send_call(irq, call); |
439 | } |
457 | } |
440 | } |
458 | } |
441 | 459 | ||
442 | /** Send notification message. |
460 | /** Send notification message. |
443 | * |
461 | * |
444 | * @param irq IRQ structure. |
462 | * @param irq IRQ structure. |
445 | * @param a1 Driver-specific payload argument. |
463 | * @param a1 Driver-specific payload argument. |
446 | * @param a2 Driver-specific payload argument. |
464 | * @param a2 Driver-specific payload argument. |
447 | * @param a3 Driver-specific payload argument. |
465 | * @param a3 Driver-specific payload argument. |
448 | * @param a4 Driver-specific payload argument. |
466 | * @param a4 Driver-specific payload argument. |
449 | * @param a5 Driver-specific payload argument. |
467 | * @param a5 Driver-specific payload argument. |
450 | */ |
468 | */ |
451 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3, |
469 | void ipc_irq_send_msg(irq_t *irq, unative_t a1, unative_t a2, unative_t a3, |
452 | unative_t a4, unative_t a5) |
470 | unative_t a4, unative_t a5) |
453 | { |
471 | { |
454 | call_t *call; |
472 | call_t *call; |
455 | 473 | ||
456 | spinlock_lock(&irq->lock); |
474 | spinlock_lock(&irq->lock); |
457 | 475 | ||
458 | if (irq->notif_cfg.answerbox) { |
476 | if (irq->notif_cfg.answerbox) { |
459 | call = ipc_call_alloc(FRAME_ATOMIC); |
477 | call = ipc_call_alloc(FRAME_ATOMIC); |
460 | if (!call) { |
478 | if (!call) { |
461 | spinlock_unlock(&irq->lock); |
479 | spinlock_unlock(&irq->lock); |
462 | return; |
480 | return; |
463 | } |
481 | } |
464 | call->flags |= IPC_CALL_NOTIF; |
482 | call->flags |= IPC_CALL_NOTIF; |
465 | /* Put a counter to the message */ |
483 | /* Put a counter to the message */ |
466 | call->priv = ++irq->notif_cfg.counter; |
484 | call->priv = ++irq->notif_cfg.counter; |
467 | 485 | ||
468 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
486 | IPC_SET_METHOD(call->data, irq->notif_cfg.method); |
469 | IPC_SET_ARG1(call->data, a1); |
487 | IPC_SET_ARG1(call->data, a1); |
470 | IPC_SET_ARG2(call->data, a2); |
488 | IPC_SET_ARG2(call->data, a2); |
471 | IPC_SET_ARG3(call->data, a3); |
489 | IPC_SET_ARG3(call->data, a3); |
472 | IPC_SET_ARG4(call->data, a4); |
490 | IPC_SET_ARG4(call->data, a4); |
473 | IPC_SET_ARG5(call->data, a5); |
491 | IPC_SET_ARG5(call->data, a5); |
474 | 492 | ||
475 | send_call(irq, call); |
493 | send_call(irq, call); |
476 | } |
494 | } |
477 | spinlock_unlock(&irq->lock); |
495 | spinlock_unlock(&irq->lock); |
478 | } |
496 | } |
479 | 497 | ||
480 | /** @} |
498 | /** @} |
481 | */ |
499 | */ |
482 | 500 |