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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Jakub Jermar |
2 | * Copyright (c) 2006 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup genericddi |
29 | /** @addtogroup genericddi |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief IRQ dispatcher. |
34 | * @brief IRQ dispatcher. |
35 | * |
35 | * |
36 | * This file provides means of connecting IRQs with particular |
36 | * This file provides means of connecting IRQs with particular |
37 | * devices and logic for dispatching interrupts to IRQ handlers |
37 | * devices and logic for dispatching interrupts to IRQ handlers |
38 | * defined by those devices. |
38 | * defined by those devices. |
39 | * |
39 | * |
40 | * This code is designed to support: |
40 | * This code is designed to support: |
41 | * - multiple devices sharing single IRQ |
41 | * - multiple devices sharing single IRQ |
42 | * - multiple IRQs per single device |
42 | * - multiple IRQs per single device |
43 | * - multiple instances of the same device |
43 | * - multiple instances of the same device |
44 | * |
44 | * |
45 | * |
45 | * |
46 | * Note about architectures. |
46 | * Note about architectures. |
47 | * |
47 | * |
48 | * Some architectures has the term IRQ well defined. Examples |
48 | * Some architectures has the term IRQ well defined. Examples |
49 | * of such architectures include amd64, ia32 and mips32. Some |
49 | * of such architectures include amd64, ia32 and mips32. Some |
50 | * other architectures, such as sparc64, don't use the term |
50 | * other architectures, such as sparc64, don't use the term |
51 | * at all. In those cases, we boldly step forward and define what |
51 | * at all. In those cases, we boldly step forward and define what |
52 | * an IRQ is. |
52 | * an IRQ is. |
53 | * |
53 | * |
54 | * The implementation is generic enough and still allows the |
54 | * The implementation is generic enough and still allows the |
55 | * architectures to use the hardware layout effectively. |
55 | * architectures to use the hardware layout effectively. |
56 | * For instance, on amd64 and ia32, where there is only 16 |
56 | * For instance, on amd64 and ia32, where there is only 16 |
57 | * IRQs, the irq_hash_table can be optimized to a one-dimensional |
57 | * IRQs, the irq_hash_table can be optimized to a one-dimensional |
58 | * array. Next, when it is known that the IRQ numbers (aka INR's) |
58 | * array. Next, when it is known that the IRQ numbers (aka INR's) |
59 | * are unique, the claim functions can always return IRQ_ACCEPT. |
59 | * are unique, the claim functions can always return IRQ_ACCEPT. |
60 | * |
60 | * |
61 | * |
61 | * |
62 | * Note about the irq_hash_table. |
62 | * Note about the irq_hash_table. |
63 | * |
63 | * |
64 | * The hash table is configured to use two keys: inr and devno. |
64 | * The hash table is configured to use two keys: inr and devno. |
65 | * However, the hash index is computed only from inr. Moreover, |
65 | * However, the hash index is computed only from inr. Moreover, |
66 | * if devno is -1, the match is based on the return value of |
66 | * if devno is -1, the match is based on the return value of |
67 | * the claim() function instead of on devno. |
67 | * the claim() function instead of on devno. |
68 | */ |
68 | */ |
69 | 69 | ||
70 | #include <ddi/irq.h> |
70 | #include <ddi/irq.h> |
71 | #include <adt/hash_table.h> |
71 | #include <adt/hash_table.h> |
72 | #include <mm/slab.h> |
72 | #include <mm/slab.h> |
73 | #include <arch/types.h> |
73 | #include <arch/types.h> |
74 | #include <synch/spinlock.h> |
74 | #include <synch/spinlock.h> |
- | 75 | #include <console/console.h> |
|
75 | #include <memstr.h> |
76 | #include <memstr.h> |
76 | #include <arch.h> |
77 | #include <arch.h> |
77 | 78 | ||
78 | #define KEY_INR 0 |
79 | #define KEY_INR 0 |
79 | #define KEY_DEVNO 1 |
80 | #define KEY_DEVNO 1 |
80 | 81 | ||
81 | /** |
82 | /** |
82 | * Spinlock protecting the kernel IRQ hash table. |
83 | * Spinlock protecting the kernel IRQ hash table. |
83 | * This lock must be taken only when interrupts are disabled. |
84 | * This lock must be taken only when interrupts are disabled. |
84 | */ |
85 | */ |
85 | SPINLOCK_INITIALIZE(irq_kernel_hash_table_lock); |
86 | SPINLOCK_INITIALIZE(irq_kernel_hash_table_lock); |
86 | /** The kernel IRQ hash table. */ |
87 | /** The kernel IRQ hash table. */ |
87 | static hash_table_t irq_kernel_hash_table; |
88 | static hash_table_t irq_kernel_hash_table; |
88 | 89 | ||
89 | /** |
90 | /** |
90 | * Spinlock protecting the uspace IRQ hash table. |
91 | * Spinlock protecting the uspace IRQ hash table. |
91 | * This lock must be taken only when interrupts are disabled. |
92 | * This lock must be taken only when interrupts are disabled. |
92 | */ |
93 | */ |
93 | SPINLOCK_INITIALIZE(irq_uspace_hash_table_lock); |
94 | SPINLOCK_INITIALIZE(irq_uspace_hash_table_lock); |
94 | /** The uspace IRQ hash table. */ |
95 | /** The uspace IRQ hash table. */ |
95 | hash_table_t irq_uspace_hash_table; |
96 | hash_table_t irq_uspace_hash_table; |
96 | 97 | ||
97 | /** |
98 | /** |
98 | * Hash table operations for cases when we know that |
99 | * Hash table operations for cases when we know that |
99 | * there will be collisions between different keys. |
100 | * there will be collisions between different keys. |
100 | */ |
101 | */ |
101 | static index_t irq_ht_hash(unative_t *key); |
102 | static index_t irq_ht_hash(unative_t *key); |
102 | static bool irq_ht_compare(unative_t *key, count_t keys, link_t *item); |
103 | static bool irq_ht_compare(unative_t *key, count_t keys, link_t *item); |
103 | 104 | ||
104 | static hash_table_operations_t irq_ht_ops = { |
105 | static hash_table_operations_t irq_ht_ops = { |
105 | .hash = irq_ht_hash, |
106 | .hash = irq_ht_hash, |
106 | .compare = irq_ht_compare, |
107 | .compare = irq_ht_compare, |
107 | .remove_callback = NULL /* not used */ |
108 | .remove_callback = NULL /* not used */ |
108 | }; |
109 | }; |
109 | 110 | ||
110 | /** |
111 | /** |
111 | * Hash table operations for cases when we know that |
112 | * Hash table operations for cases when we know that |
112 | * there will be no collisions between different keys. |
113 | * there will be no collisions between different keys. |
113 | * However, there might be still collisions among |
114 | * However, there might be still collisions among |
114 | * elements with single key (sharing of one IRQ). |
115 | * elements with single key (sharing of one IRQ). |
115 | */ |
116 | */ |
116 | static index_t irq_lin_hash(unative_t *key); |
117 | static index_t irq_lin_hash(unative_t *key); |
117 | static bool irq_lin_compare(unative_t *key, count_t keys, link_t *item); |
118 | static bool irq_lin_compare(unative_t *key, count_t keys, link_t *item); |
118 | 119 | ||
119 | static hash_table_operations_t irq_lin_ops = { |
120 | static hash_table_operations_t irq_lin_ops = { |
120 | .hash = irq_lin_hash, |
121 | .hash = irq_lin_hash, |
121 | .compare = irq_lin_compare, |
122 | .compare = irq_lin_compare, |
122 | .remove_callback = NULL /* not used */ |
123 | .remove_callback = NULL /* not used */ |
123 | }; |
124 | }; |
124 | 125 | ||
125 | /** Number of buckets in either of the hash tables. */ |
126 | /** Number of buckets in either of the hash tables. */ |
126 | static count_t buckets; |
127 | static count_t buckets; |
127 | 128 | ||
128 | /** Initialize IRQ subsystem. |
129 | /** Initialize IRQ subsystem. |
129 | * |
130 | * |
130 | * @param inrs Numbers of unique IRQ numbers or INRs. |
131 | * @param inrs Numbers of unique IRQ numbers or INRs. |
131 | * @param chains Number of chains in the hash table. |
132 | * @param chains Number of chains in the hash table. |
132 | */ |
133 | */ |
133 | void irq_init(count_t inrs, count_t chains) |
134 | void irq_init(count_t inrs, count_t chains) |
134 | { |
135 | { |
135 | buckets = chains; |
136 | buckets = chains; |
136 | /* |
137 | /* |
137 | * Be smart about the choice of the hash table operations. |
138 | * Be smart about the choice of the hash table operations. |
138 | * In cases in which inrs equals the requested number of |
139 | * In cases in which inrs equals the requested number of |
139 | * chains (i.e. where there is no collision between |
140 | * chains (i.e. where there is no collision between |
140 | * different keys), we can use optimized set of operations. |
141 | * different keys), we can use optimized set of operations. |
141 | */ |
142 | */ |
142 | if (inrs == chains) { |
143 | if (inrs == chains) { |
143 | hash_table_create(&irq_uspace_hash_table, chains, 2, |
144 | hash_table_create(&irq_uspace_hash_table, chains, 2, |
144 | &irq_lin_ops); |
145 | &irq_lin_ops); |
145 | hash_table_create(&irq_kernel_hash_table, chains, 2, |
146 | hash_table_create(&irq_kernel_hash_table, chains, 2, |
146 | &irq_lin_ops); |
147 | &irq_lin_ops); |
147 | } else { |
148 | } else { |
148 | hash_table_create(&irq_uspace_hash_table, chains, 2, |
149 | hash_table_create(&irq_uspace_hash_table, chains, 2, |
149 | &irq_ht_ops); |
150 | &irq_ht_ops); |
150 | hash_table_create(&irq_kernel_hash_table, chains, 2, |
151 | hash_table_create(&irq_kernel_hash_table, chains, 2, |
151 | &irq_ht_ops); |
152 | &irq_ht_ops); |
152 | } |
153 | } |
153 | } |
154 | } |
154 | 155 | ||
155 | /** Initialize one IRQ structure. |
156 | /** Initialize one IRQ structure. |
156 | * |
157 | * |
157 | * @param irq Pointer to the IRQ structure to be initialized. |
158 | * @param irq Pointer to the IRQ structure to be initialized. |
158 | * |
159 | * |
159 | */ |
160 | */ |
160 | void irq_initialize(irq_t *irq) |
161 | void irq_initialize(irq_t *irq) |
161 | { |
162 | { |
162 | memsetb(irq, 0, sizeof(irq_t)); |
163 | memsetb(irq, 0, sizeof(irq_t)); |
163 | link_initialize(&irq->link); |
164 | link_initialize(&irq->link); |
164 | spinlock_initialize(&irq->lock, "irq.lock"); |
165 | spinlock_initialize(&irq->lock, "irq.lock"); |
165 | link_initialize(&irq->notif_cfg.link); |
166 | link_initialize(&irq->notif_cfg.link); |
166 | irq->inr = -1; |
167 | irq->inr = -1; |
167 | irq->devno = -1; |
168 | irq->devno = -1; |
168 | } |
169 | } |
169 | 170 | ||
170 | /** Register IRQ for device. |
171 | /** Register IRQ for device. |
171 | * |
172 | * |
172 | * The irq structure must be filled with information |
173 | * The irq structure must be filled with information |
173 | * about the interrupt source and with the claim() |
174 | * about the interrupt source and with the claim() |
174 | * function pointer and handler() function pointer. |
175 | * function pointer and handler() function pointer. |
175 | * |
176 | * |
176 | * @param irq IRQ structure belonging to a device. |
177 | * @param irq IRQ structure belonging to a device. |
177 | * @return True on success, false on failure. |
178 | * @return True on success, false on failure. |
178 | */ |
179 | */ |
179 | void irq_register(irq_t *irq) |
180 | void irq_register(irq_t *irq) |
180 | { |
181 | { |
181 | ipl_t ipl; |
182 | ipl_t ipl; |
182 | unative_t key[] = { |
183 | unative_t key[] = { |
183 | (unative_t) irq->inr, |
184 | (unative_t) irq->inr, |
184 | (unative_t) irq->devno |
185 | (unative_t) irq->devno |
185 | }; |
186 | }; |
186 | 187 | ||
187 | ipl = interrupts_disable(); |
188 | ipl = interrupts_disable(); |
188 | spinlock_lock(&irq_kernel_hash_table_lock); |
189 | spinlock_lock(&irq_kernel_hash_table_lock); |
189 | spinlock_lock(&irq->lock); |
190 | spinlock_lock(&irq->lock); |
190 | hash_table_insert(&irq_kernel_hash_table, key, &irq->link); |
191 | hash_table_insert(&irq_kernel_hash_table, key, &irq->link); |
191 | spinlock_unlock(&irq->lock); |
192 | spinlock_unlock(&irq->lock); |
192 | spinlock_unlock(&irq_kernel_hash_table_lock); |
193 | spinlock_unlock(&irq_kernel_hash_table_lock); |
193 | interrupts_restore(ipl); |
194 | interrupts_restore(ipl); |
194 | } |
195 | } |
195 | 196 | ||
196 | /** Dispatch the IRQ. |
197 | /** Search and lock the uspace IRQ hash table. |
197 | * |
198 | * |
198 | * We assume this function is only called from interrupt |
- | |
199 | * context (i.e. that interrupts are disabled prior to |
- | |
200 | * this call). |
- | |
201 | * |
- | |
202 | * This function attempts to lookup a fitting IRQ |
- | |
203 | * structure. In case of success, return with interrupts |
- | |
204 | * disabled and holding the respective structure. |
- | |
205 | * |
- | |
206 | * @param inr Interrupt number (aka inr or irq). |
- | |
207 | * |
- | |
208 | * @return IRQ structure of the respective device or NULL. |
- | |
209 | */ |
199 | */ |
210 | irq_t *irq_dispatch_and_lock(inr_t inr) |
200 | static irq_t *irq_dispatch_and_lock_uspace(inr_t inr) |
211 | { |
201 | { |
212 | link_t *lnk; |
202 | link_t *lnk; |
213 | unative_t key[] = { |
203 | unative_t key[] = { |
214 | (unative_t) inr, |
204 | (unative_t) inr, |
215 | (unative_t) -1 /* search will use claim() instead of devno */ |
205 | (unative_t) -1 /* search will use claim() instead of devno */ |
216 | }; |
206 | }; |
217 | 207 | ||
218 | /* |
- | |
219 | * Try uspace handlers first. |
- | |
220 | */ |
- | |
221 | spinlock_lock(&irq_uspace_hash_table_lock); |
208 | spinlock_lock(&irq_uspace_hash_table_lock); |
222 | lnk = hash_table_find(&irq_uspace_hash_table, key); |
209 | lnk = hash_table_find(&irq_uspace_hash_table, key); |
223 | if (lnk) { |
210 | if (lnk) { |
224 | irq_t *irq; |
211 | irq_t *irq; |
225 | 212 | ||
226 | irq = hash_table_get_instance(lnk, irq_t, link); |
213 | irq = hash_table_get_instance(lnk, irq_t, link); |
227 | spinlock_unlock(&irq_uspace_hash_table_lock); |
214 | spinlock_unlock(&irq_uspace_hash_table_lock); |
228 | return irq; |
215 | return irq; |
229 | } |
216 | } |
230 | spinlock_unlock(&irq_uspace_hash_table_lock); |
217 | spinlock_unlock(&irq_uspace_hash_table_lock); |
- | 218 | ||
- | 219 | return NULL; |
|
- | 220 | } |
|
231 | 221 | ||
- | 222 | /** Search and lock the kernel IRQ hash table. |
|
232 | /* |
223 | * |
- | 224 | */ |
|
- | 225 | static irq_t *irq_dispatch_and_lock_kernel(inr_t inr) |
|
- | 226 | { |
|
- | 227 | link_t *lnk; |
|
233 | * Fallback to kernel handlers. |
228 | unative_t key[] = { |
- | 229 | (unative_t) inr, |
|
- | 230 | (unative_t) -1 /* search will use claim() instead of devno */ |
|
234 | */ |
231 | }; |
- | 232 | ||
235 | spinlock_lock(&irq_kernel_hash_table_lock); |
233 | spinlock_lock(&irq_kernel_hash_table_lock); |
236 | lnk = hash_table_find(&irq_kernel_hash_table, key); |
234 | lnk = hash_table_find(&irq_kernel_hash_table, key); |
237 | if (lnk) { |
235 | if (lnk) { |
238 | irq_t *irq; |
236 | irq_t *irq; |
239 | 237 | ||
240 | irq = hash_table_get_instance(lnk, irq_t, link); |
238 | irq = hash_table_get_instance(lnk, irq_t, link); |
241 | spinlock_unlock(&irq_kernel_hash_table_lock); |
239 | spinlock_unlock(&irq_kernel_hash_table_lock); |
242 | return irq; |
240 | return irq; |
243 | } |
241 | } |
244 | spinlock_unlock(&irq_kernel_hash_table_lock); |
242 | spinlock_unlock(&irq_kernel_hash_table_lock); |
- | 243 | ||
- | 244 | return NULL; |
|
- | 245 | } |
|
245 | 246 | ||
- | 247 | /** Dispatch the IRQ. |
|
- | 248 | * |
|
- | 249 | * We assume this function is only called from interrupt |
|
- | 250 | * context (i.e. that interrupts are disabled prior to |
|
- | 251 | * this call). |
|
- | 252 | * |
|
- | 253 | * This function attempts to lookup a fitting IRQ |
|
- | 254 | * structure. In case of success, return with interrupts |
|
- | 255 | * disabled and holding the respective structure. |
|
- | 256 | * |
|
- | 257 | * @param inr Interrupt number (aka inr or irq). |
|
- | 258 | * |
|
- | 259 | * @return IRQ structure of the respective device or NULL. |
|
- | 260 | */ |
|
- | 261 | irq_t *irq_dispatch_and_lock(inr_t inr) |
|
- | 262 | { |
|
- | 263 | irq_t *irq; |
|
- | 264 | ||
- | 265 | /* |
|
- | 266 | * If the kernel console is silenced, |
|
- | 267 | * then try first the uspace handlers, |
|
- | 268 | * eventually fall back to kernel handlers. |
|
- | 269 | * |
|
- | 270 | * If the kernel console is active, |
|
- | 271 | * then do it the other way around. |
|
- | 272 | */ |
|
- | 273 | if (silent) { |
|
- | 274 | irq = irq_dispatch_and_lock_uspace(inr); |
|
- | 275 | if (irq) |
|
- | 276 | return irq; |
|
- | 277 | return irq_dispatch_and_lock_kernel(inr); |
|
- | 278 | } |
|
- | 279 | ||
- | 280 | irq = irq_dispatch_and_lock_kernel(inr); |
|
- | 281 | if (irq) |
|
246 | return NULL; |
282 | return irq; |
- | 283 | return irq_dispatch_and_lock_uspace(inr); |
|
247 | } |
284 | } |
248 | 285 | ||
249 | /** Compute hash index for the key. |
286 | /** Compute hash index for the key. |
250 | * |
287 | * |
251 | * This function computes hash index into |
288 | * This function computes hash index into |
252 | * the IRQ hash table for which there |
289 | * the IRQ hash table for which there |
253 | * can be collisions between different |
290 | * can be collisions between different |
254 | * INRs. |
291 | * INRs. |
255 | * |
292 | * |
256 | * The devno is not used to compute the hash. |
293 | * The devno is not used to compute the hash. |
257 | * |
294 | * |
258 | * @param key The first of the keys is inr and the second is devno or -1. |
295 | * @param key The first of the keys is inr and the second is devno or -1. |
259 | * |
296 | * |
260 | * @return Index into the hash table. |
297 | * @return Index into the hash table. |
261 | */ |
298 | */ |
262 | index_t irq_ht_hash(unative_t key[]) |
299 | index_t irq_ht_hash(unative_t key[]) |
263 | { |
300 | { |
264 | inr_t inr = (inr_t) key[KEY_INR]; |
301 | inr_t inr = (inr_t) key[KEY_INR]; |
265 | return inr % buckets; |
302 | return inr % buckets; |
266 | } |
303 | } |
267 | 304 | ||
268 | /** Compare hash table element with a key. |
305 | /** Compare hash table element with a key. |
269 | * |
306 | * |
270 | * There are two things to note about this function. |
307 | * There are two things to note about this function. |
271 | * First, it is used for the more complex architecture setup |
308 | * First, it is used for the more complex architecture setup |
272 | * in which there are way too many interrupt numbers (i.e. inr's) |
309 | * in which there are way too many interrupt numbers (i.e. inr's) |
273 | * to arrange the hash table so that collisions occur only |
310 | * to arrange the hash table so that collisions occur only |
274 | * among same inrs of different devnos. So the explicit check |
311 | * among same inrs of different devnos. So the explicit check |
275 | * for inr match must be done. |
312 | * for inr match must be done. |
276 | * Second, if devno is -1, the second key (i.e. devno) is not |
313 | * Second, if devno is -1, the second key (i.e. devno) is not |
277 | * used for the match and the result of the claim() function |
314 | * used for the match and the result of the claim() function |
278 | * is used instead. |
315 | * is used instead. |
279 | * |
316 | * |
280 | * This function assumes interrupts are already disabled. |
317 | * This function assumes interrupts are already disabled. |
281 | * |
318 | * |
282 | * @param key Keys (i.e. inr and devno). |
319 | * @param key Keys (i.e. inr and devno). |
283 | * @param keys This is 2. |
320 | * @param keys This is 2. |
284 | * @param item The item to compare the key with. |
321 | * @param item The item to compare the key with. |
285 | * |
322 | * |
286 | * @return True on match or false otherwise. |
323 | * @return True on match or false otherwise. |
287 | */ |
324 | */ |
288 | bool irq_ht_compare(unative_t key[], count_t keys, link_t *item) |
325 | bool irq_ht_compare(unative_t key[], count_t keys, link_t *item) |
289 | { |
326 | { |
290 | irq_t *irq = hash_table_get_instance(item, irq_t, link); |
327 | irq_t *irq = hash_table_get_instance(item, irq_t, link); |
291 | inr_t inr = (inr_t) key[KEY_INR]; |
328 | inr_t inr = (inr_t) key[KEY_INR]; |
292 | devno_t devno = (devno_t) key[KEY_DEVNO]; |
329 | devno_t devno = (devno_t) key[KEY_DEVNO]; |
293 | 330 | ||
294 | bool rv; |
331 | bool rv; |
295 | 332 | ||
296 | spinlock_lock(&irq->lock); |
333 | spinlock_lock(&irq->lock); |
297 | if (devno == -1) { |
334 | if (devno == -1) { |
298 | /* Invoked by irq_dispatch_and_lock(). */ |
335 | /* Invoked by irq_dispatch_and_lock(). */ |
299 | rv = ((irq->inr == inr) && |
336 | rv = ((irq->inr == inr) && |
300 | (irq->claim(irq) == IRQ_ACCEPT)); |
337 | (irq->claim(irq) == IRQ_ACCEPT)); |
301 | } else { |
338 | } else { |
302 | /* Invoked by irq_find_and_lock(). */ |
339 | /* Invoked by irq_find_and_lock(). */ |
303 | rv = ((irq->inr == inr) && (irq->devno == devno)); |
340 | rv = ((irq->inr == inr) && (irq->devno == devno)); |
304 | } |
341 | } |
305 | 342 | ||
306 | /* unlock only on non-match */ |
343 | /* unlock only on non-match */ |
307 | if (!rv) |
344 | if (!rv) |
308 | spinlock_unlock(&irq->lock); |
345 | spinlock_unlock(&irq->lock); |
309 | 346 | ||
310 | return rv; |
347 | return rv; |
311 | } |
348 | } |
312 | 349 | ||
313 | /** Compute hash index for the key. |
350 | /** Compute hash index for the key. |
314 | * |
351 | * |
315 | * This function computes hash index into |
352 | * This function computes hash index into |
316 | * the IRQ hash table for which there |
353 | * the IRQ hash table for which there |
317 | * are no collisions between different |
354 | * are no collisions between different |
318 | * INRs. |
355 | * INRs. |
319 | * |
356 | * |
320 | * @param key The first of the keys is inr and the second is devno or -1. |
357 | * @param key The first of the keys is inr and the second is devno or -1. |
321 | * |
358 | * |
322 | * @return Index into the hash table. |
359 | * @return Index into the hash table. |
323 | */ |
360 | */ |
324 | index_t irq_lin_hash(unative_t key[]) |
361 | index_t irq_lin_hash(unative_t key[]) |
325 | { |
362 | { |
326 | inr_t inr = (inr_t) key[KEY_INR]; |
363 | inr_t inr = (inr_t) key[KEY_INR]; |
327 | return inr; |
364 | return inr; |
328 | } |
365 | } |
329 | 366 | ||
330 | /** Compare hash table element with a key. |
367 | /** Compare hash table element with a key. |
331 | * |
368 | * |
332 | * There are two things to note about this function. |
369 | * There are two things to note about this function. |
333 | * First, it is used for the less complex architecture setup |
370 | * First, it is used for the less complex architecture setup |
334 | * in which there are not too many interrupt numbers (i.e. inr's) |
371 | * in which there are not too many interrupt numbers (i.e. inr's) |
335 | * to arrange the hash table so that collisions occur only |
372 | * to arrange the hash table so that collisions occur only |
336 | * among same inrs of different devnos. So the explicit check |
373 | * among same inrs of different devnos. So the explicit check |
337 | * for inr match is not done. |
374 | * for inr match is not done. |
338 | * Second, if devno is -1, the second key (i.e. devno) is not |
375 | * Second, if devno is -1, the second key (i.e. devno) is not |
339 | * used for the match and the result of the claim() function |
376 | * used for the match and the result of the claim() function |
340 | * is used instead. |
377 | * is used instead. |
341 | * |
378 | * |
342 | * This function assumes interrupts are already disabled. |
379 | * This function assumes interrupts are already disabled. |
343 | * |
380 | * |
344 | * @param key Keys (i.e. inr and devno). |
381 | * @param key Keys (i.e. inr and devno). |
345 | * @param keys This is 2. |
382 | * @param keys This is 2. |
346 | * @param item The item to compare the key with. |
383 | * @param item The item to compare the key with. |
347 | * |
384 | * |
348 | * @return True on match or false otherwise. |
385 | * @return True on match or false otherwise. |
349 | */ |
386 | */ |
350 | bool irq_lin_compare(unative_t key[], count_t keys, link_t *item) |
387 | bool irq_lin_compare(unative_t key[], count_t keys, link_t *item) |
351 | { |
388 | { |
352 | irq_t *irq = list_get_instance(item, irq_t, link); |
389 | irq_t *irq = list_get_instance(item, irq_t, link); |
353 | devno_t devno = (devno_t) key[KEY_DEVNO]; |
390 | devno_t devno = (devno_t) key[KEY_DEVNO]; |
354 | bool rv; |
391 | bool rv; |
355 | 392 | ||
356 | spinlock_lock(&irq->lock); |
393 | spinlock_lock(&irq->lock); |
357 | if (devno == -1) { |
394 | if (devno == -1) { |
358 | /* Invoked by irq_dispatch_and_lock() */ |
395 | /* Invoked by irq_dispatch_and_lock() */ |
359 | rv = (irq->claim(irq) == IRQ_ACCEPT); |
396 | rv = (irq->claim(irq) == IRQ_ACCEPT); |
360 | } else { |
397 | } else { |
361 | /* Invoked by irq_find_and_lock() */ |
398 | /* Invoked by irq_find_and_lock() */ |
362 | rv = (irq->devno == devno); |
399 | rv = (irq->devno == devno); |
363 | } |
400 | } |
364 | 401 | ||
365 | /* unlock only on non-match */ |
402 | /* unlock only on non-match */ |
366 | if (!rv) |
403 | if (!rv) |
367 | spinlock_unlock(&irq->lock); |
404 | spinlock_unlock(&irq->lock); |
368 | 405 | ||
369 | return rv; |
406 | return rv; |
370 | } |
407 | } |
371 | 408 | ||
372 | /** @} |
409 | /** @} |
373 | */ |
410 | */ |
374 | 411 |