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1 | /* |
1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
2 | * Copyright (C) 2006 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ofw |
29 | /** @addtogroup ofw |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief EBUS 'reg' and 'ranges' properties handling. |
34 | * @brief EBUS 'reg' and 'ranges' properties handling. |
35 | * |
35 | * |
36 | */ |
36 | */ |
37 | 37 | ||
38 | #include <genarch/ofw/ofw_tree.h> |
38 | #include <genarch/ofw/ofw_tree.h> |
- | 39 | #include <arch/drivers/pci.h> |
|
39 | #include <arch/memstr.h> |
40 | #include <arch/memstr.h> |
- | 41 | #include <arch/trap/interrupt.h> |
|
40 | #include <func.h> |
42 | #include <func.h> |
41 | #include <panic.h> |
43 | #include <panic.h> |
42 | #include <debug.h> |
44 | #include <debug.h> |
43 | #include <macros.h> |
45 | #include <macros.h> |
44 | 46 | ||
- | 47 | /** Apply EBUS ranges to EBUS register. */ |
|
45 | bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa) |
48 | bool ofw_ebus_apply_ranges(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uintptr_t *pa) |
46 | { |
49 | { |
47 | ofw_tree_property_t *prop; |
50 | ofw_tree_property_t *prop; |
48 | ofw_ebus_range_t *range; |
51 | ofw_ebus_range_t *range; |
49 | count_t ranges; |
52 | count_t ranges; |
50 | 53 | ||
51 | prop = ofw_tree_getprop(node, "ranges"); |
54 | prop = ofw_tree_getprop(node, "ranges"); |
52 | if (!prop) |
55 | if (!prop) |
53 | return false; |
56 | return false; |
54 | 57 | ||
55 | ranges = prop->size / sizeof(ofw_ebus_range_t); |
58 | ranges = prop->size / sizeof(ofw_ebus_range_t); |
56 | range = prop->value; |
59 | range = prop->value; |
57 | 60 | ||
58 | int i; |
61 | int i; |
59 | 62 | ||
60 | for (i = 0; i < ranges; i++) { |
63 | for (i = 0; i < ranges; i++) { |
61 | if (reg->space != range[i].child_space) |
64 | if (reg->space != range[i].child_space) |
62 | continue; |
65 | continue; |
63 | if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) { |
66 | if (overlaps(reg->addr, reg->size, range[i].child_base, range[i].size)) { |
64 | ofw_pci_reg_t pci_reg; |
67 | ofw_pci_reg_t pci_reg; |
65 | 68 | ||
66 | pci_reg.space = range[i].parent_space; |
69 | pci_reg.space = range[i].parent_space; |
67 | pci_reg.addr = range[i].parent_base + (reg->addr - range[i].child_base); |
70 | pci_reg.addr = range[i].parent_base + (reg->addr - range[i].child_base); |
68 | pci_reg.size = reg->size; |
71 | pci_reg.size = reg->size; |
69 | 72 | ||
70 | return ofw_pci_apply_ranges(node->parent, &pci_reg, pa); |
73 | return ofw_pci_apply_ranges(node->parent, &pci_reg, pa); |
71 | } |
74 | } |
72 | } |
75 | } |
73 | 76 | ||
74 | return false; |
77 | return false; |
75 | } |
78 | } |
76 | 79 | ||
77 | bool ofw_ebus_map_interrupts(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr) |
80 | bool ofw_ebus_map_interrupts(ofw_tree_node_t *node, ofw_ebus_reg_t *reg, uint32_t interrupt, int *inr) |
78 | { |
81 | { |
79 | ofw_tree_property_t *prop; |
82 | ofw_tree_property_t *prop; |
80 | ofw_tree_node_t *controller; |
83 | ofw_tree_node_t *controller; |
81 | 84 | ||
82 | prop = ofw_tree_getprop(node, "interrupt-map"); |
85 | prop = ofw_tree_getprop(node, "interrupt-map"); |
83 | if (!prop || !prop->value) |
86 | if (!prop || !prop->value) |
84 | return false; |
87 | return false; |
85 | 88 | ||
86 | ofw_ebus_intr_map_t *intr_map = prop->value; |
89 | ofw_ebus_intr_map_t *intr_map = prop->value; |
87 | count_t count = prop->size / sizeof(ofw_ebus_intr_map_t); |
90 | count_t count = prop->size / sizeof(ofw_ebus_intr_map_t); |
88 | 91 | ||
89 | ASSERT(count); |
92 | ASSERT(count); |
90 | 93 | ||
91 | prop = ofw_tree_getprop(node, "interrupt-map-mask"); |
94 | prop = ofw_tree_getprop(node, "interrupt-map-mask"); |
92 | if (!prop || !prop->value) |
95 | if (!prop || !prop->value) |
93 | return false; |
96 | return false; |
94 | 97 | ||
95 | ofw_ebus_intr_mask_t *intr_mask = prop->value; |
98 | ofw_ebus_intr_mask_t *intr_mask = prop->value; |
96 | 99 | ||
97 | ASSERT(prop->size == sizeof(ofw_ebus_intr_mask_t)); |
100 | ASSERT(prop->size == sizeof(ofw_ebus_intr_mask_t)); |
98 | 101 | ||
99 | uint32_t space = reg->space & intr_mask->space_mask; |
102 | uint32_t space = reg->space & intr_mask->space_mask; |
100 | uint32_t addr = reg->addr & intr_mask->addr_mask; |
103 | uint32_t addr = reg->addr & intr_mask->addr_mask; |
101 | uint32_t intr = interrupt & intr_mask->intr_mask; |
104 | uint32_t intr = interrupt & intr_mask->intr_mask; |
102 | 105 | ||
103 | int i; |
106 | int i; |
104 | for (i = 0; i < count; i++) { |
107 | for (i = 0; i < count; i++) { |
105 | if ((intr_map[i].space == space) && (intr_map[i].addr == addr) |
108 | if ((intr_map[i].space == space) && (intr_map[i].addr == addr) |
106 | && (intr_map[i].intr == intr)) |
109 | && (intr_map[i].intr == intr)) |
107 | goto found; |
110 | goto found; |
108 | } |
111 | } |
109 | return false; |
112 | return false; |
110 | 113 | ||
111 | found: |
114 | found: |
112 | /* |
115 | /* |
113 | * We found the device that functions as an interrupt controller |
116 | * We found the device that functions as an interrupt controller |
114 | * for the interrupt. We also found mapping from interrupt to INR. |
117 | * for the interrupt. We also found mapping from interrupt to INR. |
- | 118 | * What needs to be done now is to verify that this indeed is a PCI |
|
- | 119 | * node. |
|
115 | */ |
120 | */ |
116 | 121 | ||
117 | controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle); |
122 | controller = ofw_tree_find_node_by_handle(ofw_tree_lookup("/"), intr_map[i].controller_handle); |
- | 123 | if (!controller) |
|
- | 124 | return false; |
|
118 | 125 | ||
- | 126 | if (strcmp(ofw_tree_node_name(controller), "pci") != 0) { |
|
- | 127 | /* |
|
- | 128 | * This is not a PCI node. |
|
- | 129 | */ |
|
- | 130 | return false; |
|
- | 131 | } |
|
- | 132 | ||
- | 133 | pci_t *pci = controller->device; |
|
- | 134 | if (!pci) { |
|
- | 135 | pci = pci_init(controller); |
|
- | 136 | if (!pci) |
|
- | 137 | return false; |
|
- | 138 | controller->device = pci; |
|
- | 139 | ||
- | 140 | } |
|
- | 141 | pci_enable_interrupt(pci, intr_map[i].controller_inr); |
|
- | 142 | ||
119 | *inr = intr_map[i].controller_inr; |
143 | *inr = intr_map[i].controller_inr; |
- | 144 | *inr |= 0x1f << IGN_SHIFT; /* 0x1f is hardwired IGN */ |
|
- | 145 | ||
120 | return true; |
146 | return true; |
121 | } |
147 | } |
122 | 148 | ||
123 | /** @} |
149 | /** @} |
124 | */ |
150 | */ |
125 | 151 |