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#
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#
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# Copyright (C) 2001-2004 Jakub Jermar
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# Copyright (C) 2001-2004 Jakub Jermar
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
 5 
# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
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# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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## very low and hardware-level functions
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## very low and hardware-level functions
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 30 
 
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# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
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# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
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# and 1 means interrupt with error word
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# and 1 means interrupt with error word
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#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
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#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
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 34 
 
35 
.text
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.text
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 36 
 
37 
.global xen_callback
 37 
.global xen_callback
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.global xen_failsafe_callback
 38 
.global xen_failsafe_callback
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.global enable_l_apic_in_msr
 39 
.global enable_l_apic_in_msr
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.global interrupt_handlers
 - 
 
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.global memcpy
 40 
.global memcpy
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.global memcpy_from_uspace
 41 
.global memcpy_from_uspace
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.global memcpy_from_uspace_failover_address
 42 
.global memcpy_from_uspace_failover_address
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.global memcpy_to_uspace
 43 
.global memcpy_to_uspace
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.global memcpy_to_uspace_failover_address
 44 
.global memcpy_to_uspace_failover_address
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 45 
 
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 46 
 
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xen_callback:
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xen_callback:
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	iret
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	iret
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 49 
 
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xen_failsafe_callback:
 50 
xen_failsafe_callback:
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	iret
 51 
	iret
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 52 
 
54 
 
 53 
 
55 
#define MEMCPY_DST	4
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#define MEMCPY_DST	4
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#define MEMCPY_SRC	8
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#define MEMCPY_SRC	8
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#define MEMCPY_SIZE	12
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#define MEMCPY_SIZE	12
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 57 
 
59 
/** Copy memory to/from userspace.
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/** Copy memory to/from userspace.
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 *
 59 
 *
61 
 * This is almost conventional memcpy().
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 * This is almost conventional memcpy().
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 * The difference is that there is a failover part
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 * The difference is that there is a failover part
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 * to where control is returned from a page fault
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 * to where control is returned from a page fault
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 * if the page fault occurs during copy_from_uspace()
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 * if the page fault occurs during copy_from_uspace()
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 * or copy_to_uspace().
 64 
 * or copy_to_uspace().
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 *
 65 
 *
67 
 * @param MEMCPY_DST(%esp)	Destination address.
 66 
 * @param MEMCPY_DST(%esp)	Destination address.
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 * @param MEMCPY_SRC(%esp)	Source address.
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 * @param MEMCPY_SRC(%esp)	Source address.
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 * @param MEMCPY_SIZE(%esp)	Size.
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 * @param MEMCPY_SIZE(%esp)	Size.
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 *
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 *
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 * @return MEMCPY_SRC(%esp) on success and 0 on failure.
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 * @return MEMCPY_SRC(%esp) on success and 0 on failure.
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 */
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 */
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memcpy:
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memcpy:
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memcpy_from_uspace:
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memcpy_from_uspace:
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memcpy_to_uspace:
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memcpy_to_uspace:
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	movl %edi, %edx				/* save %edi */
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	movl %edi, %edx				/* save %edi */
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	movl %esi, %eax				/* save %esi */
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	movl %esi, %eax				/* save %esi */
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	movl MEMCPY_SIZE(%esp), %ecx
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	movl MEMCPY_SIZE(%esp), %ecx
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	shrl $2, %ecx				/* size / 4 */
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	shrl $2, %ecx				/* size / 4 */
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	movl MEMCPY_DST(%esp), %edi
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	movl MEMCPY_DST(%esp), %edi
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	movl MEMCPY_SRC(%esp), %esi
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	movl MEMCPY_SRC(%esp), %esi
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83
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	rep movsl				/* copy as much as possible word by word */
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	rep movsl				/* copy as much as possible word by word */
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 85 
 
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	movl MEMCPY_SIZE(%esp), %ecx
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	movl MEMCPY_SIZE(%esp), %ecx
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	andl $3, %ecx				/* size % 4 */
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	andl $3, %ecx				/* size % 4 */
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	jz 0f
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	jz 0f
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89
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	rep movsb				/* copy the rest byte by byte */
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	rep movsb				/* copy the rest byte by byte */
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 91 
 
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0:
 92 
0:
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	movl %edx, %edi
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	movl %edx, %edi
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	movl %eax, %esi
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	movl %eax, %esi
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	movl MEMCPY_SRC(%esp), %eax		/* MEMCPY_SRC(%esp), success */
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	movl MEMCPY_SRC(%esp), %eax		/* MEMCPY_SRC(%esp), success */
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	ret
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	ret
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97
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/*
 98 
/*
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 * We got here from as_page_fault() after the memory operations
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 * We got here from as_page_fault() after the memory operations
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 * above had caused a page fault.
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 * above had caused a page fault.
102 
 */
 101 
 */
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memcpy_from_uspace_failover_address:
 102 
memcpy_from_uspace_failover_address:
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memcpy_to_uspace_failover_address:
 103 
memcpy_to_uspace_failover_address:
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	movl %edx, %edi
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	movl %edx, %edi
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	movl %eax, %esi
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	movl %eax, %esi
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	xorl %eax, %eax				/* return 0, failure */
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	xorl %eax, %eax				/* return 0, failure */
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	ret
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	ret
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## Enable local APIC
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## Enable local APIC
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#
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#
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# Enable local APIC in MSR.
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# Enable local APIC in MSR.
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#
 113 
#
115 
enable_l_apic_in_msr:
 114 
enable_l_apic_in_msr:
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	push %eax
 115 
	push %eax
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 116 
 
118 
	movl $0x1b, %ecx
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	movl $0x1b, %ecx
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	rdmsr
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	rdmsr
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	orl $(1<<11),%eax
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	orl $(1<<11),%eax
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	orl $(0xfee00000),%eax
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	orl $(0xfee00000),%eax
122 
	wrmsr
 121 
	wrmsr
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 122 
 
124 
	pop %eax
 123 
	pop %eax
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	ret
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	ret
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 - 
 
127 
# Clear nested flag
 - 
 
128 
# overwrites %ecx
 - 
 
129 
.macro CLEAR_NT_FLAG
 - 
 
130 
	pushfl
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131 
	pop %ecx
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132 
	and $0xffffbfff,%ecx
 - 
 
133 
	push %ecx
 - 
 
134 
	popfl
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135 
.endm
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 - 
 
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## Declare interrupt handlers
 - 
 
138 
#
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139 
# Declare interrupt handlers for n interrupt
 - 
 
140 
# vectors starting at vector i.
 - 
 
141 
#
 - 
 
142 
# The handlers setup data segment registers
 - 
 
143 
# and call exc_dispatch().
 - 
 
144 
#
 - 
 
145 
#define INTERRUPT_ALIGN 64
 - 
 
146 
.macro handler i n
 - 
 
147 
 
 - 
 
148 
.ifeq \i-0x30     # Syscall handler
 - 
 
149 
	push %ds
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150 
	push %es
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	push %fs
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152 
	push %gs
 - 
 
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 - 
 
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	# Push arguments on stack
 - 
 
155 
	push %edi
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156 
	push %esi
 - 
 
157 
	push %edx
 - 
 
158 
	push %ecx
 - 
 
159 
	push %eax
 - 
 
160
- 
 
161 
	# we must fill the data segment registers
 - 
 
162 
	movw $16,%ax
 - 
 
163 
	movw %ax,%ds
 - 
 
164 
	movw %ax,%es
 - 
 
165
- 
 
166 
	sti
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167
- 
 
168 
	call syscall_handler   # syscall_handler(ax,cx,dx,si,di)
 - 
 
169 
	cli
 - 
 
170 
	addl $20, %esp         # clean-up of parameters
 - 
 
171
- 
 
172 
	pop %gs
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173 
	pop %fs
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174 
	pop %es
 - 
 
175 
	pop %ds
 - 
 
176
- 
 
177 
	CLEAR_NT_FLAG
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178 
	iret
 - 
 
179 
.else
- 
 
180 
	/*
 - 
 
181 
	 * This macro distinguishes between two versions of ia32 exceptions.
 - 
 
182 
	 * One version has error word and the other does not have it.
 - 
 
183 
	 * The latter version fakes the error word on the stack so that the
 - 
 
184 
	 * handlers and istate_t can be the same for both types.
 - 
 
185 
	 */
 - 
 
186 
	.iflt \i-32
 - 
 
187 
		.if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
 - 
 
188 
			/*
- 
 
189 
			 * With error word, do nothing
 - 
 
190 
			 */
 - 
 
191 
                .else
 - 
 
192 
                        /*
 - 
 
193 
                         * Version without error word,
 - 
 
194 
                         */
 - 
 
195 
			subl $4, %esp
 - 
 
196 
                .endif
 - 
 
197 
        .else
 - 
 
198 
                /*
 - 
 
199 
                 * Version without error word,
 - 
 
200 
                 */
 - 
 
201 
		subl $4, %esp
 - 
 
202 
	.endif
 - 
 
203
- 
 
204 
	push %ds
 - 
 
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	push %es
 - 
 
206 
	push %fs
 - 
 
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	push %gs
 - 
 
208 
 
 - 
 
209 
#ifdef CONFIG_DEBUG_ALLREGS
 - 
 
210 
	push %ebx
 - 
 
211 
	push %ebp
 - 
 
212 
	push %edi
 - 
 
213 
	push %esi
 - 
 
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#else
 - 
 
215 
	sub $16, %esp
 - 
 
216 
#endif
 - 
 
217 
	push %edx
 - 
 
218 
	push %ecx
 - 
 
219 
	push %eax
 - 
 
220
- 
 
221 
	# we must fill the data segment registers
 - 
 
222 
	movw $16,%ax
 - 
 
223 
	movw %ax,%ds
 - 
 
224 
	movw %ax,%es
 - 
 
225 
 
 - 
 
226 
	pushl %esp          # *istate
 - 
 
227 
	pushl $(\i)         # intnum
 - 
 
228 
	call exc_dispatch   # excdispatch(intnum, *istate)
 - 
 
229 
	addl $8,%esp        # Clear arguments from stack
 - 
 
230 
 
 - 
 
231 
	CLEAR_NT_FLAG # Modifies %ecx
 - 
 
232
- 
 
233 
	pop %eax
 - 
 
234 
	pop %ecx
 - 
 
235 
	pop %edx
 - 
 
236 
#ifdef CONFIG_DEBUG_ALLREGS
 - 
 
237 
	pop %esi
 - 
 
238 
	pop %edi
 - 
 
239 
	pop %ebp
 - 
 
240 
	pop %ebx
 - 
 
241 
#else
 - 
 
242 
	add $16, %esp
 - 
 
243 
#endif
- 
 
244
- 
 
245 
	pop %gs
 - 
 
246 
	pop %fs
 - 
 
247 
	pop %es
 - 
 
248 
	pop %ds
 - 
 
249 
 
 - 
 
250 
	addl $4,%esp	# Skip error word, no matter whether real or fake.
 - 
 
251 
	iret
 - 
 
252 
.endif
 - 
 
253 
 
 - 
 
254 
	.align INTERRUPT_ALIGN
 - 
 
255 
	.if (\n-\i)-1
 - 
 
256 
	handler "(\i+1)",\n
 - 
 
257 
	.endif
 - 
 
258 
.endm
 - 
 
259 
 
 - 
 
260 
# keep in sync with pm.h !!!
 - 
 
261 
IDT_ITEMS=64
 - 
 
262 
.align INTERRUPT_ALIGN
 - 
 
263 
interrupt_handlers:
 - 
 
264 
h_start:
 - 
 
265 
	handler 0 IDT_ITEMS
 - 
 
266 
h_end:
 - 
 
267 
 
 - 
 
268 
.data
 - 
 
269 
.global interrupt_handler_size
 - 
 
270 
 
 - 
 
271 
interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
 - 
 
272 
 
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