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1 | # |
1 | # |
2 | # Copyright (C) 2005 Jakub Jermar |
2 | # Copyright (C) 2005 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | /** |
29 | /** |
30 | * This file contains two trap tables. |
30 | * This file contains kernel trap table. |
31 | * First, trap_table, is the one wich contains handlers implemented by |
- | |
32 | * kernel. During initialization, these handlers are copied out to |
- | |
33 | * the second trap table, trap_table_save, and the first table is |
- | |
34 | * overwritten with copy of OFW's own trap table. The copy is then patched |
- | |
35 | * from the trap_table_save. |
- | |
36 | * |
- | |
37 | * This arrangement is beneficial because kernel handlers stay on their |
- | |
38 | * link-time addresses which is good for debugging. |
- | |
39 | */ |
31 | */ |
40 | 32 | ||
41 | .register %g2, #scratch |
33 | .register %g2, #scratch |
42 | .register %g3, #scratch |
34 | .register %g3, #scratch |
43 | .register %g6, #scratch |
35 | .register %g6, #scratch |
44 | .register %g7, #scratch |
36 | .register %g7, #scratch |
45 | 37 | ||
46 | .text |
38 | .text |
47 | 39 | ||
48 | #include <arch/trap/trap_table.h> |
40 | #include <arch/trap/trap_table.h> |
49 | #include <arch/trap/regwin.h> |
41 | #include <arch/trap/regwin.h> |
50 | #include <arch/trap/interrupt.h> |
42 | #include <arch/trap/interrupt.h> |
51 | #include <arch/trap/exception.h> |
43 | #include <arch/trap/exception.h> |
52 | #include <arch/trap/mmu.h> |
44 | #include <arch/trap/mmu.h> |
53 | #include <arch/stack.h> |
45 | #include <arch/stack.h> |
54 | 46 | ||
55 | #define TABLE_SIZE TRAP_TABLE_SIZE |
47 | #define TABLE_SIZE TRAP_TABLE_SIZE |
56 | #define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
48 | #define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
57 | 49 | ||
58 | /* |
50 | /* |
59 | * Kernel trap table. |
51 | * Kernel trap table. |
60 | */ |
52 | */ |
61 | .align TABLE_SIZE |
53 | .align TABLE_SIZE |
62 | .global trap_table |
54 | .global trap_table |
63 | trap_table: |
55 | trap_table: |
64 | 56 | ||
65 | /* TT = 0x08, TL = 0, instruction_access_exception */ |
57 | /* TT = 0x08, TL = 0, instruction_access_exception */ |
66 | .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
58 | .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
67 | .global instruction_access_exception |
59 | .global instruction_access_exception |
68 | instruction_access_exception: |
60 | instruction_access_exception: |
69 | SIMPLE_HANDLER do_instruction_access_exc |
61 | SIMPLE_HANDLER do_instruction_access_exc |
70 | 62 | ||
- | 63 | /* TT = 0x10, TL = 0, illegal_instruction */ |
|
- | 64 | .org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE |
|
- | 65 | .global illegal_instruction |
|
- | 66 | illegal_instruction: |
|
- | 67 | SIMPLE_HANDLER do_illegal_instruction |
|
- | 68 | ||
71 | /* TT = 0x24, TL = 0, clean_window handler */ |
69 | /* TT = 0x24, TL = 0, clean_window handler */ |
72 | .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
70 | .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
73 | .global clean_window_handler |
71 | .global clean_window_handler |
74 | clean_window_handler: |
72 | clean_window_handler: |
75 | CLEAN_WINDOW_HANDLER |
73 | CLEAN_WINDOW_HANDLER |
76 | 74 | ||
77 | /* TT = 0x34, TL = 0, mem_address_not_aligned */ |
75 | /* TT = 0x34, TL = 0, mem_address_not_aligned */ |
78 | .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
76 | .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
79 | .global mem_address_not_aligned |
77 | .global mem_address_not_aligned |
80 | mem_address_not_aligned: |
78 | mem_address_not_aligned: |
81 | SIMPLE_HANDLER do_mem_address_not_aligned |
79 | SIMPLE_HANDLER do_mem_address_not_aligned |
82 | 80 | ||
83 | /* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
81 | /* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
84 | .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
82 | .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
85 | .global interrupt_level_1_handler |
83 | .global interrupt_level_1_handler |
86 | interrupt_level_1_handler: |
84 | interrupt_level_1_handler: |
87 | INTERRUPT_LEVEL_N_HANDLER 1 |
85 | INTERRUPT_LEVEL_N_HANDLER 1 |
88 | 86 | ||
89 | /* TT = 0x42, TL = 0, interrupt_level_2 handler */ |
87 | /* TT = 0x42, TL = 0, interrupt_level_2 handler */ |
90 | .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE |
88 | .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE |
91 | .global interrupt_level_2_handler |
89 | .global interrupt_level_2_handler |
92 | interrupt_level_2_handler: |
90 | interrupt_level_2_handler: |
93 | INTERRUPT_LEVEL_N_HANDLER 2 |
91 | INTERRUPT_LEVEL_N_HANDLER 2 |
94 | 92 | ||
95 | /* TT = 0x43, TL = 0, interrupt_level_3 handler */ |
93 | /* TT = 0x43, TL = 0, interrupt_level_3 handler */ |
96 | .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE |
94 | .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE |
97 | .global interrupt_level_3_handler |
95 | .global interrupt_level_3_handler |
98 | interrupt_level_3_handler: |
96 | interrupt_level_3_handler: |
99 | INTERRUPT_LEVEL_N_HANDLER 3 |
97 | INTERRUPT_LEVEL_N_HANDLER 3 |
100 | 98 | ||
101 | /* TT = 0x44, TL = 0, interrupt_level_4 handler */ |
99 | /* TT = 0x44, TL = 0, interrupt_level_4 handler */ |
102 | .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE |
100 | .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE |
103 | .global interrupt_level_4_handler |
101 | .global interrupt_level_4_handler |
104 | interrupt_level_4_handler: |
102 | interrupt_level_4_handler: |
105 | INTERRUPT_LEVEL_N_HANDLER 4 |
103 | INTERRUPT_LEVEL_N_HANDLER 4 |
106 | 104 | ||
107 | /* TT = 0x45, TL = 0, interrupt_level_5 handler */ |
105 | /* TT = 0x45, TL = 0, interrupt_level_5 handler */ |
108 | .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE |
106 | .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE |
109 | .global interrupt_level_5_handler |
107 | .global interrupt_level_5_handler |
110 | interrupt_level_5_handler: |
108 | interrupt_level_5_handler: |
111 | INTERRUPT_LEVEL_N_HANDLER 5 |
109 | INTERRUPT_LEVEL_N_HANDLER 5 |
112 | 110 | ||
113 | /* TT = 0x46, TL = 0, interrupt_level_6 handler */ |
111 | /* TT = 0x46, TL = 0, interrupt_level_6 handler */ |
114 | .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE |
112 | .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE |
115 | .global interrupt_level_6_handler |
113 | .global interrupt_level_6_handler |
116 | interrupt_level_6_handler: |
114 | interrupt_level_6_handler: |
117 | INTERRUPT_LEVEL_N_HANDLER 6 |
115 | INTERRUPT_LEVEL_N_HANDLER 6 |
118 | 116 | ||
119 | /* TT = 0x47, TL = 0, interrupt_level_7 handler */ |
117 | /* TT = 0x47, TL = 0, interrupt_level_7 handler */ |
120 | .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE |
118 | .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE |
121 | .global interrupt_level_7_handler |
119 | .global interrupt_level_7_handler |
122 | interrupt_level_7_handler: |
120 | interrupt_level_7_handler: |
123 | INTERRUPT_LEVEL_N_HANDLER 7 |
121 | INTERRUPT_LEVEL_N_HANDLER 7 |
124 | 122 | ||
125 | /* TT = 0x48, TL = 0, interrupt_level_8 handler */ |
123 | /* TT = 0x48, TL = 0, interrupt_level_8 handler */ |
126 | .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE |
124 | .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE |
127 | .global interrupt_level_8_handler |
125 | .global interrupt_level_8_handler |
128 | interrupt_level_8_handler: |
126 | interrupt_level_8_handler: |
129 | INTERRUPT_LEVEL_N_HANDLER 8 |
127 | INTERRUPT_LEVEL_N_HANDLER 8 |
130 | 128 | ||
131 | /* TT = 0x49, TL = 0, interrupt_level_9 handler */ |
129 | /* TT = 0x49, TL = 0, interrupt_level_9 handler */ |
132 | .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE |
130 | .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE |
133 | .global interrupt_level_9_handler |
131 | .global interrupt_level_9_handler |
134 | interrupt_level_9_handler: |
132 | interrupt_level_9_handler: |
135 | INTERRUPT_LEVEL_N_HANDLER 9 |
133 | INTERRUPT_LEVEL_N_HANDLER 9 |
136 | 134 | ||
137 | /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ |
135 | /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ |
138 | .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE |
136 | .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE |
139 | .global interrupt_level_10_handler |
137 | .global interrupt_level_10_handler |
140 | interrupt_level_10_handler: |
138 | interrupt_level_10_handler: |
141 | INTERRUPT_LEVEL_N_HANDLER 10 |
139 | INTERRUPT_LEVEL_N_HANDLER 10 |
142 | 140 | ||
143 | /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ |
141 | /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ |
144 | .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE |
142 | .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE |
145 | .global interrupt_level_11_handler |
143 | .global interrupt_level_11_handler |
146 | interrupt_level_11_handler: |
144 | interrupt_level_11_handler: |
147 | INTERRUPT_LEVEL_N_HANDLER 11 |
145 | INTERRUPT_LEVEL_N_HANDLER 11 |
148 | 146 | ||
149 | /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ |
147 | /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ |
150 | .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE |
148 | .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE |
151 | .global interrupt_level_12_handler |
149 | .global interrupt_level_12_handler |
152 | interrupt_level_12_handler: |
150 | interrupt_level_12_handler: |
153 | INTERRUPT_LEVEL_N_HANDLER 12 |
151 | INTERRUPT_LEVEL_N_HANDLER 12 |
154 | 152 | ||
155 | /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ |
153 | /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ |
156 | .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE |
154 | .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE |
157 | .global interrupt_level_13_handler |
155 | .global interrupt_level_13_handler |
158 | interrupt_level_13_handler: |
156 | interrupt_level_13_handler: |
159 | INTERRUPT_LEVEL_N_HANDLER 13 |
157 | INTERRUPT_LEVEL_N_HANDLER 13 |
160 | 158 | ||
161 | /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ |
159 | /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ |
162 | .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE |
160 | .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE |
163 | .global interrupt_level_14_handler |
161 | .global interrupt_level_14_handler |
164 | interrupt_level_14_handler: |
162 | interrupt_level_14_handler: |
165 | INTERRUPT_LEVEL_N_HANDLER 14 |
163 | INTERRUPT_LEVEL_N_HANDLER 14 |
166 | 164 | ||
167 | /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ |
165 | /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ |
168 | .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE |
166 | .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE |
169 | .global interrupt_level_15_handler |
167 | .global interrupt_level_15_handler |
170 | interrupt_level_15_handler: |
168 | interrupt_level_15_handler: |
171 | INTERRUPT_LEVEL_N_HANDLER 15 |
169 | INTERRUPT_LEVEL_N_HANDLER 15 |
172 | 170 | ||
173 | /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ |
171 | /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ |
174 | .org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE |
172 | .org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE |
175 | .global interrupt_vector_trap_handler |
173 | .global interrupt_vector_trap_handler |
176 | interrupt_vector_trap_handler: |
174 | interrupt_vector_trap_handler: |
177 | INTERRUPT_VECTOR_TRAP_HANDLER |
175 | INTERRUPT_VECTOR_TRAP_HANDLER |
178 | 176 | ||
179 | /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ |
177 | /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ |
180 | .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE |
178 | .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE |
181 | .global fast_instruction_access_mmu_miss_handler |
179 | .global fast_instruction_access_mmu_miss_handler |
182 | fast_instruction_access_mmu_miss_handler: |
180 | fast_instruction_access_mmu_miss_handler: |
183 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
181 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
184 | 182 | ||
185 | /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ |
183 | /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ |
186 | .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE |
184 | .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE |
187 | .global fast_data_access_mmu_miss_handler |
185 | .global fast_data_access_mmu_miss_handler |
188 | fast_data_access_mmu_miss_handler: |
186 | fast_data_access_mmu_miss_handler: |
189 | FAST_DATA_ACCESS_MMU_MISS_HANDLER |
187 | FAST_DATA_ACCESS_MMU_MISS_HANDLER |
190 | 188 | ||
191 | /* TT = 0x6c, TL = 0, fast_data_access_protection */ |
189 | /* TT = 0x6c, TL = 0, fast_data_access_protection */ |
192 | .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE |
190 | .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE |
193 | .global fast_data_access_protection_handler |
191 | .global fast_data_access_protection_handler |
194 | fast_data_access_protection_handler: |
192 | fast_data_access_protection_handler: |
195 | FAST_DATA_ACCESS_PROTECTION_HANDLER |
193 | FAST_DATA_ACCESS_PROTECTION_HANDLER |
196 | 194 | ||
197 | /* TT = 0x80, TL = 0, spill_0_normal handler */ |
195 | /* TT = 0x80, TL = 0, spill_0_normal handler */ |
198 | .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE |
196 | .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE |
199 | .global spill_0_normal |
197 | .global spill_0_normal |
200 | spill_0_normal: |
198 | spill_0_normal: |
201 | SPILL_NORMAL_HANDLER |
199 | SPILL_NORMAL_HANDLER |
202 | 200 | ||
203 | /* TT = 0xc0, TL = 0, fill_0_normal handler */ |
201 | /* TT = 0xc0, TL = 0, fill_0_normal handler */ |
204 | .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE |
202 | .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE |
205 | .global fill_0_normal |
203 | .global fill_0_normal |
206 | fill_0_normal: |
204 | fill_0_normal: |
207 | FILL_NORMAL_HANDLER |
205 | FILL_NORMAL_HANDLER |
208 | 206 | ||
209 | /* |
207 | /* |
210 | * Handlers for TL>0. |
208 | * Handlers for TL>0. |
211 | */ |
209 | */ |
212 | 210 | ||
213 | /* TT = 0x08, TL > 0, instruction_access_exception */ |
211 | /* TT = 0x08, TL > 0, instruction_access_exception */ |
214 | .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
212 | .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
215 | .global instruction_access_exception_high |
213 | .global instruction_access_exception_high |
216 | instruction_access_exception_high: |
214 | instruction_access_exception_high: |
217 | SIMPLE_HANDLER do_instruction_access_exc |
215 | SIMPLE_HANDLER do_instruction_access_exc |
218 | 216 | ||
- | 217 | /* TT = 0x10, TL > 0, illegal_instruction */ |
|
- | 218 | .org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE |
|
- | 219 | .global illegal_instruction_high |
|
- | 220 | illegal_instruction_high: |
|
- | 221 | SIMPLE_HANDLER do_illegal_instruction |
|
- | 222 | ||
219 | /* TT = 0x24, TL > 0, clean_window handler */ |
223 | /* TT = 0x24, TL > 0, clean_window handler */ |
220 | .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
224 | .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
221 | .global clean_window_handler_high |
225 | .global clean_window_handler_high |
222 | clean_window_handler_high: |
226 | clean_window_handler_high: |
223 | CLEAN_WINDOW_HANDLER |
227 | CLEAN_WINDOW_HANDLER |
224 | 228 | ||
225 | /* TT = 0x34, TL > 0, mem_address_not_aligned */ |
229 | /* TT = 0x34, TL > 0, mem_address_not_aligned */ |
226 | .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
230 | .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
227 | .global mem_address_not_aligned_high |
231 | .global mem_address_not_aligned_high |
228 | mem_address_not_aligned_high: |
232 | mem_address_not_aligned_high: |
229 | SIMPLE_HANDLER do_mem_address_not_aligned |
233 | SIMPLE_HANDLER do_mem_address_not_aligned |
230 | 234 | ||
231 | /* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */ |
235 | /* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */ |
232 | .org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
236 | .org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
233 | .global fast_instruction_access_mmu_miss_handler_high |
237 | .global fast_instruction_access_mmu_miss_handler_high |
234 | fast_instruction_access_mmu_miss_handler_high: |
238 | fast_instruction_access_mmu_miss_handler_high: |
235 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
239 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
236 | 240 | ||
237 | /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ |
241 | /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ |
238 | .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
242 | .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
239 | .global fast_data_access_mmu_miss_handler_high |
243 | .global fast_data_access_mmu_miss_handler_high |
240 | fast_data_access_mmu_miss_handler_high: |
244 | fast_data_access_mmu_miss_handler_high: |
241 | FAST_DATA_ACCESS_MMU_MISS_HANDLER |
245 | FAST_DATA_ACCESS_MMU_MISS_HANDLER |
242 | 246 | ||
243 | /* TT = 0x6c, TL > 0, fast_data_access_protection */ |
247 | /* TT = 0x6c, TL > 0, fast_data_access_protection */ |
244 | .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE |
248 | .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE |
245 | .global fast_data_access_protection_handler_high |
249 | .global fast_data_access_protection_handler_high |
246 | fast_data_access_protection_handler_high: |
250 | fast_data_access_protection_handler_high: |
247 | FAST_DATA_ACCESS_PROTECTION_HANDLER |
251 | FAST_DATA_ACCESS_PROTECTION_HANDLER |
248 | 252 | ||
249 | /* TT = 0x80, TL > 0, spill_0_normal handler */ |
253 | /* TT = 0x80, TL > 0, spill_0_normal handler */ |
250 | .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
254 | .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
251 | .global spill_0_normal_high |
255 | .global spill_0_normal_high |
252 | spill_0_normal_high: |
256 | spill_0_normal_high: |
253 | SPILL_NORMAL_HANDLER |
257 | SPILL_NORMAL_HANDLER |
254 | 258 | ||
255 | /* TT = 0xc0, TL > 0, fill_0_normal handler */ |
259 | /* TT = 0xc0, TL > 0, fill_0_normal handler */ |
256 | .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
260 | .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
257 | .global fill_0_normal_high |
261 | .global fill_0_normal_high |
258 | fill_0_normal_high: |
262 | fill_0_normal_high: |
259 | FILL_NORMAL_HANDLER |
263 | FILL_NORMAL_HANDLER |
260 | 264 | ||
261 | - | ||
262 | - | ||
263 | /* |
- | |
264 | * Save trap table. |
- | |
265 | */ |
- | |
266 | .align TABLE_SIZE |
- | |
267 | .global trap_table_save |
- | |
268 | trap_table_save: |
- | |
269 | .space TABLE_SIZE, 0 |
- | |
270 | - | ||
271 | 265 | ||
272 | /* Preemptible trap handler. |
266 | /* Preemptible trap handler. |
273 | * |
267 | * |
274 | * This trap handler makes arrangements to |
268 | * This trap handler makes arrangements to |
275 | * make calling scheduler() possible. |
269 | * make calling scheduler() possible. |
276 | * |
270 | * |
277 | * The caller is responsible for doing save |
271 | * The caller is responsible for doing save |
278 | * and allocating PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE |
272 | * and allocating PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE |
279 | * bytes on stack. |
273 | * bytes on stack. |
280 | * |
274 | * |
281 | * Input registers: |
275 | * Input registers: |
282 | * %l0 Address of function to call. |
276 | * %l0 Address of function to call. |
283 | * Output registers: |
277 | * Output registers: |
284 | * %l1 - %l7 Copy of %g1 - %g7 |
278 | * %l1 - %l7 Copy of %g1 - %g7 |
285 | */ |
279 | */ |
286 | .global preemptible_handler |
280 | .global preemptible_handler |
287 | preemptible_handler: |
281 | preemptible_handler: |
288 | /* |
282 | /* |
289 | * Save TSTATE, TPC, TNPC and PSTATE aside. |
283 | * Save TSTATE, TPC, TNPC and PSTATE aside. |
290 | */ |
284 | */ |
291 | rdpr %tstate, %g1 |
285 | rdpr %tstate, %g1 |
292 | rdpr %tpc, %g2 |
286 | rdpr %tpc, %g2 |
293 | rdpr %tnpc, %g3 |
287 | rdpr %tnpc, %g3 |
294 | rdpr %pstate, %g4 |
288 | rdpr %pstate, %g4 |
295 | 289 | ||
296 | stx %g1, [%fp + STACK_BIAS + SAVED_TSTATE] |
290 | stx %g1, [%fp + STACK_BIAS + SAVED_TSTATE] |
297 | stx %g2, [%fp + STACK_BIAS + SAVED_TPC] |
291 | stx %g2, [%fp + STACK_BIAS + SAVED_TPC] |
298 | stx %g3, [%fp + STACK_BIAS + SAVED_TNPC] |
292 | stx %g3, [%fp + STACK_BIAS + SAVED_TNPC] |
299 | stx %g4, [%fp + STACK_BIAS + SAVED_PSTATE] |
293 | stx %g4, [%fp + STACK_BIAS + SAVED_PSTATE] |
300 | 294 | ||
301 | /* |
295 | /* |
302 | * Write 0 to TL. |
296 | * Write 0 to TL. |
303 | */ |
297 | */ |
304 | wrpr %g0, 0, %tl |
298 | wrpr %g0, 0, %tl |
305 | 299 | ||
306 | /* |
300 | /* |
307 | * Alter PSTATE. |
301 | * Alter PSTATE. |
308 | * - switch to normal globals. |
302 | * - switch to normal globals. |
309 | */ |
303 | */ |
310 | and %g4, ~1, %g4 ! mask alternate globals |
304 | and %g4, ~1, %g4 ! mask alternate globals |
311 | wrpr %g4, 0, %pstate |
305 | wrpr %g4, 0, %pstate |
312 | 306 | ||
313 | /* |
307 | /* |
314 | * Save the normal globals. |
308 | * Save the normal globals. |
315 | */ |
309 | */ |
316 | SAVE_GLOBALS |
310 | SAVE_GLOBALS |
317 | 311 | ||
318 | /* |
312 | /* |
319 | * Call the higher-level handler. |
313 | * Call the higher-level handler. |
320 | */ |
314 | */ |
321 | call %l0 |
315 | call %l0 |
322 | nop |
316 | nop |
323 | 317 | ||
324 | /* |
318 | /* |
325 | * Restore the normal global register set. |
319 | * Restore the normal global register set. |
326 | */ |
320 | */ |
327 | RESTORE_GLOBALS |
321 | RESTORE_GLOBALS |
328 | 322 | ||
329 | /* |
323 | /* |
330 | * Restore PSTATE from saved copy. |
324 | * Restore PSTATE from saved copy. |
331 | * Alternate globals become active. |
325 | * Alternate globals become active. |
332 | */ |
326 | */ |
333 | ldx [%fp + STACK_BIAS + SAVED_PSTATE], %l4 |
327 | ldx [%fp + STACK_BIAS + SAVED_PSTATE], %l4 |
334 | wrpr %l4, 0, %pstate |
328 | wrpr %l4, 0, %pstate |
335 | 329 | ||
336 | /* |
330 | /* |
337 | * Write 1 to TL. |
331 | * Write 1 to TL. |
338 | */ |
332 | */ |
339 | wrpr %g0, 1, %tl |
333 | wrpr %g0, 1, %tl |
340 | 334 | ||
341 | /* |
335 | /* |
342 | * Read TSTATE, TPC and TNPC from saved copy. |
336 | * Read TSTATE, TPC and TNPC from saved copy. |
343 | */ |
337 | */ |
344 | ldx [%fp + STACK_BIAS + SAVED_TSTATE], %g1 |
338 | ldx [%fp + STACK_BIAS + SAVED_TSTATE], %g1 |
345 | ldx [%fp + STACK_BIAS + SAVED_TPC], %g2 |
339 | ldx [%fp + STACK_BIAS + SAVED_TPC], %g2 |
346 | ldx [%fp + STACK_BIAS + SAVED_TNPC], %g3 |
340 | ldx [%fp + STACK_BIAS + SAVED_TNPC], %g3 |
347 | 341 | ||
348 | /* |
342 | /* |
349 | * Do restore to match the save instruction from the top-level handler. |
343 | * Do restore to match the save instruction from the top-level handler. |
350 | */ |
344 | */ |
351 | restore |
345 | restore |
352 | 346 | ||
353 | /* |
347 | /* |
354 | * On execution of retry instruction, CWP will be restored from TSTATE register. |
348 | * On execution of retry instruction, CWP will be restored from TSTATE register. |
355 | * However, because of scheduling, it is possible that CWP in saved TSTATE |
349 | * However, because of scheduling, it is possible that CWP in saved TSTATE |
356 | * is different from current CWP. The following chunk of code fixes CWP |
350 | * is different from current CWP. The following chunk of code fixes CWP |
357 | * in the saved copy of TSTATE. |
351 | * in the saved copy of TSTATE. |
358 | */ |
352 | */ |
359 | rdpr %cwp, %g4 ! read current CWP |
353 | rdpr %cwp, %g4 ! read current CWP |
360 | and %g1, ~0x1f, %g1 ! clear CWP field in saved TSTATE |
354 | and %g1, ~0x1f, %g1 ! clear CWP field in saved TSTATE |
361 | or %g1, %g4, %g1 ! write current CWP to TSTATE |
355 | or %g1, %g4, %g1 ! write current CWP to TSTATE |
362 | 356 | ||
363 | /* |
357 | /* |
364 | * Restore TSTATE, TPC and TNPC from saved copies. |
358 | * Restore TSTATE, TPC and TNPC from saved copies. |
365 | */ |
359 | */ |
366 | wrpr %g1, 0, %tstate |
360 | wrpr %g1, 0, %tstate |
367 | wrpr %g2, 0, %tpc |
361 | wrpr %g2, 0, %tpc |
368 | wrpr %g3, 0, %tnpc |
362 | wrpr %g3, 0, %tnpc |
369 | 363 | ||
370 | /* |
364 | /* |
371 | * Return from interrupt. |
365 | * Return from interrupt. |
372 | */ |
366 | */ |
373 | retry |
367 | retry |
374 | 368 | ||
375 | 369 | ||
376 |
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370 |
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377 | 371 | ||
378 | 372 | ||
379 | 373 |