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#
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#
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# Copyright (c) 2005 Jakub Jermar
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# Copyright (c) 2005 Jakub Jermar
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
5
# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
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# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
11
# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
14
# - The name of the author may not be used to endorse or promote products
15
#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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29
/**
29
/**
30
 * @file
30
 * @file
31
 * @brief This file contains kernel trap table.
31
 * @brief This file contains kernel trap table.
32
 */
32
 */
33
 
33
 
34
.register %g2, #scratch
34
.register %g2, #scratch
35
.register %g3, #scratch
35
.register %g3, #scratch
36
 
36
 
37
.text
37
.text
38
 
38
 
39
#include <arch/trap/trap_table.h>
39
#include <arch/trap/trap_table.h>
40
#include <arch/trap/regwin.h>
40
#include <arch/trap/regwin.h>
41
#include <arch/trap/interrupt.h>
41
#include <arch/trap/interrupt.h>
42
#include <arch/trap/exception.h>
42
#include <arch/trap/exception.h>
43
#include <arch/trap/syscall.h>
43
#include <arch/trap/syscall.h>
44
#include <arch/trap/mmu.h>
44
#include <arch/trap/mmu.h>
45
#include <arch/mm/mmu.h>
45
#include <arch/mm/mmu.h>
46
#include <arch/mm/page.h>
46
#include <arch/mm/page.h>
47
#include <arch/stack.h>
47
#include <arch/stack.h>
48
#include <arch/regdef.h>
48
#include <arch/regdef.h>
49
 
49
 
50
#define TABLE_SIZE	TRAP_TABLE_SIZE
50
#define TABLE_SIZE	TRAP_TABLE_SIZE
51
#define ENTRY_SIZE	TRAP_TABLE_ENTRY_SIZE
51
#define ENTRY_SIZE	TRAP_TABLE_ENTRY_SIZE
52
 
52
 
53
/*
53
/*
54
 * Kernel trap table.
54
 * Kernel trap table.
55
 */
55
 */
56
.align TABLE_SIZE
56
.align TABLE_SIZE
57
.global trap_table
57
.global trap_table
58
trap_table:
58
trap_table:
59
 
59
 
60
/* TT = 0x08, TL = 0, instruction_access_exception */
60
/* TT = 0x08, TL = 0, instruction_access_exception */
61
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
61
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
62
.global instruction_access_exception_tl0
62
.global instruction_access_exception_tl0
63
instruction_access_exception_tl0:
63
instruction_access_exception_tl0:
64
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
64
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
65
	PREEMPTIBLE_HANDLER instruction_access_exception
65
	PREEMPTIBLE_HANDLER instruction_access_exception
66
 
66
 
67
/* TT = 0x0a, TL = 0, instruction_access_error */
67
/* TT = 0x0a, TL = 0, instruction_access_error */
68
.org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE
68
.org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE
69
.global instruction_access_error_tl0
69
.global instruction_access_error_tl0
70
instruction_access_error_tl0:
70
instruction_access_error_tl0:
71
	PREEMPTIBLE_HANDLER instruction_access_error
71
	PREEMPTIBLE_HANDLER instruction_access_error
72
 
72
 
73
/* TT = 0x10, TL = 0, illegal_instruction */
73
/* TT = 0x10, TL = 0, illegal_instruction */
74
.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
74
.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
75
.global illegal_instruction_tl0
75
.global illegal_instruction_tl0
76
illegal_instruction_tl0:
76
illegal_instruction_tl0:
77
	PREEMPTIBLE_HANDLER illegal_instruction
77
	PREEMPTIBLE_HANDLER illegal_instruction
78
 
78
 
79
/* TT = 0x11, TL = 0, privileged_opcode */
79
/* TT = 0x11, TL = 0, privileged_opcode */
80
.org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE
80
.org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE
81
.global privileged_opcode_tl0
81
.global privileged_opcode_tl0
82
privileged_opcode_tl0:
82
privileged_opcode_tl0:
83
	PREEMPTIBLE_HANDLER privileged_opcode
83
	PREEMPTIBLE_HANDLER privileged_opcode
84
 
84
 
85
/* TT = 0x12, TL = 0, unimplemented_LDD */
85
/* TT = 0x12, TL = 0, unimplemented_LDD */
86
.org trap_table + TT_UNIMPLEMENTED_LDD*ENTRY_SIZE
86
.org trap_table + TT_UNIMPLEMENTED_LDD*ENTRY_SIZE
87
.global unimplemented_LDD_tl0
87
.global unimplemented_LDD_tl0
88
unimplemented_LDD_tl0:
88
unimplemented_LDD_tl0:
89
	PREEMPTIBLE_HANDLER unimplemented_LDD
89
	PREEMPTIBLE_HANDLER unimplemented_LDD
90
 
90
 
91
/* TT = 0x13, TL = 0, unimplemented_STD */
91
/* TT = 0x13, TL = 0, unimplemented_STD */
92
.org trap_table + TT_UNIMPLEMENTED_STD*ENTRY_SIZE
92
.org trap_table + TT_UNIMPLEMENTED_STD*ENTRY_SIZE
93
.global unimplemented_STD_tl0
93
.global unimplemented_STD_tl0
94
unimplemented_STD_tl0:
94
unimplemented_STD_tl0:
95
	PREEMPTIBLE_HANDLER unimplemented_STD
95
	PREEMPTIBLE_HANDLER unimplemented_STD
96
 
96
 
97
/* TT = 0x20, TL = 0, fb_disabled handler */
97
/* TT = 0x20, TL = 0, fb_disabled handler */
98
.org trap_table + TT_FP_DISABLED*ENTRY_SIZE
98
.org trap_table + TT_FP_DISABLED*ENTRY_SIZE
99
.global fb_disabled_tl0
99
.global fb_disabled_tl0
100
fp_disabled_tl0:
100
fp_disabled_tl0:
101
	PREEMPTIBLE_HANDLER fp_disabled
101
	PREEMPTIBLE_HANDLER fp_disabled
102
 
102
 
103
/* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */
103
/* TT = 0x21, TL = 0, fb_exception_ieee_754 handler */
104
.org trap_table + TT_FP_EXCEPTION_IEEE_754*ENTRY_SIZE
104
.org trap_table + TT_FP_EXCEPTION_IEEE_754*ENTRY_SIZE
105
.global fb_exception_ieee_754_tl0
105
.global fb_exception_ieee_754_tl0
106
fp_exception_ieee_754_tl0:
106
fp_exception_ieee_754_tl0:
107
	PREEMPTIBLE_HANDLER fp_exception_ieee_754
107
	PREEMPTIBLE_HANDLER fp_exception_ieee_754
108
 
108
 
109
/* TT = 0x22, TL = 0, fb_exception_other handler */
109
/* TT = 0x22, TL = 0, fb_exception_other handler */
110
.org trap_table + TT_FP_EXCEPTION_OTHER*ENTRY_SIZE
110
.org trap_table + TT_FP_EXCEPTION_OTHER*ENTRY_SIZE
111
.global fb_exception_other_tl0
111
.global fb_exception_other_tl0
112
fp_exception_other_tl0:
112
fp_exception_other_tl0:
113
	PREEMPTIBLE_HANDLER fp_exception_other
113
	PREEMPTIBLE_HANDLER fp_exception_other
114
 
114
 
115
/* TT = 0x23, TL = 0, tag_overflow */
115
/* TT = 0x23, TL = 0, tag_overflow */
116
.org trap_table + TT_TAG_OVERFLOW*ENTRY_SIZE
116
.org trap_table + TT_TAG_OVERFLOW*ENTRY_SIZE
117
.global tag_overflow_tl0
117
.global tag_overflow_tl0
118
tag_overflow_tl0:
118
tag_overflow_tl0:
119
	PREEMPTIBLE_HANDLER tag_overflow
119
	PREEMPTIBLE_HANDLER tag_overflow
120
 
120
 
121
/* TT = 0x24, TL = 0, clean_window handler */
121
/* TT = 0x24, TL = 0, clean_window handler */
122
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
122
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
123
.global clean_window_tl0
123
.global clean_window_tl0
124
clean_window_tl0:
124
clean_window_tl0:
125
	CLEAN_WINDOW_HANDLER
125
	CLEAN_WINDOW_HANDLER
126
 
126
 
127
/* TT = 0x28, TL = 0, division_by_zero */
127
/* TT = 0x28, TL = 0, division_by_zero */
128
.org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE
128
.org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE
129
.global division_by_zero_tl0
129
.global division_by_zero_tl0
130
division_by_zero_tl0:
130
division_by_zero_tl0:
131
	PREEMPTIBLE_HANDLER division_by_zero
131
	PREEMPTIBLE_HANDLER division_by_zero
132
 
132
 
133
/* TT = 0x30, TL = 0, data_access_exception */
133
/* TT = 0x30, TL = 0, data_access_exception */
134
.org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE
134
.org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE
135
.global data_access_exception_tl0
135
.global data_access_exception_tl0
136
data_access_exception_tl0:
136
data_access_exception_tl0:
137
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
137
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
138
	PREEMPTIBLE_HANDLER data_access_exception
138
	PREEMPTIBLE_HANDLER data_access_exception
139
 
139
 
140
/* TT = 0x32, TL = 0, data_access_error */
140
/* TT = 0x32, TL = 0, data_access_error */
141
.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
141
.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
142
.global data_access_error_tl0
142
.global data_access_error_tl0
143
data_access_error_tl0:
143
data_access_error_tl0:
144
	PREEMPTIBLE_HANDLER data_access_error
144
	PREEMPTIBLE_HANDLER data_access_error
145
 
145
 
146
/* TT = 0x34, TL = 0, mem_address_not_aligned */
146
/* TT = 0x34, TL = 0, mem_address_not_aligned */
147
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
147
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
148
.global mem_address_not_aligned_tl0
148
.global mem_address_not_aligned_tl0
149
mem_address_not_aligned_tl0:
149
mem_address_not_aligned_tl0:
150
	PREEMPTIBLE_HANDLER mem_address_not_aligned
150
	PREEMPTIBLE_HANDLER mem_address_not_aligned
151
 
151
 
152
/* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */
152
/* TT = 0x35, TL = 0, LDDF_mem_address_not_aligned */
153
.org trap_table + TT_LDDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
153
.org trap_table + TT_LDDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
154
.global LDDF_mem_address_not_aligned_tl0
154
.global LDDF_mem_address_not_aligned_tl0
155
LDDF_mem_address_not_aligned_tl0:
155
LDDF_mem_address_not_aligned_tl0:
156
	PREEMPTIBLE_HANDLER LDDF_mem_address_not_aligned
156
	PREEMPTIBLE_HANDLER LDDF_mem_address_not_aligned
157
 
157
 
158
/* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */
158
/* TT = 0x36, TL = 0, STDF_mem_address_not_aligned */
159
.org trap_table + TT_STDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
159
.org trap_table + TT_STDF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
160
.global STDF_mem_address_not_aligned_tl0
160
.global STDF_mem_address_not_aligned_tl0
161
STDF_mem_address_not_aligned_tl0:
161
STDF_mem_address_not_aligned_tl0:
162
	PREEMPTIBLE_HANDLER STDF_mem_address_not_aligned
162
	PREEMPTIBLE_HANDLER STDF_mem_address_not_aligned
163
 
163
 
164
/* TT = 0x37, TL = 0, privileged_action */
164
/* TT = 0x37, TL = 0, privileged_action */
165
.org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE
165
.org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE
166
.global privileged_action_tl0
166
.global privileged_action_tl0
167
privileged_action_tl0:
167
privileged_action_tl0:
168
	PREEMPTIBLE_HANDLER privileged_action
168
	PREEMPTIBLE_HANDLER privileged_action
169
 
169
 
170
/* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */
170
/* TT = 0x38, TL = 0, LDQF_mem_address_not_aligned */
171
.org trap_table + TT_LDQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
171
.org trap_table + TT_LDQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
172
.global LDQF_mem_address_not_aligned_tl0
172
.global LDQF_mem_address_not_aligned_tl0
173
LDQF_mem_address_not_aligned_tl0:
173
LDQF_mem_address_not_aligned_tl0:
174
	PREEMPTIBLE_HANDLER LDQF_mem_address_not_aligned
174
	PREEMPTIBLE_HANDLER LDQF_mem_address_not_aligned
175
 
175
 
176
/* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */
176
/* TT = 0x39, TL = 0, STQF_mem_address_not_aligned */
177
.org trap_table + TT_STQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
177
.org trap_table + TT_STQF_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
178
.global STQF_mem_address_not_aligned_tl0
178
.global STQF_mem_address_not_aligned_tl0
179
STQF_mem_address_not_aligned_tl0:
179
STQF_mem_address_not_aligned_tl0:
180
	PREEMPTIBLE_HANDLER STQF_mem_address_not_aligned
180
	PREEMPTIBLE_HANDLER STQF_mem_address_not_aligned
181
 
181
 
182
/* TT = 0x41, TL = 0, interrupt_level_1 handler */
182
/* TT = 0x41, TL = 0, interrupt_level_1 handler */
183
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
183
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
184
.global interrupt_level_1_handler_tl0
184
.global interrupt_level_1_handler_tl0
185
interrupt_level_1_handler_tl0:
185
interrupt_level_1_handler_tl0:
186
	INTERRUPT_LEVEL_N_HANDLER 1
186
	INTERRUPT_LEVEL_N_HANDLER 1
187
 
187
 
188
/* TT = 0x42, TL = 0, interrupt_level_2 handler */
188
/* TT = 0x42, TL = 0, interrupt_level_2 handler */
189
.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
189
.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
190
.global interrupt_level_2_handler_tl0
190
.global interrupt_level_2_handler_tl0
191
interrupt_level_2_handler_tl0:
191
interrupt_level_2_handler_tl0:
192
	INTERRUPT_LEVEL_N_HANDLER 2
192
	INTERRUPT_LEVEL_N_HANDLER 2
193
 
193
 
194
/* TT = 0x43, TL = 0, interrupt_level_3 handler */
194
/* TT = 0x43, TL = 0, interrupt_level_3 handler */
195
.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
195
.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
196
.global interrupt_level_3_handler_tl0
196
.global interrupt_level_3_handler_tl0
197
interrupt_level_3_handler_tl0:
197
interrupt_level_3_handler_tl0:
198
	INTERRUPT_LEVEL_N_HANDLER 3
198
	INTERRUPT_LEVEL_N_HANDLER 3
199
 
199
 
200
/* TT = 0x44, TL = 0, interrupt_level_4 handler */
200
/* TT = 0x44, TL = 0, interrupt_level_4 handler */
201
.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
201
.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
202
.global interrupt_level_4_handler_tl0
202
.global interrupt_level_4_handler_tl0
203
interrupt_level_4_handler_tl0:
203
interrupt_level_4_handler_tl0:
204
	INTERRUPT_LEVEL_N_HANDLER 4
204
	INTERRUPT_LEVEL_N_HANDLER 4
205
 
205
 
206
/* TT = 0x45, TL = 0, interrupt_level_5 handler */
206
/* TT = 0x45, TL = 0, interrupt_level_5 handler */
207
.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
207
.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
208
.global interrupt_level_5_handler_tl0
208
.global interrupt_level_5_handler_tl0
209
interrupt_level_5_handler_tl0:
209
interrupt_level_5_handler_tl0:
210
	INTERRUPT_LEVEL_N_HANDLER 5
210
	INTERRUPT_LEVEL_N_HANDLER 5
211
 
211
 
212
/* TT = 0x46, TL = 0, interrupt_level_6 handler */
212
/* TT = 0x46, TL = 0, interrupt_level_6 handler */
213
.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
213
.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
214
.global interrupt_level_6_handler_tl0
214
.global interrupt_level_6_handler_tl0
215
interrupt_level_6_handler_tl0:
215
interrupt_level_6_handler_tl0:
216
	INTERRUPT_LEVEL_N_HANDLER 6
216
	INTERRUPT_LEVEL_N_HANDLER 6
217
 
217
 
218
/* TT = 0x47, TL = 0, interrupt_level_7 handler */
218
/* TT = 0x47, TL = 0, interrupt_level_7 handler */
219
.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
219
.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
220
.global interrupt_level_7_handler_tl0
220
.global interrupt_level_7_handler_tl0
221
interrupt_level_7_handler_tl0:
221
interrupt_level_7_handler_tl0:
222
	INTERRUPT_LEVEL_N_HANDLER 7
222
	INTERRUPT_LEVEL_N_HANDLER 7
223
 
223
 
224
/* TT = 0x48, TL = 0, interrupt_level_8 handler */
224
/* TT = 0x48, TL = 0, interrupt_level_8 handler */
225
.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
225
.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
226
.global interrupt_level_8_handler_tl0
226
.global interrupt_level_8_handler_tl0
227
interrupt_level_8_handler_tl0:
227
interrupt_level_8_handler_tl0:
228
	INTERRUPT_LEVEL_N_HANDLER 8
228
	INTERRUPT_LEVEL_N_HANDLER 8
229
 
229
 
230
/* TT = 0x49, TL = 0, interrupt_level_9 handler */
230
/* TT = 0x49, TL = 0, interrupt_level_9 handler */
231
.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
231
.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
232
.global interrupt_level_9_handler_tl0
232
.global interrupt_level_9_handler_tl0
233
interrupt_level_9_handler_tl0:
233
interrupt_level_9_handler_tl0:
234
	INTERRUPT_LEVEL_N_HANDLER 9
234
	INTERRUPT_LEVEL_N_HANDLER 9
235
 
235
 
236
/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
236
/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
237
.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
237
.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
238
.global interrupt_level_10_handler_tl0
238
.global interrupt_level_10_handler_tl0
239
interrupt_level_10_handler_tl0:
239
interrupt_level_10_handler_tl0:
240
	INTERRUPT_LEVEL_N_HANDLER 10
240
	INTERRUPT_LEVEL_N_HANDLER 10
241
 
241
 
242
/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
242
/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
243
.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
243
.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
244
.global interrupt_level_11_handler_tl0
244
.global interrupt_level_11_handler_tl0
245
interrupt_level_11_handler_tl0:
245
interrupt_level_11_handler_tl0:
246
	INTERRUPT_LEVEL_N_HANDLER 11
246
	INTERRUPT_LEVEL_N_HANDLER 11
247
 
247
 
248
/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
248
/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
249
.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
249
.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
250
.global interrupt_level_12_handler_tl0
250
.global interrupt_level_12_handler_tl0
251
interrupt_level_12_handler_tl0:
251
interrupt_level_12_handler_tl0:
252
	INTERRUPT_LEVEL_N_HANDLER 12
252
	INTERRUPT_LEVEL_N_HANDLER 12
253
 
253
 
254
/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
254
/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
255
.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
255
.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
256
.global interrupt_level_13_handler_tl0
256
.global interrupt_level_13_handler_tl0
257
interrupt_level_13_handler_tl0:
257
interrupt_level_13_handler_tl0:
258
	INTERRUPT_LEVEL_N_HANDLER 13
258
	INTERRUPT_LEVEL_N_HANDLER 13
259
 
259
 
260
/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
260
/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
261
.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
261
.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
262
.global interrupt_level_14_handler_tl0
262
.global interrupt_level_14_handler_tl0
263
interrupt_level_14_handler_tl0:
263
interrupt_level_14_handler_tl0:
264
	INTERRUPT_LEVEL_N_HANDLER 14
264
	INTERRUPT_LEVEL_N_HANDLER 14
265
 
265
 
266
/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
266
/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
267
.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
267
.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
268
.global interrupt_level_15_handler_tl0
268
.global interrupt_level_15_handler_tl0
269
interrupt_level_15_handler_tl0:
269
interrupt_level_15_handler_tl0:
270
	INTERRUPT_LEVEL_N_HANDLER 15
270
	INTERRUPT_LEVEL_N_HANDLER 15
271
 
271
 
272
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
272
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
273
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
273
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
274
.global interrupt_vector_trap_handler_tl0
274
.global interrupt_vector_trap_handler_tl0
275
interrupt_vector_trap_handler_tl0:
275
interrupt_vector_trap_handler_tl0:
276
	INTERRUPT_VECTOR_TRAP_HANDLER
276
	INTERRUPT_VECTOR_TRAP_HANDLER
277
 
277
 
278
/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
278
/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
279
.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
279
.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
280
.global fast_instruction_access_mmu_miss_handler_tl0
280
.global fast_instruction_access_mmu_miss_handler_tl0
281
fast_instruction_access_mmu_miss_handler_tl0:
281
fast_instruction_access_mmu_miss_handler_tl0:
282
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
282
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
283
 
283
 
284
/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
284
/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
285
.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
285
.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
286
.global fast_data_access_mmu_miss_handler_tl0
286
.global fast_data_access_mmu_miss_handler_tl0
287
fast_data_access_mmu_miss_handler_tl0:
287
fast_data_access_mmu_miss_handler_tl0:
288
	FAST_DATA_ACCESS_MMU_MISS_HANDLER 0
288
	FAST_DATA_ACCESS_MMU_MISS_HANDLER 0
289
 
289
 
290
/* TT = 0x6c, TL = 0, fast_data_access_protection */
290
/* TT = 0x6c, TL = 0, fast_data_access_protection */
291
.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
291
.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
292
.global fast_data_access_protection_handler_tl0
292
.global fast_data_access_protection_handler_tl0
293
fast_data_access_protection_handler_tl0:
293
fast_data_access_protection_handler_tl0:
294
	FAST_DATA_ACCESS_PROTECTION_HANDLER 0
294
	FAST_DATA_ACCESS_PROTECTION_HANDLER 0
295
 
295
 
296
/* TT = 0x80, TL = 0, spill_0_normal handler */
296
/* TT = 0x80, TL = 0, spill_0_normal handler */
297
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
297
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
298
.global spill_0_normal_tl0
298
.global spill_0_normal_tl0
299
spill_0_normal_tl0:
299
spill_0_normal_tl0:
300
	SPILL_NORMAL_HANDLER_KERNEL
300
	SPILL_NORMAL_HANDLER_KERNEL
301
 
301
 
302
/* TT = 0x84, TL = 0, spill_1_normal handler */
302
/* TT = 0x84, TL = 0, spill_1_normal handler */
303
.org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE
303
.org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE
304
.global spill_1_normal_tl0
304
.global spill_1_normal_tl0
305
spill_1_normal_tl0:
305
spill_1_normal_tl0:
306
	SPILL_NORMAL_HANDLER_USERSPACE
306
	SPILL_NORMAL_HANDLER_USERSPACE
307
 
307
 
308
/* TT = 0x88, TL = 0, spill_2_normal handler */
308
/* TT = 0x88, TL = 0, spill_2_normal handler */
309
.org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE
309
.org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE
310
.global spill_2_normal_tl0
310
.global spill_2_normal_tl0
311
spill_2_normal_tl0:
311
spill_2_normal_tl0:
312
	SPILL_TO_USPACE_WINDOW_BUFFER
312
	SPILL_TO_USPACE_WINDOW_BUFFER
313
 
313
 
314
/* TT = 0xa0, TL = 0, spill_0_other handler */
314
/* TT = 0xa0, TL = 0, spill_0_other handler */
315
.org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE
315
.org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE
316
.global spill_0_other_tl0
316
.global spill_0_other_tl0
317
spill_0_other_tl0:
317
spill_0_other_tl0:
318
	SPILL_TO_USPACE_WINDOW_BUFFER
318
	SPILL_TO_USPACE_WINDOW_BUFFER
319
 
319
 
320
/* TT = 0xc0, TL = 0, fill_0_normal handler */
320
/* TT = 0xc0, TL = 0, fill_0_normal handler */
321
.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
321
.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
322
.global fill_0_normal_tl0
322
.global fill_0_normal_tl0
323
fill_0_normal_tl0:
323
fill_0_normal_tl0:
324
	FILL_NORMAL_HANDLER_KERNEL
324
	FILL_NORMAL_HANDLER_KERNEL
325
 
325
 
326
/* TT = 0xc4, TL = 0, fill_1_normal handler */
326
/* TT = 0xc4, TL = 0, fill_1_normal handler */
327
.org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE
327
.org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE
328
.global fill_1_normal_tl0
328
.global fill_1_normal_tl0
329
fill_1_normal_tl0:
329
fill_1_normal_tl0:
330
	FILL_NORMAL_HANDLER_USERSPACE
330
	FILL_NORMAL_HANDLER_USERSPACE
331
 
331
 
332
/* TT = 0x100, TL = 0, trap_instruction_0 */
-
 
333
.org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE
-
 
334
.global trap_instruction_0_tl0
-
 
335
trap_instruction_0_tl0:
-
 
336
	TRAP_INSTRUCTION 0
-
 
337
 
-
 
338
/* TT = 0x101, TL = 0, trap_instruction_1 */
-
 
339
.org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE
-
 
340
.global trap_instruction_1_tl0
-
 
341
trap_instruction_1_tl0:
-
 
342
	TRAP_INSTRUCTION 1
-
 
343
 
-
 
344
/* TT = 0x102, TL = 0, trap_instruction_2 */
-
 
345
.org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE
-
 
346
.global trap_instruction_2_tl0
-
 
347
trap_instruction_2_tl0:
-
 
348
	TRAP_INSTRUCTION 2
-
 
349
 
-
 
350
/* TT = 0x103, TL = 0, trap_instruction_3 */
-
 
351
.org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE
-
 
352
.global trap_instruction_3_tl0
-
 
353
trap_instruction_3_tl0:
-
 
354
	TRAP_INSTRUCTION 3
-
 
355
 
-
 
356
/* TT = 0x104, TL = 0, trap_instruction_4 */
-
 
357
.org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE
-
 
358
.global trap_instruction_4_tl0
-
 
359
trap_instruction_4_tl0:
-
 
360
	TRAP_INSTRUCTION 4
-
 
361
 
-
 
362
/* TT = 0x105, TL = 0, trap_instruction_5 */
-
 
363
.org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE
-
 
364
.global trap_instruction_5_tl0
-
 
365
trap_instruction_5_tl0:
-
 
366
	TRAP_INSTRUCTION 5
-
 
367
 
-
 
368
/* TT = 0x106, TL = 0, trap_instruction_6 */
-
 
369
.org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE
-
 
370
.global trap_instruction_6_tl0
-
 
371
trap_instruction_6_tl0:
-
 
372
	TRAP_INSTRUCTION 6
-
 
373
 
-
 
374
/* TT = 0x107, TL = 0, trap_instruction_7 */
332
/* TT = 0x100 - 0x17f, TL = 0, trap_instruction_0 - trap_instruction_7f */
375
.org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE
-
 
376
.global trap_instruction_7_tl0
-
 
377
trap_instruction_7_tl0:
-
 
378
	TRAP_INSTRUCTION 7
-
 
379
 
-
 
380
/* TT = 0x108, TL = 0, trap_instruction_8 */
-
 
381
.org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE
-
 
382
.global trap_instruction_8_tl0
-
 
383
trap_instruction_8_tl0:
-
 
384
	TRAP_INSTRUCTION 8
-
 
385
 
-
 
386
/* TT = 0x109, TL = 0, trap_instruction_9 */
-
 
387
.org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE
-
 
388
.global trap_instruction_9_tl0
-
 
389
trap_instruction_9_tl0:
-
 
390
	TRAP_INSTRUCTION 9
-
 
391
 
-
 
392
/* TT = 0x10a, TL = 0, trap_instruction_10 */
-
 
393
.org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE
-
 
394
.global trap_instruction_10_tl0
-
 
395
trap_instruction_10_tl0:
-
 
396
	TRAP_INSTRUCTION 10
-
 
397
 
-
 
398
/* TT = 0x10b, TL = 0, trap_instruction_11 */
333
.irp cur, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,\
399
.org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE
-
 
400
.global trap_instruction_11_tl0
-
 
401
trap_instruction_11_tl0:
-
 
402
	TRAP_INSTRUCTION 11
-
 
403
 
-
 
404
/* TT = 0x10c, TL = 0, trap_instruction_12 */
-
 
405
.org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE
-
 
406
.global trap_instruction_12_tl0
-
 
407
trap_instruction_12_tl0:
-
 
408
	TRAP_INSTRUCTION 12
-
 
409
 
-
 
410
/* TT = 0x10d, TL = 0, trap_instruction_13 */
-
 
411
.org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE
-
 
412
.global trap_instruction_13_tl0
-
 
413
trap_instruction_13_tl0:
-
 
414
	TRAP_INSTRUCTION 13
-
 
415
 
-
 
416
/* TT = 0x10e, TL = 0, trap_instruction_14 */
-
 
417
.org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE
-
 
418
.global trap_instruction_14_tl0
-
 
419
trap_instruction_14_tl0:
-
 
420
	TRAP_INSTRUCTION 14
-
 
421
 
-
 
422
/* TT = 0x10f, TL = 0, trap_instruction_15 */
334
    20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38,\
423
.org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE
-
 
424
.global trap_instruction_15_tl0
-
 
425
trap_instruction_15_tl0:
-
 
426
	TRAP_INSTRUCTION 15
-
 
427
 
-
 
428
/* TT = 0x110, TL = 0, trap_instruction_16 */
335
    39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57,\
429
.org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE
-
 
430
.global trap_instruction_16_tl0
-
 
431
trap_instruction_16_tl0:
-
 
432
	TRAP_INSTRUCTION 16
-
 
433
 
-
 
434
/* TT = 0x111, TL = 0, trap_instruction_17 */
-
 
435
.org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE
-
 
436
.global trap_instruction_17_tl0
-
 
437
trap_instruction_17_tl0:
-
 
438
	TRAP_INSTRUCTION 17
-
 
439
 
-
 
440
/* TT = 0x112, TL = 0, trap_instruction_18 */
336
    58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76,\
441
.org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE
-
 
442
.global trap_instruction_18_tl0
-
 
443
trap_instruction_18_tl0:
-
 
444
	TRAP_INSTRUCTION 18
-
 
445
 
-
 
446
/* TT = 0x113, TL = 0, trap_instruction_19 */
337
    77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95,\
447
.org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE
-
 
448
.global trap_instruction_19_tl0
-
 
449
trap_instruction_19_tl0:
-
 
450
	TRAP_INSTRUCTION 19
-
 
451
 
-
 
452
/* TT = 0x114, TL = 0, trap_instruction_20 */
338
    96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111,\
453
.org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE
-
 
454
.global trap_instruction_20_tl0
-
 
455
trap_instruction_20_tl0:
-
 
456
	TRAP_INSTRUCTION 20
-
 
457
 
-
 
458
/* TT = 0x115, TL = 0, trap_instruction_21 */
339
    112, 113, 114, 115, 116, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126,\
459
.org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE
-
 
460
.global trap_instruction_21_tl0
-
 
461
trap_instruction_21_tl0:
-
 
462
	TRAP_INSTRUCTION 21
-
 
463
 
-
 
464
/* TT = 0x116, TL = 0, trap_instruction_22 */
-
 
465
.org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE
-
 
466
.global trap_instruction_22_tl0
-
 
467
trap_instruction_22_tl0:
-
 
468
	TRAP_INSTRUCTION 22
-
 
469
 
-
 
470
/* TT = 0x117, TL = 0, trap_instruction_23 */
-
 
471
.org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE
-
 
472
.global trap_instruction_23_tl0
-
 
473
trap_instruction_23_tl0:
-
 
474
	TRAP_INSTRUCTION 23
-
 
475
 
-
 
476
/* TT = 0x118, TL = 0, trap_instruction_24 */
-
 
477
.org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE
-
 
478
.global trap_instruction_24_tl0
-
 
479
trap_instruction_24_tl0:
-
 
480
	TRAP_INSTRUCTION 24
-
 
481
 
-
 
482
/* TT = 0x119, TL = 0, trap_instruction_25 */
-
 
483
.org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE
-
 
484
.global trap_instruction_25_tl0
-
 
485
trap_instruction_25_tl0:
-
 
486
	TRAP_INSTRUCTION 25
-
 
487
 
-
 
488
/* TT = 0x11a, TL = 0, trap_instruction_26 */
-
 
489
.org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE
-
 
490
.global trap_instruction_26_tl0
-
 
491
trap_instruction_26_tl0:
-
 
492
	TRAP_INSTRUCTION 26
-
 
493
 
-
 
494
/* TT = 0x11b, TL = 0, trap_instruction_27 */
-
 
495
.org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE
-
 
496
.global trap_instruction_27_tl0
-
 
497
trap_instruction_27_tl0:
-
 
498
	TRAP_INSTRUCTION 27
340
    127
499
 
-
 
500
/* TT = 0x11c, TL = 0, trap_instruction_28 */
-
 
501
.org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE
-
 
502
.global trap_instruction_28_tl0
-
 
503
trap_instruction_28_tl0:
-
 
504
	TRAP_INSTRUCTION 28
-
 
505
 
-
 
506
/* TT = 0x11d, TL = 0, trap_instruction_29 */
-
 
507
.org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE
-
 
508
.global trap_instruction_29_tl0
-
 
509
trap_instruction_29_tl0:
-
 
510
	TRAP_INSTRUCTION 29
-
 
511
 
-
 
512
/* TT = 0x11e, TL = 0, trap_instruction_30 */
-
 
513
.org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE
-
 
514
.global trap_instruction_30_tl0
-
 
515
trap_instruction_30_tl0:
-
 
516
	TRAP_INSTRUCTION 30
-
 
517
 
-
 
518
/* TT = 0x11f, TL = 0, trap_instruction_31 */
-
 
519
.org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE
341
.org trap_table + (TT_TRAP_INSTRUCTION_0+\cur)*ENTRY_SIZE
520
.global trap_instruction_31_tl0
342
.global trap_instruction_\cur\()_tl0
521
trap_instruction_31_tl0:
343
trap_instruction_\cur\()_tl0:
522
	TRAP_INSTRUCTION 31
-
 
523
 
-
 
524
/* TT = 0x120, TL = 0, trap_instruction_32 */
-
 
525
.org trap_table + TT_TRAP_INSTRUCTION(32)*ENTRY_SIZE
-
 
526
.global trap_instruction_32_tl0
344
	ba trap_instruction_handler
527
trap_instruction_32_tl0:
-
 
528
	TRAP_INSTRUCTION 32
345
	mov \cur, %g2
529
 
-
 
530
/* TT = 0x121, TL = 0, trap_instruction_33 */
-
 
531
.org trap_table + TT_TRAP_INSTRUCTION(33)*ENTRY_SIZE
-
 
532
.global trap_instruction_33_tl0
-
 
533
trap_instruction_33_tl0:
-
 
534
	TRAP_INSTRUCTION 33
-
 
535
 
-
 
536
/* TT = 0x122, TL = 0, trap_instruction_34 */
-
 
537
.org trap_table + TT_TRAP_INSTRUCTION(34)*ENTRY_SIZE
-
 
538
.global trap_instruction_34_tl0
-
 
539
trap_instruction_34_tl0:
-
 
540
	TRAP_INSTRUCTION 34
-
 
541
 
-
 
542
/* TT = 0x123, TL = 0, trap_instruction_35 */
-
 
543
.org trap_table + TT_TRAP_INSTRUCTION(35)*ENTRY_SIZE
-
 
544
.global trap_instruction_35_tl0
-
 
545
trap_instruction_35_tl0:
-
 
546
	TRAP_INSTRUCTION 35
-
 
547
 
-
 
548
/* TT = 0x124, TL = 0, trap_instruction_36 */
-
 
549
.org trap_table + TT_TRAP_INSTRUCTION(36)*ENTRY_SIZE
-
 
550
.global trap_instruction_36_tl0
-
 
551
trap_instruction_36_tl0:
-
 
552
	TRAP_INSTRUCTION 36
-
 
553
 
-
 
554
/* TT = 0x125, TL = 0, trap_instruction_37 */
-
 
555
.org trap_table + TT_TRAP_INSTRUCTION(37)*ENTRY_SIZE
-
 
556
.global trap_instruction_37_tl0
-
 
557
trap_instruction_37_tl0:
-
 
558
	TRAP_INSTRUCTION 37
-
 
559
 
-
 
560
/* TT = 0x126, TL = 0, trap_instruction_38 */
-
 
561
.org trap_table + TT_TRAP_INSTRUCTION(38)*ENTRY_SIZE
-
 
562
.global trap_instruction_38_tl0
-
 
563
trap_instruction_38_tl0:
-
 
564
	TRAP_INSTRUCTION 38
-
 
565
 
-
 
566
/* TT = 0x127, TL = 0, trap_instruction_39 */
-
 
567
.org trap_table + TT_TRAP_INSTRUCTION(39)*ENTRY_SIZE
-
 
568
.global trap_instruction_39_tl0
-
 
569
trap_instruction_39_tl0:
-
 
570
	TRAP_INSTRUCTION 39
-
 
571
 
346
.endr
572
/* TT = 0x128, TL = 0, trap_instruction_40 */
-
 
573
.org trap_table + TT_TRAP_INSTRUCTION(40)*ENTRY_SIZE
-
 
574
.global trap_instruction_40_tl0
-
 
575
trap_instruction_40_tl0:
-
 
576
	TRAP_INSTRUCTION 40
-
 
577
 
347
 
578
/*
348
/*
579
 * Handlers for TL>0.
349
 * Handlers for TL>0.
580
 */
350
 */
581
 
351
 
582
/* TT = 0x08, TL > 0, instruction_access_exception */
352
/* TT = 0x08, TL > 0, instruction_access_exception */
583
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
353
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
584
.global instruction_access_exception_tl1
354
.global instruction_access_exception_tl1
585
instruction_access_exception_tl1:
355
instruction_access_exception_tl1:
586
	wrpr %g0, 1, %tl
356
	wrpr %g0, 1, %tl
587
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
357
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
588
	PREEMPTIBLE_HANDLER instruction_access_exception
358
	PREEMPTIBLE_HANDLER instruction_access_exception
589
 
359
 
590
/* TT = 0x0a, TL > 0, instruction_access_error */
360
/* TT = 0x0a, TL > 0, instruction_access_error */
591
.org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE
361
.org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE
592
.global instruction_access_error_tl1
362
.global instruction_access_error_tl1
593
instruction_access_error_tl1:
363
instruction_access_error_tl1:
594
	wrpr %g0, 1, %tl
364
	wrpr %g0, 1, %tl
595
	PREEMPTIBLE_HANDLER instruction_access_error
365
	PREEMPTIBLE_HANDLER instruction_access_error
596
 
366
 
597
/* TT = 0x10, TL > 0, illegal_instruction */
367
/* TT = 0x10, TL > 0, illegal_instruction */
598
.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
368
.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
599
.global illegal_instruction_tl1
369
.global illegal_instruction_tl1
600
illegal_instruction_tl1:
370
illegal_instruction_tl1:
601
	wrpr %g0, 1, %tl
371
	wrpr %g0, 1, %tl
602
	PREEMPTIBLE_HANDLER illegal_instruction
372
	PREEMPTIBLE_HANDLER illegal_instruction
603
 
373
 
604
/* TT = 0x24, TL > 0, clean_window handler */
374
/* TT = 0x24, TL > 0, clean_window handler */
605
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
375
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
606
.global clean_window_tl1
376
.global clean_window_tl1
607
clean_window_tl1:
377
clean_window_tl1:
608
	CLEAN_WINDOW_HANDLER
378
	CLEAN_WINDOW_HANDLER
609
 
379
 
610
/* TT = 0x28, TL > 0, division_by_zero */
380
/* TT = 0x28, TL > 0, division_by_zero */
611
.org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE
381
.org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE
612
.global division_by_zero_tl1
382
.global division_by_zero_tl1
613
division_by_zero_tl1:
383
division_by_zero_tl1:
614
	wrpr %g0, 1, %tl
384
	wrpr %g0, 1, %tl
615
	PREEMPTIBLE_HANDLER division_by_zero
385
	PREEMPTIBLE_HANDLER division_by_zero
616
 
386
 
617
/* TT = 0x30, TL > 0, data_access_exception */
387
/* TT = 0x30, TL > 0, data_access_exception */
618
.org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE
388
.org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE
619
.global data_access_exception_tl1
389
.global data_access_exception_tl1
620
data_access_exception_tl1:
390
data_access_exception_tl1:
621
	wrpr %g0, 1, %tl
391
	wrpr %g0, 1, %tl
622
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
392
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
623
	PREEMPTIBLE_HANDLER data_access_exception
393
	PREEMPTIBLE_HANDLER data_access_exception
624
 
394
 
625
/* TT = 0x32, TL > 0, data_access_error */
395
/* TT = 0x32, TL > 0, data_access_error */
626
.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
396
.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
627
.global data_access_error_tl1
397
.global data_access_error_tl1
628
data_access_error_tl1:
398
data_access_error_tl1:
629
	wrpr %g0, 1, %tl
399
	wrpr %g0, 1, %tl
630
	PREEMPTIBLE_HANDLER data_access_error
400
	PREEMPTIBLE_HANDLER data_access_error
631
 
401
 
632
/* TT = 0x34, TL > 0, mem_address_not_aligned */
402
/* TT = 0x34, TL > 0, mem_address_not_aligned */
633
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
403
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
634
.global mem_address_not_aligned_tl1
404
.global mem_address_not_aligned_tl1
635
mem_address_not_aligned_tl1:
405
mem_address_not_aligned_tl1:
636
	wrpr %g0, 1, %tl
406
	wrpr %g0, 1, %tl
637
	PREEMPTIBLE_HANDLER mem_address_not_aligned
407
	PREEMPTIBLE_HANDLER mem_address_not_aligned
638
 
408
 
639
/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
409
/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
640
.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
410
.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
641
.global fast_data_access_mmu_miss_handler_tl1
411
.global fast_data_access_mmu_miss_handler_tl1
642
fast_data_access_mmu_miss_handler_tl1:
412
fast_data_access_mmu_miss_handler_tl1:
643
	FAST_DATA_ACCESS_MMU_MISS_HANDLER 1
413
	FAST_DATA_ACCESS_MMU_MISS_HANDLER 1
644
 
414
 
645
/* TT = 0x6c, TL > 0, fast_data_access_protection */
415
/* TT = 0x6c, TL > 0, fast_data_access_protection */
646
.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
416
.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
647
.global fast_data_access_protection_handler_tl1
417
.global fast_data_access_protection_handler_tl1
648
fast_data_access_protection_handler_tl1:
418
fast_data_access_protection_handler_tl1:
649
	FAST_DATA_ACCESS_PROTECTION_HANDLER 1
419
	FAST_DATA_ACCESS_PROTECTION_HANDLER 1
650
 
420
 
651
/* TT = 0x80, TL > 0, spill_0_normal handler */
421
/* TT = 0x80, TL > 0, spill_0_normal handler */
652
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
422
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
653
.global spill_0_normal_tl1
423
.global spill_0_normal_tl1
654
spill_0_normal_tl1:
424
spill_0_normal_tl1:
655
	SPILL_NORMAL_HANDLER_KERNEL
425
	SPILL_NORMAL_HANDLER_KERNEL
656
 
426
 
657
/* TT = 0x88, TL > 0, spill_2_normal handler */
427
/* TT = 0x88, TL > 0, spill_2_normal handler */
658
.org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE
428
.org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE
659
.global spill_2_normal_tl1
429
.global spill_2_normal_tl1
660
spill_2_normal_tl1:
430
spill_2_normal_tl1:
661
	SPILL_TO_USPACE_WINDOW_BUFFER
431
	SPILL_TO_USPACE_WINDOW_BUFFER
662
 
432
 
663
/* TT = 0xa0, TL > 0, spill_0_other handler */
433
/* TT = 0xa0, TL > 0, spill_0_other handler */
664
.org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE
434
.org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE
665
.global spill_0_other_tl1
435
.global spill_0_other_tl1
666
spill_0_other_tl1:
436
spill_0_other_tl1:
667
	SPILL_TO_USPACE_WINDOW_BUFFER
437
	SPILL_TO_USPACE_WINDOW_BUFFER
668
 
438
 
669
/* TT = 0xc0, TL > 0, fill_0_normal handler */
439
/* TT = 0xc0, TL > 0, fill_0_normal handler */
670
.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
440
.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
671
.global fill_0_normal_tl1
441
.global fill_0_normal_tl1
672
fill_0_normal_tl1:
442
fill_0_normal_tl1:
673
	FILL_NORMAL_HANDLER_KERNEL
443
	FILL_NORMAL_HANDLER_KERNEL
674
 
444
 
675
.align TABLE_SIZE
445
.align TABLE_SIZE
676
 
446
 
677
 
447
 
678
#define NOT(x)	((x) == 0)
448
#define NOT(x)	((x) == 0)
679
 
449
 
680
/* Preemptible trap handler for TL=1.
450
/* Preemptible trap handler for TL=1.
681
 *
451
 *
682
 * This trap handler makes arrangements to make calling of scheduler() from
452
 * This trap handler makes arrangements to make calling of scheduler() from
683
 * within a trap context possible. It is called from several other trap
453
 * within a trap context possible. It is called from several other trap
684
 * handlers.
454
 * handlers.
685
 *
455
 *
686
 * This function can be entered either with interrupt globals or alternate
456
 * This function can be entered either with interrupt globals or alternate
687
 * globals. Memory management trap handlers are obliged to switch to one of
457
 * globals. Memory management trap handlers are obliged to switch to one of
688
 * those global sets prior to calling this function. Register window management
458
 * those global sets prior to calling this function. Register window management
689
 * functions are not allowed to modify the alternate global registers.
459
 * functions are not allowed to modify the alternate global registers.
690
 *
460
 *
691
 * The kernel is designed to work on trap levels 0 - 4. For instance, the
461
 * The kernel is designed to work on trap levels 0 - 4. For instance, the
692
 * following can happen:
462
 * following can happen:
693
 * TL0: kernel thread runs (CANSAVE=0, kernel stack not in DTLB)
463
 * TL0: kernel thread runs (CANSAVE=0, kernel stack not in DTLB)
694
 * TL1: preemptible trap handler started after a tick interrupt
464
 * TL1: preemptible trap handler started after a tick interrupt
695
 * TL2: preemptible trap handler did SAVE
465
 * TL2: preemptible trap handler did SAVE
696
 * TL3: spill handler touched the kernel stack  
466
 * TL3: spill handler touched the kernel stack  
697
 * TL4: hardware or software failure
467
 * TL4: hardware or software failure
698
 *
468
 *
699
 * Input registers:
469
 * Input registers:
700
 *	%g1		Address of function to call if this is not a syscall.
470
 *	%g1		Address of function to call if this is not a syscall.
701
 * 	%g2	 	First argument for the function.
471
 * 	%g2	 	First argument for the function.
702
 *	%g6		Pre-set as kernel stack base if trap from userspace.
472
 *	%g6		Pre-set as kernel stack base if trap from userspace.
703
 *	%g7		Pre-set as address of the userspace window buffer.
473
 *	%g7		Pre-set as address of the userspace window buffer.
704
 */
474
 */
705
.macro PREEMPTIBLE_HANDLER_TEMPLATE is_syscall
475
.macro PREEMPTIBLE_HANDLER_TEMPLATE is_syscall
706
	/*
476
	/*
707
	 * ASSERT(%tl == 1)
477
	 * ASSERT(%tl == 1)
708
	 */
478
	 */
709
	rdpr %tl, %g3
479
	rdpr %tl, %g3
710
	cmp %g3, 1
480
	cmp %g3, 1
711
	be 1f
481
	be 1f
712
	nop
482
	nop
713
0:	ba 0b					! this is for debugging, if we ever get here
483
0:	ba 0b					! this is for debugging, if we ever get here
714
	nop					! it will be easy to find
484
	nop					! it will be easy to find
715
 
485
 
716
1:
486
1:
717
.if NOT(\is_syscall)
487
.if NOT(\is_syscall)
718
	rdpr %tstate, %g3
488
	rdpr %tstate, %g3
719
	
489
	
720
	/*
490
	/*
721
	 * One of the ways this handler can be invoked is after a nested MMU trap from
491
	 * One of the ways this handler can be invoked is after a nested MMU trap from
722
	 * either spill_1_normal or fill_1_normal traps. Both of these traps manipulate
492
	 * either spill_1_normal or fill_1_normal traps. Both of these traps manipulate
723
	 * the CWP register. We deal with the situation by simulating the MMU trap
493
	 * the CWP register. We deal with the situation by simulating the MMU trap
724
	 * on TL=1 and restart the respective SAVE or RESTORE instruction once the MMU
494
	 * on TL=1 and restart the respective SAVE or RESTORE instruction once the MMU
725
	 * trap is resolved. However, because we are in the wrong window from the
495
	 * trap is resolved. However, because we are in the wrong window from the
726
	 * perspective of the MMU trap, we need to synchronize CWP with CWP from TL=0.
496
	 * perspective of the MMU trap, we need to synchronize CWP with CWP from TL=0.
727
	 */ 
497
	 */ 
728
	and %g3, TSTATE_CWP_MASK, %g4
498
	and %g3, TSTATE_CWP_MASK, %g4
729
	wrpr %g4, 0, %cwp			! resynchronize CWP
499
	wrpr %g4, 0, %cwp			! resynchronize CWP
730
 
500
 
731
	andcc %g3, TSTATE_PRIV_BIT, %g0		! if this trap came from the privileged mode...
501
	andcc %g3, TSTATE_PRIV_BIT, %g0		! if this trap came from the privileged mode...
732
	bnz 0f					! ...skip setting of kernel stack and primary context
502
	bnz 0f					! ...skip setting of kernel stack and primary context
733
	nop
503
	nop
734
	
504
	
735
.endif
505
.endif
736
	/*
506
	/*
737
	 * Normal window spills will go to the userspace window buffer.
507
	 * Normal window spills will go to the userspace window buffer.
738
	 */
508
	 */
739
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate
509
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate
740
 
510
 
741
	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent unnecessary clean_window exceptions
511
	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent unnecessary clean_window exceptions
742
 
512
 
743
	/*
513
	/*
744
	 * Switch to kernel stack. The old stack is
514
	 * Switch to kernel stack. The old stack is
745
	 * automatically saved in the old window's %sp
515
	 * automatically saved in the old window's %sp
746
	 * and the new window's %fp.
516
	 * and the new window's %fp.
747
	 */
517
	 */
748
	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
518
	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
749
 
519
 
750
.if \is_syscall
520
.if \is_syscall
751
	/*
521
	/*
752
	 * Copy arguments for the syscall to the new window.
522
	 * Copy arguments for the syscall to the new window.
753
	 */
523
	 */
754
	mov %i0, %o0
524
	mov %i0, %o0
755
	mov %i1, %o1
525
	mov %i1, %o1
756
	mov %i2, %o2
526
	mov %i2, %o2
757
	mov %i3, %o3
527
	mov %i3, %o3
758
	mov %i4, %o4
528
	mov %i4, %o4
759
	mov %i5, %o5
529
	mov %i5, %o5
760
.endif
530
.endif
761
 
531
 
762
	/*
532
	/*
763
	 * Mark the CANRESTORE windows as OTHER windows.
533
	 * Mark the CANRESTORE windows as OTHER windows.
764
	 */
534
	 */
765
	rdpr %canrestore, %l0
535
	rdpr %canrestore, %l0
766
	wrpr %l0, %otherwin
536
	wrpr %l0, %otherwin
767
	wrpr %g0, %canrestore
537
	wrpr %g0, %canrestore
768
 
538
 
769
	/*
539
	/*
770
	 * Switch to primary context 0.
540
	 * Switch to primary context 0.
771
	 */
541
	 */
772
	mov VA_PRIMARY_CONTEXT_REG, %l0
542
	mov VA_PRIMARY_CONTEXT_REG, %l0
773
	stxa %g0, [%l0] ASI_DMMU
543
	stxa %g0, [%l0] ASI_DMMU
774
	rd %pc, %l0
544
	rd %pc, %l0
775
	flush %l0
545
	flush %l0
776
 
546
 
777
.if NOT(\is_syscall)
547
.if NOT(\is_syscall)
778
	ba 1f
548
	ba 1f
779
	nop
549
	nop
780
0:
550
0:
781
	save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
551
	save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
782
 
552
 
783
	/*
553
	/*
784
	 * At this moment, we are using the kernel stack 
554
	 * At this moment, we are using the kernel stack 
785
	 * and have successfully allocated a register window.
555
	 * and have successfully allocated a register window.
786
	 */
556
	 */
787
1:
557
1:
788
.endif
558
.endif
789
	/*
559
	/*
790
	 * Other window spills will go to the userspace window buffer
560
	 * Other window spills will go to the userspace window buffer
791
	 * and normal spills will go to the kernel stack.
561
	 * and normal spills will go to the kernel stack.
792
	 */
562
	 */
793
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(0), %wstate
563
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(0), %wstate
794
	
564
	
795
	/*
565
	/*
796
	 * Copy arguments.
566
	 * Copy arguments.
797
	 */
567
	 */
798
	mov %g1, %l0
568
	mov %g1, %l0
799
.if NOT(\is_syscall)
569
.if NOT(\is_syscall)
800
	mov %g2, %o0
570
	mov %g2, %o0
801
.else
571
.else
802
	! store the syscall number on the stack as 7th argument
572
	! store the syscall number on the stack as 7th argument
803
	stx %g2, [%sp + STACK_WINDOW_SAVE_AREA_SIZE + STACK_BIAS + STACK_ARG6] 
573
	stx %g2, [%sp + STACK_WINDOW_SAVE_AREA_SIZE + STACK_BIAS + STACK_ARG6] 
804
.endif
574
.endif
805
 
575
 
806
	/*
576
	/*
807
	 * Save TSTATE, TPC and TNPC aside.
577
	 * Save TSTATE, TPC and TNPC aside.
808
	 */
578
	 */
809
	rdpr %tstate, %g1
579
	rdpr %tstate, %g1
810
	rdpr %tpc, %g2
580
	rdpr %tpc, %g2
811
	rdpr %tnpc, %g3
581
	rdpr %tnpc, %g3
812
	rd %y, %g4
582
	rd %y, %g4
813
 
583
 
814
	stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]
584
	stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]
815
	stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]
585
	stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]
816
	stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]
586
	stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]
817
 
587
 
818
	/*
588
	/*
819
	 * Save the Y register.
589
	 * Save the Y register.
820
	 * This register is deprecated according to SPARC V9 specification
590
	 * This register is deprecated according to SPARC V9 specification
821
	 * and is only present for backward compatibility with previous
591
	 * and is only present for backward compatibility with previous
822
	 * versions of the SPARC architecture.
592
	 * versions of the SPARC architecture.
823
	 * Surprisingly, gcc makes use of this register without a notice.
593
	 * Surprisingly, gcc makes use of this register without a notice.
824
	 */
594
	 */
825
	stx %g4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y]
595
	stx %g4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y]
826
	
596
	
827
	wrpr %g0, 0, %tl
597
	wrpr %g0, 0, %tl
828
	wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate
598
	wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate
829
	SAVE_GLOBALS
599
	SAVE_GLOBALS
830
	
600
	
831
.if NOT(\is_syscall)
601
.if NOT(\is_syscall)
832
	/*
602
	/*
833
	 * Call the higher-level handler and pass istate as second parameter.
603
	 * Call the higher-level handler and pass istate as second parameter.
834
	 */
604
	 */
835
	call %l0
605
	call %l0
836
	add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1
606
	add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1
837
.else
607
.else
838
	/*
608
	/*
839
	 * Call the higher-level syscall handler.
609
	 * Call the higher-level syscall handler.
840
	 */
610
	 */
841
	call syscall_handler
611
	call syscall_handler
842
	nop
612
	nop
843
	mov %o0, %i0				! copy the value returned by the syscall
613
	mov %o0, %i0				! copy the value returned by the syscall
844
.endif
614
.endif
845
 
615
 
846
	RESTORE_GLOBALS
616
	RESTORE_GLOBALS
847
	rdpr %pstate, %l1			! we must preserve the PEF bit
617
	rdpr %pstate, %l1			! we must preserve the PEF bit
848
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
618
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
849
	wrpr %g0, 1, %tl
619
	wrpr %g0, 1, %tl
850
	
620
	
851
	/*
621
	/*
852
	 * Read TSTATE, TPC and TNPC from saved copy.
622
	 * Read TSTATE, TPC and TNPC from saved copy.
853
	 */
623
	 */
854
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
624
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
855
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
625
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
856
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
626
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
857
 
627
 
858
	/*
628
	/*
859
	 * Copy PSTATE.PEF to the in-register copy of TSTATE.
629
	 * Copy PSTATE.PEF to the in-register copy of TSTATE.
860
	 */
630
	 */
861
	and %l1, PSTATE_PEF_BIT, %l1
631
	and %l1, PSTATE_PEF_BIT, %l1
862
	sllx %l1, TSTATE_PSTATE_SHIFT, %l1
632
	sllx %l1, TSTATE_PSTATE_SHIFT, %l1
863
	sethi %hi(TSTATE_PEF_BIT), %g4
633
	sethi %hi(TSTATE_PEF_BIT), %g4
864
	andn %g1, %g4, %g1
634
	andn %g1, %g4, %g1
865
	or %g1, %l1, %g1
635
	or %g1, %l1, %g1
866
 
636
 
867
	/*
637
	/*
868
	 * Restore TSTATE, TPC and TNPC from saved copies.
638
	 * Restore TSTATE, TPC and TNPC from saved copies.
869
	 */
639
	 */
870
	wrpr %g1, 0, %tstate
640
	wrpr %g1, 0, %tstate
871
	wrpr %g2, 0, %tpc
641
	wrpr %g2, 0, %tpc
872
	wrpr %g3, 0, %tnpc
642
	wrpr %g3, 0, %tnpc
873
 
643
 
874
	/*
644
	/*
875
	 * Restore Y.
645
	 * Restore Y.
876
	 */
646
	 */
877
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4
647
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4
878
	wr %g4, %y
648
	wr %g4, %y
879
 
649
 
880
	/*
650
	/*
881
	 * If OTHERWIN is zero, then all the userspace windows have been
651
	 * If OTHERWIN is zero, then all the userspace windows have been
882
	 * spilled to kernel memory (i.e. register window buffer). Moreover,
652
	 * spilled to kernel memory (i.e. register window buffer). Moreover,
883
	 * if the scheduler was called in the meantime, all valid windows
653
	 * if the scheduler was called in the meantime, all valid windows
884
	 * belonging to other threads were spilled by context_restore().
654
	 * belonging to other threads were spilled by context_restore().
885
	 * If OTHERWIN is non-zero, then some userspace windows are still
655
	 * If OTHERWIN is non-zero, then some userspace windows are still
886
	 * valid. Others might have been spilled. However, the CWP pointer
656
	 * valid. Others might have been spilled. However, the CWP pointer
887
	 * needs no fixing because the scheduler had not been called.
657
	 * needs no fixing because the scheduler had not been called.
888
	 */
658
	 */
889
	rdpr %otherwin, %l0
659
	rdpr %otherwin, %l0
890
	brnz %l0, 0f
660
	brnz %l0, 0f
891
	nop
661
	nop
892
 
662
 
893
	/*
663
	/*
894
	 * OTHERWIN == 0
664
	 * OTHERWIN == 0
895
	 */
665
	 */
896
 
666
 
897
	/*
667
	/*
898
	 * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP.
668
	 * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP.
899
	 */
669
	 */
900
	and %g1, TSTATE_CWP_MASK, %l0
670
	and %g1, TSTATE_CWP_MASK, %l0
901
	inc %l0
671
	inc %l0
902
	and %l0, NWINDOWS - 1, %l0	! %l0 mod NWINDOWS
672
	and %l0, NWINDOWS - 1, %l0	! %l0 mod NWINDOWS
903
	rdpr %cwp, %l1
673
	rdpr %cwp, %l1
904
	cmp %l0, %l1
674
	cmp %l0, %l1
905
	bz 0f				! CWP is ok
675
	bz 0f				! CWP is ok
906
	nop
676
	nop
907
 
677
 
908
	/*
678
	/*
909
	 * Fix CWP.
679
	 * Fix CWP.
910
	 * In order to recapitulate, the input registers in the current
680
	 * In order to recapitulate, the input registers in the current
911
	 * window are the output registers of the window to which we want
681
	 * window are the output registers of the window to which we want
912
	 * to restore. Because the fill trap fills only input and local
682
	 * to restore. Because the fill trap fills only input and local
913
	 * registers of a window, we need to preserve those output
683
	 * registers of a window, we need to preserve those output
914
	 * registers manually.
684
	 * registers manually.
915
	 */
685
	 */
916
	mov %sp, %g2
686
	mov %sp, %g2
917
	stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0]
687
	stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0]
918
	stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1]
688
	stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1]
919
	stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2]
689
	stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2]
920
	stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3]
690
	stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3]
921
	stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4]
691
	stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4]
922
	stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5]
692
	stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5]
923
	stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6]
693
	stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6]
924
	stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7]
694
	stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7]
925
	wrpr %l0, 0, %cwp
695
	wrpr %l0, 0, %cwp
926
	mov %g2, %sp
696
	mov %g2, %sp
927
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0
697
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0
928
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1
698
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1
929
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2
699
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2
930
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3
700
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3
931
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4
701
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4
932
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5
702
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5
933
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6
703
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6
934
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7
704
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7
935
 
705
 
936
	/*
706
	/*
937
	 * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
707
	 * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
938
	 * The CWP has already been restored to the value it had after the SAVE
708
	 * The CWP has already been restored to the value it had after the SAVE
939
	 * at the beginning of this function.
709
	 * at the beginning of this function.
940
	 */
710
	 */
941
0:
711
0:
942
.if NOT(\is_syscall)
712
.if NOT(\is_syscall)
943
	rdpr %tstate, %g1
713
	rdpr %tstate, %g1
944
	andcc %g1, TSTATE_PRIV_BIT, %g0		! if we are not returning to userspace...,
714
	andcc %g1, TSTATE_PRIV_BIT, %g0		! if we are not returning to userspace...,
945
	bnz 1f					! ...skip restoring userspace windows
715
	bnz 1f					! ...skip restoring userspace windows
946
	nop
716
	nop
947
.endif
717
.endif
948
 
718
 
949
	/*
719
	/*
950
	 * Spills and fills will be processed by the {spill,fill}_1_normal
720
	 * Spills and fills will be processed by the {spill,fill}_1_normal
951
	 * handlers.
721
	 * handlers.
952
	 */
722
	 */
953
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate
723
	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate
954
 
724
 
955
	/*
725
	/*
956
	 * Set primary context according to secondary context.
726
	 * Set primary context according to secondary context.
957
	 */
727
	 */
958
	wr %g0, ASI_DMMU, %asi
728
	wr %g0, ASI_DMMU, %asi
959
	ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1
729
	ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1
960
	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi
730
	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi
961
	rd %pc, %g1
731
	rd %pc, %g1
962
	flush %g1
732
	flush %g1
963
	
733
	
964
	rdpr %cwp, %g1
734
	rdpr %cwp, %g1
965
	rdpr %otherwin, %g2
735
	rdpr %otherwin, %g2
966
 
736
 
967
	/*
737
	/*
968
	 * Skip all OTHERWIN windows and descend to the first window
738
	 * Skip all OTHERWIN windows and descend to the first window
969
	 * in the userspace window buffer.
739
	 * in the userspace window buffer.
970
	 */
740
	 */
971
	sub %g1, %g2, %g3
741
	sub %g1, %g2, %g3
972
	dec %g3
742
	dec %g3
973
	and %g3, NWINDOWS - 1, %g3
743
	and %g3, NWINDOWS - 1, %g3
974
	wrpr %g3, 0, %cwp
744
	wrpr %g3, 0, %cwp
975
 
745
 
976
	/*
746
	/*
977
	 * CWP is now in the window last saved in the userspace window buffer.
747
	 * CWP is now in the window last saved in the userspace window buffer.
978
	 * Fill all windows stored in the buffer.
748
	 * Fill all windows stored in the buffer.
979
	 */
749
	 */
980
	clr %g4
750
	clr %g4
981
	set PAGE_SIZE - 1, %g5
751
	set PAGE_SIZE - 1, %g5
982
0:	andcc %g7, %g5, %g0			! PAGE_SIZE alignment check
752
0:	andcc %g7, %g5, %g0			! PAGE_SIZE alignment check
983
	bz 0f					! %g7 is page-aligned, no more windows to refill
753
	bz 0f					! %g7 is page-aligned, no more windows to refill
984
	nop
754
	nop
985
 
755
 
986
	add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7
756
	add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7
987
	ldx [%g7 + L0_OFFSET], %l0
757
	ldx [%g7 + L0_OFFSET], %l0
988
	ldx [%g7 + L1_OFFSET], %l1
758
	ldx [%g7 + L1_OFFSET], %l1
989
	ldx [%g7 + L2_OFFSET], %l2
759
	ldx [%g7 + L2_OFFSET], %l2
990
	ldx [%g7 + L3_OFFSET], %l3
760
	ldx [%g7 + L3_OFFSET], %l3
991
	ldx [%g7 + L4_OFFSET], %l4
761
	ldx [%g7 + L4_OFFSET], %l4
992
	ldx [%g7 + L5_OFFSET], %l5
762
	ldx [%g7 + L5_OFFSET], %l5
993
	ldx [%g7 + L6_OFFSET], %l6
763
	ldx [%g7 + L6_OFFSET], %l6
994
	ldx [%g7 + L7_OFFSET], %l7
764
	ldx [%g7 + L7_OFFSET], %l7
995
	ldx [%g7 + I0_OFFSET], %i0
765
	ldx [%g7 + I0_OFFSET], %i0
996
	ldx [%g7 + I1_OFFSET], %i1
766
	ldx [%g7 + I1_OFFSET], %i1
997
	ldx [%g7 + I2_OFFSET], %i2
767
	ldx [%g7 + I2_OFFSET], %i2
998
	ldx [%g7 + I3_OFFSET], %i3
768
	ldx [%g7 + I3_OFFSET], %i3
999
	ldx [%g7 + I4_OFFSET], %i4
769
	ldx [%g7 + I4_OFFSET], %i4
1000
	ldx [%g7 + I5_OFFSET], %i5
770
	ldx [%g7 + I5_OFFSET], %i5
1001
	ldx [%g7 + I6_OFFSET], %i6
771
	ldx [%g7 + I6_OFFSET], %i6
1002
	ldx [%g7 + I7_OFFSET], %i7
772
	ldx [%g7 + I7_OFFSET], %i7
1003
 
773
 
1004
	dec %g3
774
	dec %g3
1005
	and %g3, NWINDOWS - 1, %g3
775
	and %g3, NWINDOWS - 1, %g3
1006
	wrpr %g3, 0, %cwp			! switch to the preceeding window
776
	wrpr %g3, 0, %cwp			! switch to the preceeding window
1007
 
777
 
1008
	ba 0b
778
	ba 0b
1009
	inc %g4
779
	inc %g4
1010
 
780
 
1011
0:
781
0:
1012
	/*
782
	/*
1013
	 * Switch back to the proper current window and adjust
783
	 * Switch back to the proper current window and adjust
1014
	 * OTHERWIN, CANRESTORE, CANSAVE and CLEANWIN.
784
	 * OTHERWIN, CANRESTORE, CANSAVE and CLEANWIN.
1015
	 */
785
	 */
1016
	wrpr %g1, 0, %cwp
786
	wrpr %g1, 0, %cwp
1017
	add %g4, %g2, %g2
787
	add %g4, %g2, %g2
1018
	cmp %g2, NWINDOWS - 2
788
	cmp %g2, NWINDOWS - 2
1019
	bg 2f					! fix the CANRESTORE=NWINDOWS-1 anomaly
789
	bg 2f					! fix the CANRESTORE=NWINDOWS-1 anomaly
1020
	mov NWINDOWS - 2, %g1			! use dealy slot for both cases
790
	mov NWINDOWS - 2, %g1			! use dealy slot for both cases
1021
	sub %g1, %g2, %g1
791
	sub %g1, %g2, %g1
1022
	
792
	
1023
	wrpr %g0, 0, %otherwin
793
	wrpr %g0, 0, %otherwin
1024
	wrpr %g1, 0, %cansave			! NWINDOWS - 2 - CANRESTORE
794
	wrpr %g1, 0, %cansave			! NWINDOWS - 2 - CANRESTORE
1025
	wrpr %g2, 0, %canrestore		! OTHERWIN + windows in the buffer
795
	wrpr %g2, 0, %canrestore		! OTHERWIN + windows in the buffer
1026
	wrpr %g2, 0, %cleanwin			! avoid information leak
796
	wrpr %g2, 0, %cleanwin			! avoid information leak
1027
 
797
 
1028
1:
798
1:
1029
	restore
799
	restore
1030
 
800
 
1031
.if \is_syscall
801
.if \is_syscall
1032
	done
802
	done
1033
.else
803
.else
1034
	retry
804
	retry
1035
.endif
805
.endif
1036
 
806
 
1037
	/*
807
	/*
1038
	 * We got here in order to avoid inconsistency of the window state registers.
808
	 * We got here in order to avoid inconsistency of the window state registers.
1039
	 * If the:
809
	 * If the:
1040
	 *
810
	 *
1041
	 * 	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
811
	 * 	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
1042
	 *
812
	 *
1043
	 * instruction trapped and spilled a register window into the userspace
813
	 * instruction trapped and spilled a register window into the userspace
1044
	 * window buffer, we have just restored NWINDOWS - 1 register windows.
814
	 * window buffer, we have just restored NWINDOWS - 1 register windows.
1045
	 * However, CANRESTORE can be only NWINDOW - 2 at most.
815
	 * However, CANRESTORE can be only NWINDOW - 2 at most.
1046
	 *
816
	 *
1047
	 * The solution is to manually switch to (CWP - 1) mod NWINDOWS
817
	 * The solution is to manually switch to (CWP - 1) mod NWINDOWS
1048
	 * and set the window state registers so that:
818
	 * and set the window state registers so that:
1049
	 *
819
	 *
1050
	 * 	CANRESTORE 	= NWINDOWS - 2
820
	 * 	CANRESTORE 	= NWINDOWS - 2
1051
	 *	CLEANWIN	= NWINDOWS - 2
821
	 *	CLEANWIN	= NWINDOWS - 2
1052
	 *	CANSAVE 	= 0
822
	 *	CANSAVE 	= 0
1053
	 *	OTHERWIN	= 0
823
	 *	OTHERWIN	= 0
1054
	 *
824
	 *
1055
	 * The RESTORE instruction is therfore to be skipped.
825
	 * The RESTORE instruction is therfore to be skipped.
1056
	 */
826
	 */
1057
2:
827
2:
1058
	wrpr %g0, 0, %otherwin
828
	wrpr %g0, 0, %otherwin
1059
	wrpr %g0, 0, %cansave
829
	wrpr %g0, 0, %cansave
1060
	wrpr %g1, 0, %canrestore
830
	wrpr %g1, 0, %canrestore
1061
	wrpr %g1, 0, %cleanwin
831
	wrpr %g1, 0, %cleanwin
1062
 
832
 
1063
	rdpr %cwp, %g1
833
	rdpr %cwp, %g1
1064
	dec %g1
834
	dec %g1
1065
	and %g1, NWINDOWS - 1, %g1
835
	and %g1, NWINDOWS - 1, %g1
1066
	wrpr %g1, 0, %cwp			! CWP--
836
	wrpr %g1, 0, %cwp			! CWP--
1067
	
837
	
1068
.if \is_syscall
838
.if \is_syscall
1069
	done
839
	done
1070
.else
840
.else
1071
	retry
841
	retry
1072
.endif
842
.endif
1073
 
843
 
1074
.endm
844
.endm
1075
 
845
 
1076
.global preemptible_handler
846
.global preemptible_handler
1077
preemptible_handler:
847
preemptible_handler:
1078
	PREEMPTIBLE_HANDLER_TEMPLATE 0
848
	PREEMPTIBLE_HANDLER_TEMPLATE 0
1079
 
849
 
1080
.global trap_instruction_handler
850
.global trap_instruction_handler
1081
trap_instruction_handler:
851
trap_instruction_handler:
1082
	PREEMPTIBLE_HANDLER_TEMPLATE 1
852
	PREEMPTIBLE_HANDLER_TEMPLATE 1
1083
 
853