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1 | # |
1 | # |
2 | # Copyright (C) 2005 Jakub Jermar |
2 | # Copyright (C) 2005 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | /** |
29 | /** |
30 | * @file |
30 | * @file |
31 | * @brief This file contains kernel trap table. |
31 | * @brief This file contains kernel trap table. |
32 | */ |
32 | */ |
33 | 33 | ||
34 | .register %g2, #scratch |
34 | .register %g2, #scratch |
35 | .register %g3, #scratch |
35 | .register %g3, #scratch |
36 | 36 | ||
37 | .text |
37 | .text |
38 | 38 | ||
39 | #include <arch/trap/trap_table.h> |
39 | #include <arch/trap/trap_table.h> |
40 | #include <arch/trap/regwin.h> |
40 | #include <arch/trap/regwin.h> |
41 | #include <arch/trap/interrupt.h> |
41 | #include <arch/trap/interrupt.h> |
42 | #include <arch/trap/exception.h> |
42 | #include <arch/trap/exception.h> |
43 | #include <arch/trap/syscall.h> |
43 | #include <arch/trap/syscall.h> |
44 | #include <arch/trap/mmu.h> |
44 | #include <arch/trap/mmu.h> |
45 | #include <arch/mm/mmu.h> |
45 | #include <arch/mm/mmu.h> |
46 | #include <arch/mm/page.h> |
46 | #include <arch/mm/page.h> |
47 | #include <arch/stack.h> |
47 | #include <arch/stack.h> |
48 | #include <arch/regdef.h> |
48 | #include <arch/regdef.h> |
49 | 49 | ||
50 | #define TABLE_SIZE TRAP_TABLE_SIZE |
50 | #define TABLE_SIZE TRAP_TABLE_SIZE |
51 | #define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
51 | #define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
52 | 52 | ||
53 | /* |
53 | /* |
54 | * Kernel trap table. |
54 | * Kernel trap table. |
55 | */ |
55 | */ |
56 | .align TABLE_SIZE |
56 | .align TABLE_SIZE |
57 | .global trap_table |
57 | .global trap_table |
58 | trap_table: |
58 | trap_table: |
59 | 59 | ||
60 | /* TT = 0x08, TL = 0, instruction_access_exception */ |
60 | /* TT = 0x08, TL = 0, instruction_access_exception */ |
61 | .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
61 | .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
62 | .global instruction_access_exception_tl0 |
62 | .global instruction_access_exception_tl0 |
63 | instruction_access_exception_tl0: |
63 | instruction_access_exception_tl0: |
64 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
64 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
65 | PREEMPTIBLE_HANDLER instruction_access_exception |
65 | PREEMPTIBLE_HANDLER instruction_access_exception |
66 | 66 | ||
67 | /* TT = 0x0a, TL = 0, instruction_access_error */ |
67 | /* TT = 0x0a, TL = 0, instruction_access_error */ |
68 | .org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE |
68 | .org trap_table + TT_INSTRUCTION_ACCESS_ERROR*ENTRY_SIZE |
69 | .global instruction_access_error_tl0 |
69 | .global instruction_access_error_tl0 |
70 | instruction_access_error_tl0: |
70 | instruction_access_error_tl0: |
71 | PREEMPTIBLE_HANDLER instruction_access_error |
71 | PREEMPTIBLE_HANDLER instruction_access_error |
72 | 72 | ||
73 | /* TT = 0x10, TL = 0, illegal_instruction */ |
73 | /* TT = 0x10, TL = 0, illegal_instruction */ |
74 | .org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE |
74 | .org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE |
75 | .global illegal_instruction_tl0 |
75 | .global illegal_instruction_tl0 |
76 | illegal_instruction_tl0: |
76 | illegal_instruction_tl0: |
77 | PREEMPTIBLE_HANDLER illegal_instruction |
77 | PREEMPTIBLE_HANDLER illegal_instruction |
78 | 78 | ||
79 | /* TT = 0x11, TL = 0, privileged_opcode */ |
79 | /* TT = 0x11, TL = 0, privileged_opcode */ |
80 | .org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE |
80 | .org trap_table + TT_PRIVILEGED_OPCODE*ENTRY_SIZE |
81 | .global privileged_opcode_tl0 |
81 | .global privileged_opcode_tl0 |
82 | privileged_opcode_tl0: |
82 | privileged_opcode_tl0: |
83 | PREEMPTIBLE_HANDLER privileged_opcode |
83 | PREEMPTIBLE_HANDLER privileged_opcode |
84 | 84 | ||
- | 85 | /* TT = 0x20, TL = 0, fb_disabled handler */ |
|
- | 86 | .org trap_table + TT_FP_DISABLED*ENTRY_SIZE |
|
- | 87 | .global fb_disabled_tl0 |
|
- | 88 | fp_disabled_tl0: |
|
- | 89 | PREEMPTIBLE_HANDLER fp_disabled |
|
- | 90 | ||
85 | /* TT = 0x24, TL = 0, clean_window handler */ |
91 | /* TT = 0x24, TL = 0, clean_window handler */ |
86 | .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
92 | .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
87 | .global clean_window_handler_tl0 |
93 | .global clean_window_tl0 |
88 | clean_window_handler_tl0: |
94 | clean_window_tl0: |
89 | CLEAN_WINDOW_HANDLER |
95 | CLEAN_WINDOW_HANDLER |
90 | 96 | ||
91 | /* TT = 0x28, TL = 0, division_by_zero */ |
97 | /* TT = 0x28, TL = 0, division_by_zero */ |
92 | .org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE |
98 | .org trap_table + TT_DIVISION_BY_ZERO*ENTRY_SIZE |
93 | .global division_by_zero_tl0 |
99 | .global division_by_zero_tl0 |
94 | division_by_zero_tl0: |
100 | division_by_zero_tl0: |
95 | PREEMPTIBLE_HANDLER division_by_zero |
101 | PREEMPTIBLE_HANDLER division_by_zero |
96 | 102 | ||
97 | /* TT = 0x30, TL = 0, data_access_exception */ |
103 | /* TT = 0x30, TL = 0, data_access_exception */ |
98 | .org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE |
104 | .org trap_table + TT_DATA_ACCESS_EXCEPTION*ENTRY_SIZE |
99 | .global data_access_exception_tl0 |
105 | .global data_access_exception_tl0 |
100 | data_access_exception_tl0: |
106 | data_access_exception_tl0: |
101 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
107 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
102 | PREEMPTIBLE_HANDLER data_access_exception |
108 | PREEMPTIBLE_HANDLER data_access_exception |
103 | 109 | ||
104 | /* TT = 0x32, TL = 0, data_access_error */ |
110 | /* TT = 0x32, TL = 0, data_access_error */ |
105 | .org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE |
111 | .org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE |
106 | .global data_access_error_tl0 |
112 | .global data_access_error_tl0 |
107 | data_access_error_tl0: |
113 | data_access_error_tl0: |
108 | PREEMPTIBLE_HANDLER data_access_error |
114 | PREEMPTIBLE_HANDLER data_access_error |
109 | 115 | ||
110 | /* TT = 0x34, TL = 0, mem_address_not_aligned */ |
116 | /* TT = 0x34, TL = 0, mem_address_not_aligned */ |
111 | .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
117 | .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
112 | .global mem_address_not_aligned_tl0 |
118 | .global mem_address_not_aligned_tl0 |
113 | mem_address_not_aligned_tl0: |
119 | mem_address_not_aligned_tl0: |
114 | PREEMPTIBLE_HANDLER mem_address_not_aligned |
120 | PREEMPTIBLE_HANDLER mem_address_not_aligned |
115 | 121 | ||
116 | /* TT = 0x38, TL = 0, privileged_action */ |
122 | /* TT = 0x38, TL = 0, privileged_action */ |
117 | .org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE |
123 | .org trap_table + TT_PRIVILEGED_ACTION*ENTRY_SIZE |
118 | .global privileged_action_tl0 |
124 | .global privileged_action_tl0 |
119 | privileged_action_tl0: |
125 | privileged_action_tl0: |
120 | PREEMPTIBLE_HANDLER privileged_action |
126 | PREEMPTIBLE_HANDLER privileged_action |
121 | 127 | ||
122 | /* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
128 | /* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
123 | .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
129 | .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
124 | .global interrupt_level_1_handler_tl0 |
130 | .global interrupt_level_1_handler_tl0 |
125 | interrupt_level_1_handler_tl0: |
131 | interrupt_level_1_handler_tl0: |
126 | INTERRUPT_LEVEL_N_HANDLER 1 |
132 | INTERRUPT_LEVEL_N_HANDLER 1 |
127 | 133 | ||
128 | /* TT = 0x42, TL = 0, interrupt_level_2 handler */ |
134 | /* TT = 0x42, TL = 0, interrupt_level_2 handler */ |
129 | .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE |
135 | .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE |
130 | .global interrupt_level_2_handler_tl0 |
136 | .global interrupt_level_2_handler_tl0 |
131 | interrupt_level_2_handler_tl0: |
137 | interrupt_level_2_handler_tl0: |
132 | INTERRUPT_LEVEL_N_HANDLER 2 |
138 | INTERRUPT_LEVEL_N_HANDLER 2 |
133 | 139 | ||
134 | /* TT = 0x43, TL = 0, interrupt_level_3 handler */ |
140 | /* TT = 0x43, TL = 0, interrupt_level_3 handler */ |
135 | .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE |
141 | .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE |
136 | .global interrupt_level_3_handler_tl0 |
142 | .global interrupt_level_3_handler_tl0 |
137 | interrupt_level_3_handler_tl0: |
143 | interrupt_level_3_handler_tl0: |
138 | INTERRUPT_LEVEL_N_HANDLER 3 |
144 | INTERRUPT_LEVEL_N_HANDLER 3 |
139 | 145 | ||
140 | /* TT = 0x44, TL = 0, interrupt_level_4 handler */ |
146 | /* TT = 0x44, TL = 0, interrupt_level_4 handler */ |
141 | .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE |
147 | .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE |
142 | .global interrupt_level_4_handler_tl0 |
148 | .global interrupt_level_4_handler_tl0 |
143 | interrupt_level_4_handler_tl0: |
149 | interrupt_level_4_handler_tl0: |
144 | INTERRUPT_LEVEL_N_HANDLER 4 |
150 | INTERRUPT_LEVEL_N_HANDLER 4 |
145 | 151 | ||
146 | /* TT = 0x45, TL = 0, interrupt_level_5 handler */ |
152 | /* TT = 0x45, TL = 0, interrupt_level_5 handler */ |
147 | .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE |
153 | .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE |
148 | .global interrupt_level_5_handler_tl0 |
154 | .global interrupt_level_5_handler_tl0 |
149 | interrupt_level_5_handler_tl0: |
155 | interrupt_level_5_handler_tl0: |
150 | INTERRUPT_LEVEL_N_HANDLER 5 |
156 | INTERRUPT_LEVEL_N_HANDLER 5 |
151 | 157 | ||
152 | /* TT = 0x46, TL = 0, interrupt_level_6 handler */ |
158 | /* TT = 0x46, TL = 0, interrupt_level_6 handler */ |
153 | .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE |
159 | .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE |
154 | .global interrupt_level_6_handler_tl0 |
160 | .global interrupt_level_6_handler_tl0 |
155 | interrupt_level_6_handler_tl0: |
161 | interrupt_level_6_handler_tl0: |
156 | INTERRUPT_LEVEL_N_HANDLER 6 |
162 | INTERRUPT_LEVEL_N_HANDLER 6 |
157 | 163 | ||
158 | /* TT = 0x47, TL = 0, interrupt_level_7 handler */ |
164 | /* TT = 0x47, TL = 0, interrupt_level_7 handler */ |
159 | .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE |
165 | .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE |
160 | .global interrupt_level_7_handler_tl0 |
166 | .global interrupt_level_7_handler_tl0 |
161 | interrupt_level_7_handler_tl0: |
167 | interrupt_level_7_handler_tl0: |
162 | INTERRUPT_LEVEL_N_HANDLER 7 |
168 | INTERRUPT_LEVEL_N_HANDLER 7 |
163 | 169 | ||
164 | /* TT = 0x48, TL = 0, interrupt_level_8 handler */ |
170 | /* TT = 0x48, TL = 0, interrupt_level_8 handler */ |
165 | .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE |
171 | .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE |
166 | .global interrupt_level_8_handler_tl0 |
172 | .global interrupt_level_8_handler_tl0 |
167 | interrupt_level_8_handler_tl0: |
173 | interrupt_level_8_handler_tl0: |
168 | INTERRUPT_LEVEL_N_HANDLER 8 |
174 | INTERRUPT_LEVEL_N_HANDLER 8 |
169 | 175 | ||
170 | /* TT = 0x49, TL = 0, interrupt_level_9 handler */ |
176 | /* TT = 0x49, TL = 0, interrupt_level_9 handler */ |
171 | .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE |
177 | .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE |
172 | .global interrupt_level_9_handler_tl0 |
178 | .global interrupt_level_9_handler_tl0 |
173 | interrupt_level_9_handler_tl0: |
179 | interrupt_level_9_handler_tl0: |
174 | INTERRUPT_LEVEL_N_HANDLER 9 |
180 | INTERRUPT_LEVEL_N_HANDLER 9 |
175 | 181 | ||
176 | /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ |
182 | /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ |
177 | .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE |
183 | .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE |
178 | .global interrupt_level_10_handler_tl0 |
184 | .global interrupt_level_10_handler_tl0 |
179 | interrupt_level_10_handler_tl0: |
185 | interrupt_level_10_handler_tl0: |
180 | INTERRUPT_LEVEL_N_HANDLER 10 |
186 | INTERRUPT_LEVEL_N_HANDLER 10 |
181 | 187 | ||
182 | /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ |
188 | /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ |
183 | .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE |
189 | .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE |
184 | .global interrupt_level_11_handler_tl0 |
190 | .global interrupt_level_11_handler_tl0 |
185 | interrupt_level_11_handler_tl0: |
191 | interrupt_level_11_handler_tl0: |
186 | INTERRUPT_LEVEL_N_HANDLER 11 |
192 | INTERRUPT_LEVEL_N_HANDLER 11 |
187 | 193 | ||
188 | /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ |
194 | /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ |
189 | .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE |
195 | .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE |
190 | .global interrupt_level_12_handler_tl0 |
196 | .global interrupt_level_12_handler_tl0 |
191 | interrupt_level_12_handler_tl0: |
197 | interrupt_level_12_handler_tl0: |
192 | INTERRUPT_LEVEL_N_HANDLER 12 |
198 | INTERRUPT_LEVEL_N_HANDLER 12 |
193 | 199 | ||
194 | /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ |
200 | /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ |
195 | .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE |
201 | .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE |
196 | .global interrupt_level_13_handler_tl0 |
202 | .global interrupt_level_13_handler_tl0 |
197 | interrupt_level_13_handler_tl0: |
203 | interrupt_level_13_handler_tl0: |
198 | INTERRUPT_LEVEL_N_HANDLER 13 |
204 | INTERRUPT_LEVEL_N_HANDLER 13 |
199 | 205 | ||
200 | /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ |
206 | /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ |
201 | .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE |
207 | .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE |
202 | .global interrupt_level_14_handler_tl0 |
208 | .global interrupt_level_14_handler_tl0 |
203 | interrupt_level_14_handler_tl0: |
209 | interrupt_level_14_handler_tl0: |
204 | INTERRUPT_LEVEL_N_HANDLER 14 |
210 | INTERRUPT_LEVEL_N_HANDLER 14 |
205 | 211 | ||
206 | /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ |
212 | /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ |
207 | .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE |
213 | .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE |
208 | .global interrupt_level_15_handler_tl0 |
214 | .global interrupt_level_15_handler_tl0 |
209 | interrupt_level_15_handler_tl0: |
215 | interrupt_level_15_handler_tl0: |
210 | INTERRUPT_LEVEL_N_HANDLER 15 |
216 | INTERRUPT_LEVEL_N_HANDLER 15 |
211 | 217 | ||
212 | /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ |
218 | /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ |
213 | .org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE |
219 | .org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE |
214 | .global interrupt_vector_trap_handler_tl0 |
220 | .global interrupt_vector_trap_handler_tl0 |
215 | interrupt_vector_trap_handler_tl0: |
221 | interrupt_vector_trap_handler_tl0: |
216 | INTERRUPT_VECTOR_TRAP_HANDLER |
222 | INTERRUPT_VECTOR_TRAP_HANDLER |
217 | 223 | ||
218 | /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ |
224 | /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ |
219 | .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE |
225 | .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE |
220 | .global fast_instruction_access_mmu_miss_handler_tl0 |
226 | .global fast_instruction_access_mmu_miss_handler_tl0 |
221 | fast_instruction_access_mmu_miss_handler_tl0: |
227 | fast_instruction_access_mmu_miss_handler_tl0: |
222 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
228 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
223 | 229 | ||
224 | /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ |
230 | /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ |
225 | .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE |
231 | .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE |
226 | .global fast_data_access_mmu_miss_handler_tl0 |
232 | .global fast_data_access_mmu_miss_handler_tl0 |
227 | fast_data_access_mmu_miss_handler_tl0: |
233 | fast_data_access_mmu_miss_handler_tl0: |
228 | FAST_DATA_ACCESS_MMU_MISS_HANDLER 0 |
234 | FAST_DATA_ACCESS_MMU_MISS_HANDLER 0 |
229 | 235 | ||
230 | /* TT = 0x6c, TL = 0, fast_data_access_protection */ |
236 | /* TT = 0x6c, TL = 0, fast_data_access_protection */ |
231 | .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE |
237 | .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE |
232 | .global fast_data_access_protection_handler_tl0 |
238 | .global fast_data_access_protection_handler_tl0 |
233 | fast_data_access_protection_handler_tl0: |
239 | fast_data_access_protection_handler_tl0: |
234 | FAST_DATA_ACCESS_PROTECTION_HANDLER 0 |
240 | FAST_DATA_ACCESS_PROTECTION_HANDLER 0 |
235 | 241 | ||
236 | /* TT = 0x80, TL = 0, spill_0_normal handler */ |
242 | /* TT = 0x80, TL = 0, spill_0_normal handler */ |
237 | .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE |
243 | .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE |
238 | .global spill_0_normal_tl0 |
244 | .global spill_0_normal_tl0 |
239 | spill_0_normal_tl0: |
245 | spill_0_normal_tl0: |
240 | SPILL_NORMAL_HANDLER_KERNEL |
246 | SPILL_NORMAL_HANDLER_KERNEL |
241 | 247 | ||
242 | /* TT = 0x84, TL = 0, spill_1_normal handler */ |
248 | /* TT = 0x84, TL = 0, spill_1_normal handler */ |
243 | .org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE |
249 | .org trap_table + TT_SPILL_1_NORMAL*ENTRY_SIZE |
244 | .global spill_1_normal_tl0 |
250 | .global spill_1_normal_tl0 |
245 | spill_1_normal_tl0: |
251 | spill_1_normal_tl0: |
246 | SPILL_NORMAL_HANDLER_USERSPACE |
252 | SPILL_NORMAL_HANDLER_USERSPACE |
247 | 253 | ||
248 | /* TT = 0x88, TL = 0, spill_2_normal handler */ |
254 | /* TT = 0x88, TL = 0, spill_2_normal handler */ |
249 | .org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE |
255 | .org trap_table + TT_SPILL_2_NORMAL*ENTRY_SIZE |
250 | .global spill_2_normal_tl0 |
256 | .global spill_2_normal_tl0 |
251 | spill_2_normal_tl0: |
257 | spill_2_normal_tl0: |
252 | SPILL_TO_USPACE_WINDOW_BUFFER |
258 | SPILL_TO_USPACE_WINDOW_BUFFER |
253 | 259 | ||
254 | /* TT = 0xa0, TL = 0, spill_0_other handler */ |
260 | /* TT = 0xa0, TL = 0, spill_0_other handler */ |
255 | .org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE |
261 | .org trap_table + TT_SPILL_0_OTHER*ENTRY_SIZE |
256 | .global spill_0_other_tl0 |
262 | .global spill_0_other_tl0 |
257 | spill_0_other_tl0: |
263 | spill_0_other_tl0: |
258 | SPILL_TO_USPACE_WINDOW_BUFFER |
264 | SPILL_TO_USPACE_WINDOW_BUFFER |
259 | 265 | ||
260 | /* TT = 0xc0, TL = 0, fill_0_normal handler */ |
266 | /* TT = 0xc0, TL = 0, fill_0_normal handler */ |
261 | .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE |
267 | .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE |
262 | .global fill_0_normal_tl0 |
268 | .global fill_0_normal_tl0 |
263 | fill_0_normal_tl0: |
269 | fill_0_normal_tl0: |
264 | FILL_NORMAL_HANDLER_KERNEL |
270 | FILL_NORMAL_HANDLER_KERNEL |
265 | 271 | ||
266 | /* TT = 0xc4, TL = 0, fill_1_normal handler */ |
272 | /* TT = 0xc4, TL = 0, fill_1_normal handler */ |
267 | .org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE |
273 | .org trap_table + TT_FILL_1_NORMAL*ENTRY_SIZE |
268 | .global fill_1_normal_tl0 |
274 | .global fill_1_normal_tl0 |
269 | fill_1_normal_tl0: |
275 | fill_1_normal_tl0: |
270 | FILL_NORMAL_HANDLER_USERSPACE |
276 | FILL_NORMAL_HANDLER_USERSPACE |
271 | 277 | ||
272 | /* TT = 0x100, TL = 0, trap_instruction_0 */ |
278 | /* TT = 0x100, TL = 0, trap_instruction_0 */ |
273 | .org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE |
279 | .org trap_table + TT_TRAP_INSTRUCTION(0)*ENTRY_SIZE |
274 | .global trap_instruction_0_tl0 |
280 | .global trap_instruction_0_tl0 |
275 | trap_instruction_0_tl0: |
281 | trap_instruction_0_tl0: |
276 | TRAP_INSTRUCTION 0 |
282 | TRAP_INSTRUCTION 0 |
277 | 283 | ||
278 | /* TT = 0x101, TL = 0, trap_instruction_1 */ |
284 | /* TT = 0x101, TL = 0, trap_instruction_1 */ |
279 | .org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE |
285 | .org trap_table + TT_TRAP_INSTRUCTION(1)*ENTRY_SIZE |
280 | .global trap_instruction_1_tl0 |
286 | .global trap_instruction_1_tl0 |
281 | trap_instruction_1_tl0: |
287 | trap_instruction_1_tl0: |
282 | TRAP_INSTRUCTION 1 |
288 | TRAP_INSTRUCTION 1 |
283 | 289 | ||
284 | /* TT = 0x102, TL = 0, trap_instruction_2 */ |
290 | /* TT = 0x102, TL = 0, trap_instruction_2 */ |
285 | .org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE |
291 | .org trap_table + TT_TRAP_INSTRUCTION(2)*ENTRY_SIZE |
286 | .global trap_instruction_2_tl0 |
292 | .global trap_instruction_2_tl0 |
287 | trap_instruction_2_tl0: |
293 | trap_instruction_2_tl0: |
288 | TRAP_INSTRUCTION 2 |
294 | TRAP_INSTRUCTION 2 |
289 | 295 | ||
290 | /* TT = 0x103, TL = 0, trap_instruction_3 */ |
296 | /* TT = 0x103, TL = 0, trap_instruction_3 */ |
291 | .org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE |
297 | .org trap_table + TT_TRAP_INSTRUCTION(3)*ENTRY_SIZE |
292 | .global trap_instruction_3_tl0 |
298 | .global trap_instruction_3_tl0 |
293 | trap_instruction_3_tl0: |
299 | trap_instruction_3_tl0: |
294 | TRAP_INSTRUCTION 3 |
300 | TRAP_INSTRUCTION 3 |
295 | 301 | ||
296 | /* TT = 0x104, TL = 0, trap_instruction_4 */ |
302 | /* TT = 0x104, TL = 0, trap_instruction_4 */ |
297 | .org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE |
303 | .org trap_table + TT_TRAP_INSTRUCTION(4)*ENTRY_SIZE |
298 | .global trap_instruction_4_tl0 |
304 | .global trap_instruction_4_tl0 |
299 | trap_instruction_4_tl0: |
305 | trap_instruction_4_tl0: |
300 | TRAP_INSTRUCTION 4 |
306 | TRAP_INSTRUCTION 4 |
301 | 307 | ||
302 | /* TT = 0x105, TL = 0, trap_instruction_5 */ |
308 | /* TT = 0x105, TL = 0, trap_instruction_5 */ |
303 | .org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE |
309 | .org trap_table + TT_TRAP_INSTRUCTION(5)*ENTRY_SIZE |
304 | .global trap_instruction_5_tl0 |
310 | .global trap_instruction_5_tl0 |
305 | trap_instruction_5_tl0: |
311 | trap_instruction_5_tl0: |
306 | TRAP_INSTRUCTION 5 |
312 | TRAP_INSTRUCTION 5 |
307 | 313 | ||
308 | /* TT = 0x106, TL = 0, trap_instruction_6 */ |
314 | /* TT = 0x106, TL = 0, trap_instruction_6 */ |
309 | .org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE |
315 | .org trap_table + TT_TRAP_INSTRUCTION(6)*ENTRY_SIZE |
310 | .global trap_instruction_6_tl0 |
316 | .global trap_instruction_6_tl0 |
311 | trap_instruction_6_tl0: |
317 | trap_instruction_6_tl0: |
312 | TRAP_INSTRUCTION 6 |
318 | TRAP_INSTRUCTION 6 |
313 | 319 | ||
314 | /* TT = 0x107, TL = 0, trap_instruction_7 */ |
320 | /* TT = 0x107, TL = 0, trap_instruction_7 */ |
315 | .org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE |
321 | .org trap_table + TT_TRAP_INSTRUCTION(7)*ENTRY_SIZE |
316 | .global trap_instruction_7_tl0 |
322 | .global trap_instruction_7_tl0 |
317 | trap_instruction_7_tl0: |
323 | trap_instruction_7_tl0: |
318 | TRAP_INSTRUCTION 7 |
324 | TRAP_INSTRUCTION 7 |
319 | 325 | ||
320 | /* TT = 0x108, TL = 0, trap_instruction_8 */ |
326 | /* TT = 0x108, TL = 0, trap_instruction_8 */ |
321 | .org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE |
327 | .org trap_table + TT_TRAP_INSTRUCTION(8)*ENTRY_SIZE |
322 | .global trap_instruction_8_tl0 |
328 | .global trap_instruction_8_tl0 |
323 | trap_instruction_8_tl0: |
329 | trap_instruction_8_tl0: |
324 | TRAP_INSTRUCTION 8 |
330 | TRAP_INSTRUCTION 8 |
325 | 331 | ||
326 | /* TT = 0x109, TL = 0, trap_instruction_9 */ |
332 | /* TT = 0x109, TL = 0, trap_instruction_9 */ |
327 | .org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE |
333 | .org trap_table + TT_TRAP_INSTRUCTION(9)*ENTRY_SIZE |
328 | .global trap_instruction_9_tl0 |
334 | .global trap_instruction_9_tl0 |
329 | trap_instruction_9_tl0: |
335 | trap_instruction_9_tl0: |
330 | TRAP_INSTRUCTION 9 |
336 | TRAP_INSTRUCTION 9 |
331 | 337 | ||
332 | /* TT = 0x10a, TL = 0, trap_instruction_10 */ |
338 | /* TT = 0x10a, TL = 0, trap_instruction_10 */ |
333 | .org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE |
339 | .org trap_table + TT_TRAP_INSTRUCTION(10)*ENTRY_SIZE |
334 | .global trap_instruction_10_tl0 |
340 | .global trap_instruction_10_tl0 |
335 | trap_instruction_10_tl0: |
341 | trap_instruction_10_tl0: |
336 | TRAP_INSTRUCTION 10 |
342 | TRAP_INSTRUCTION 10 |
337 | 343 | ||
338 | /* TT = 0x10b, TL = 0, trap_instruction_11 */ |
344 | /* TT = 0x10b, TL = 0, trap_instruction_11 */ |
339 | .org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE |
345 | .org trap_table + TT_TRAP_INSTRUCTION(11)*ENTRY_SIZE |
340 | .global trap_instruction_11_tl0 |
346 | .global trap_instruction_11_tl0 |
341 | trap_instruction_11_tl0: |
347 | trap_instruction_11_tl0: |
342 | TRAP_INSTRUCTION 11 |
348 | TRAP_INSTRUCTION 11 |
343 | 349 | ||
344 | /* TT = 0x10c, TL = 0, trap_instruction_12 */ |
350 | /* TT = 0x10c, TL = 0, trap_instruction_12 */ |
345 | .org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE |
351 | .org trap_table + TT_TRAP_INSTRUCTION(12)*ENTRY_SIZE |
346 | .global trap_instruction_12_tl0 |
352 | .global trap_instruction_12_tl0 |
347 | trap_instruction_12_tl0: |
353 | trap_instruction_12_tl0: |
348 | TRAP_INSTRUCTION 12 |
354 | TRAP_INSTRUCTION 12 |
349 | 355 | ||
350 | /* TT = 0x10d, TL = 0, trap_instruction_13 */ |
356 | /* TT = 0x10d, TL = 0, trap_instruction_13 */ |
351 | .org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE |
357 | .org trap_table + TT_TRAP_INSTRUCTION(13)*ENTRY_SIZE |
352 | .global trap_instruction_13_tl0 |
358 | .global trap_instruction_13_tl0 |
353 | trap_instruction_13_tl0: |
359 | trap_instruction_13_tl0: |
354 | TRAP_INSTRUCTION 13 |
360 | TRAP_INSTRUCTION 13 |
355 | 361 | ||
356 | /* TT = 0x10e, TL = 0, trap_instruction_14 */ |
362 | /* TT = 0x10e, TL = 0, trap_instruction_14 */ |
357 | .org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE |
363 | .org trap_table + TT_TRAP_INSTRUCTION(14)*ENTRY_SIZE |
358 | .global trap_instruction_14_tl0 |
364 | .global trap_instruction_14_tl0 |
359 | trap_instruction_14_tl0: |
365 | trap_instruction_14_tl0: |
360 | TRAP_INSTRUCTION 14 |
366 | TRAP_INSTRUCTION 14 |
361 | 367 | ||
362 | /* TT = 0x10f, TL = 0, trap_instruction_15 */ |
368 | /* TT = 0x10f, TL = 0, trap_instruction_15 */ |
363 | .org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE |
369 | .org trap_table + TT_TRAP_INSTRUCTION(15)*ENTRY_SIZE |
364 | .global trap_instruction_15_tl0 |
370 | .global trap_instruction_15_tl0 |
365 | trap_instruction_15_tl0: |
371 | trap_instruction_15_tl0: |
366 | TRAP_INSTRUCTION 15 |
372 | TRAP_INSTRUCTION 15 |
367 | 373 | ||
368 | /* TT = 0x110, TL = 0, trap_instruction_16 */ |
374 | /* TT = 0x110, TL = 0, trap_instruction_16 */ |
369 | .org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE |
375 | .org trap_table + TT_TRAP_INSTRUCTION(16)*ENTRY_SIZE |
370 | .global trap_instruction_16_tl0 |
376 | .global trap_instruction_16_tl0 |
371 | trap_instruction_16_tl0: |
377 | trap_instruction_16_tl0: |
372 | TRAP_INSTRUCTION 16 |
378 | TRAP_INSTRUCTION 16 |
373 | 379 | ||
374 | /* TT = 0x111, TL = 0, trap_instruction_17 */ |
380 | /* TT = 0x111, TL = 0, trap_instruction_17 */ |
375 | .org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE |
381 | .org trap_table + TT_TRAP_INSTRUCTION(17)*ENTRY_SIZE |
376 | .global trap_instruction_17_tl0 |
382 | .global trap_instruction_17_tl0 |
377 | trap_instruction_17_tl0: |
383 | trap_instruction_17_tl0: |
378 | TRAP_INSTRUCTION 17 |
384 | TRAP_INSTRUCTION 17 |
379 | 385 | ||
380 | /* TT = 0x112, TL = 0, trap_instruction_18 */ |
386 | /* TT = 0x112, TL = 0, trap_instruction_18 */ |
381 | .org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE |
387 | .org trap_table + TT_TRAP_INSTRUCTION(18)*ENTRY_SIZE |
382 | .global trap_instruction_18_tl0 |
388 | .global trap_instruction_18_tl0 |
383 | trap_instruction_18_tl0: |
389 | trap_instruction_18_tl0: |
384 | TRAP_INSTRUCTION 18 |
390 | TRAP_INSTRUCTION 18 |
385 | 391 | ||
386 | /* TT = 0x113, TL = 0, trap_instruction_19 */ |
392 | /* TT = 0x113, TL = 0, trap_instruction_19 */ |
387 | .org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE |
393 | .org trap_table + TT_TRAP_INSTRUCTION(19)*ENTRY_SIZE |
388 | .global trap_instruction_19_tl0 |
394 | .global trap_instruction_19_tl0 |
389 | trap_instruction_19_tl0: |
395 | trap_instruction_19_tl0: |
390 | TRAP_INSTRUCTION 19 |
396 | TRAP_INSTRUCTION 19 |
391 | 397 | ||
392 | /* TT = 0x114, TL = 0, trap_instruction_20 */ |
398 | /* TT = 0x114, TL = 0, trap_instruction_20 */ |
393 | .org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE |
399 | .org trap_table + TT_TRAP_INSTRUCTION(20)*ENTRY_SIZE |
394 | .global trap_instruction_20_tl0 |
400 | .global trap_instruction_20_tl0 |
395 | trap_instruction_20_tl0: |
401 | trap_instruction_20_tl0: |
396 | TRAP_INSTRUCTION 20 |
402 | TRAP_INSTRUCTION 20 |
397 | 403 | ||
398 | /* TT = 0x115, TL = 0, trap_instruction_21 */ |
404 | /* TT = 0x115, TL = 0, trap_instruction_21 */ |
399 | .org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE |
405 | .org trap_table + TT_TRAP_INSTRUCTION(21)*ENTRY_SIZE |
400 | .global trap_instruction_21_tl0 |
406 | .global trap_instruction_21_tl0 |
401 | trap_instruction_21_tl0: |
407 | trap_instruction_21_tl0: |
402 | TRAP_INSTRUCTION 21 |
408 | TRAP_INSTRUCTION 21 |
403 | 409 | ||
404 | /* TT = 0x116, TL = 0, trap_instruction_22 */ |
410 | /* TT = 0x116, TL = 0, trap_instruction_22 */ |
405 | .org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE |
411 | .org trap_table + TT_TRAP_INSTRUCTION(22)*ENTRY_SIZE |
406 | .global trap_instruction_22_tl0 |
412 | .global trap_instruction_22_tl0 |
407 | trap_instruction_22_tl0: |
413 | trap_instruction_22_tl0: |
408 | TRAP_INSTRUCTION 22 |
414 | TRAP_INSTRUCTION 22 |
409 | 415 | ||
410 | /* TT = 0x117, TL = 0, trap_instruction_23 */ |
416 | /* TT = 0x117, TL = 0, trap_instruction_23 */ |
411 | .org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE |
417 | .org trap_table + TT_TRAP_INSTRUCTION(23)*ENTRY_SIZE |
412 | .global trap_instruction_23_tl0 |
418 | .global trap_instruction_23_tl0 |
413 | trap_instruction_23_tl0: |
419 | trap_instruction_23_tl0: |
414 | TRAP_INSTRUCTION 23 |
420 | TRAP_INSTRUCTION 23 |
415 | 421 | ||
416 | /* TT = 0x118, TL = 0, trap_instruction_24 */ |
422 | /* TT = 0x118, TL = 0, trap_instruction_24 */ |
417 | .org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE |
423 | .org trap_table + TT_TRAP_INSTRUCTION(24)*ENTRY_SIZE |
418 | .global trap_instruction_24_tl0 |
424 | .global trap_instruction_24_tl0 |
419 | trap_instruction_24_tl0: |
425 | trap_instruction_24_tl0: |
420 | TRAP_INSTRUCTION 24 |
426 | TRAP_INSTRUCTION 24 |
421 | 427 | ||
422 | /* TT = 0x119, TL = 0, trap_instruction_25 */ |
428 | /* TT = 0x119, TL = 0, trap_instruction_25 */ |
423 | .org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE |
429 | .org trap_table + TT_TRAP_INSTRUCTION(25)*ENTRY_SIZE |
424 | .global trap_instruction_25_tl0 |
430 | .global trap_instruction_25_tl0 |
425 | trap_instruction_25_tl0: |
431 | trap_instruction_25_tl0: |
426 | TRAP_INSTRUCTION 25 |
432 | TRAP_INSTRUCTION 25 |
427 | 433 | ||
428 | /* TT = 0x11a, TL = 0, trap_instruction_26 */ |
434 | /* TT = 0x11a, TL = 0, trap_instruction_26 */ |
429 | .org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE |
435 | .org trap_table + TT_TRAP_INSTRUCTION(26)*ENTRY_SIZE |
430 | .global trap_instruction_26_tl0 |
436 | .global trap_instruction_26_tl0 |
431 | trap_instruction_26_tl0: |
437 | trap_instruction_26_tl0: |
432 | TRAP_INSTRUCTION 26 |
438 | TRAP_INSTRUCTION 26 |
433 | 439 | ||
434 | /* TT = 0x11b, TL = 0, trap_instruction_27 */ |
440 | /* TT = 0x11b, TL = 0, trap_instruction_27 */ |
435 | .org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE |
441 | .org trap_table + TT_TRAP_INSTRUCTION(27)*ENTRY_SIZE |
436 | .global trap_instruction_27_tl0 |
442 | .global trap_instruction_27_tl0 |
437 | trap_instruction_27_tl0: |
443 | trap_instruction_27_tl0: |
438 | TRAP_INSTRUCTION 27 |
444 | TRAP_INSTRUCTION 27 |
439 | 445 | ||
440 | /* TT = 0x11c, TL = 0, trap_instruction_28 */ |
446 | /* TT = 0x11c, TL = 0, trap_instruction_28 */ |
441 | .org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE |
447 | .org trap_table + TT_TRAP_INSTRUCTION(28)*ENTRY_SIZE |
442 | .global trap_instruction_28_tl0 |
448 | .global trap_instruction_28_tl0 |
443 | trap_instruction_28_tl0: |
449 | trap_instruction_28_tl0: |
444 | TRAP_INSTRUCTION 28 |
450 | TRAP_INSTRUCTION 28 |
445 | 451 | ||
446 | /* TT = 0x11d, TL = 0, trap_instruction_29 */ |
452 | /* TT = 0x11d, TL = 0, trap_instruction_29 */ |
447 | .org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE |
453 | .org trap_table + TT_TRAP_INSTRUCTION(29)*ENTRY_SIZE |
448 | .global trap_instruction_29_tl0 |
454 | .global trap_instruction_29_tl0 |
449 | trap_instruction_29_tl0: |
455 | trap_instruction_29_tl0: |
450 | TRAP_INSTRUCTION 29 |
456 | TRAP_INSTRUCTION 29 |
451 | 457 | ||
452 | /* TT = 0x11e, TL = 0, trap_instruction_30 */ |
458 | /* TT = 0x11e, TL = 0, trap_instruction_30 */ |
453 | .org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE |
459 | .org trap_table + TT_TRAP_INSTRUCTION(30)*ENTRY_SIZE |
454 | .global trap_instruction_30_tl0 |
460 | .global trap_instruction_30_tl0 |
455 | trap_instruction_30_tl0: |
461 | trap_instruction_30_tl0: |
456 | TRAP_INSTRUCTION 30 |
462 | TRAP_INSTRUCTION 30 |
457 | 463 | ||
458 | /* TT = 0x11f, TL = 0, trap_instruction_31 */ |
464 | /* TT = 0x11f, TL = 0, trap_instruction_31 */ |
459 | .org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE |
465 | .org trap_table + TT_TRAP_INSTRUCTION(31)*ENTRY_SIZE |
460 | .global trap_instruction_31_tl0 |
466 | .global trap_instruction_31_tl0 |
461 | trap_instruction_31_tl0: |
467 | trap_instruction_31_tl0: |
462 | TRAP_INSTRUCTION 31 |
468 | TRAP_INSTRUCTION 31 |
463 | 469 | ||
464 | /* |
470 | /* |
465 | * Handlers for TL>0. |
471 | * Handlers for TL>0. |
466 | */ |
472 | */ |
467 | 473 | ||
468 | /* TT = 0x08, TL > 0, instruction_access_exception */ |
474 | /* TT = 0x08, TL > 0, instruction_access_exception */ |
469 | .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
475 | .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
470 | .global instruction_access_exception_tl1 |
476 | .global instruction_access_exception_tl1 |
471 | instruction_access_exception_tl1: |
477 | instruction_access_exception_tl1: |
472 | wrpr %g0, 1, %tl |
478 | wrpr %g0, 1, %tl |
473 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
479 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
474 | PREEMPTIBLE_HANDLER instruction_access_exception |
480 | PREEMPTIBLE_HANDLER instruction_access_exception |
475 | 481 | ||
476 | /* TT = 0x0a, TL > 0, instruction_access_error */ |
482 | /* TT = 0x0a, TL > 0, instruction_access_error */ |
477 | .org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE |
483 | .org trap_table + (TT_INSTRUCTION_ACCESS_ERROR+512)*ENTRY_SIZE |
478 | .global instruction_access_error_tl1 |
484 | .global instruction_access_error_tl1 |
479 | instruction_access_error_tl1: |
485 | instruction_access_error_tl1: |
480 | wrpr %g0, 1, %tl |
486 | wrpr %g0, 1, %tl |
481 | PREEMPTIBLE_HANDLER instruction_access_error |
487 | PREEMPTIBLE_HANDLER instruction_access_error |
482 | 488 | ||
483 | /* TT = 0x10, TL > 0, illegal_instruction */ |
489 | /* TT = 0x10, TL > 0, illegal_instruction */ |
484 | .org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE |
490 | .org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE |
485 | .global illegal_instruction_tl1 |
491 | .global illegal_instruction_tl1 |
486 | illegal_instruction_tl1: |
492 | illegal_instruction_tl1: |
487 | wrpr %g0, 1, %tl |
493 | wrpr %g0, 1, %tl |
488 | PREEMPTIBLE_HANDLER illegal_instruction |
494 | PREEMPTIBLE_HANDLER illegal_instruction |
489 | 495 | ||
490 | /* TT = 0x24, TL > 0, clean_window handler */ |
496 | /* TT = 0x24, TL > 0, clean_window handler */ |
491 | .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
497 | .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
492 | .global clean_window_handler_tl1 |
498 | .global clean_window_tl1 |
493 | clean_window_handler_tl1: |
499 | clean_window_tl1: |
494 | CLEAN_WINDOW_HANDLER |
500 | CLEAN_WINDOW_HANDLER |
495 | 501 | ||
496 | /* TT = 0x28, TL > 0, division_by_zero */ |
502 | /* TT = 0x28, TL > 0, division_by_zero */ |
497 | .org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE |
503 | .org trap_table + (TT_DIVISION_BY_ZERO+512)*ENTRY_SIZE |
498 | .global division_by_zero_tl1 |
504 | .global division_by_zero_tl1 |
499 | division_by_zero_tl1: |
505 | division_by_zero_tl1: |
500 | wrpr %g0, 1, %tl |
506 | wrpr %g0, 1, %tl |
501 | PREEMPTIBLE_HANDLER division_by_zero |
507 | PREEMPTIBLE_HANDLER division_by_zero |
502 | 508 | ||
503 | /* TT = 0x30, TL > 0, data_access_exception */ |
509 | /* TT = 0x30, TL > 0, data_access_exception */ |
504 | .org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
510 | .org trap_table + (TT_DATA_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
505 | .global data_access_exception_tl1 |
511 | .global data_access_exception_tl1 |
506 | data_access_exception_tl1: |
512 | data_access_exception_tl1: |
507 | wrpr %g0, 1, %tl |
513 | wrpr %g0, 1, %tl |
508 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
514 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
509 | PREEMPTIBLE_HANDLER data_access_exception |
515 | PREEMPTIBLE_HANDLER data_access_exception |
510 | 516 | ||
511 | /* TT = 0x32, TL > 0, data_access_error */ |
517 | /* TT = 0x32, TL > 0, data_access_error */ |
512 | .org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE |
518 | .org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE |
513 | .global data_access_error_tl1 |
519 | .global data_access_error_tl1 |
514 | data_access_error_tl1: |
520 | data_access_error_tl1: |
515 | wrpr %g0, 1, %tl |
521 | wrpr %g0, 1, %tl |
516 | PREEMPTIBLE_HANDLER data_access_error |
522 | PREEMPTIBLE_HANDLER data_access_error |
517 | 523 | ||
518 | /* TT = 0x34, TL > 0, mem_address_not_aligned */ |
524 | /* TT = 0x34, TL > 0, mem_address_not_aligned */ |
519 | .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
525 | .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
520 | .global mem_address_not_aligned_tl1 |
526 | .global mem_address_not_aligned_tl1 |
521 | mem_address_not_aligned_tl1: |
527 | mem_address_not_aligned_tl1: |
522 | wrpr %g0, 1, %tl |
528 | wrpr %g0, 1, %tl |
523 | PREEMPTIBLE_HANDLER mem_address_not_aligned |
529 | PREEMPTIBLE_HANDLER mem_address_not_aligned |
524 | 530 | ||
525 | /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ |
531 | /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ |
526 | .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
532 | .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
527 | .global fast_data_access_mmu_miss_handler_tl1 |
533 | .global fast_data_access_mmu_miss_handler_tl1 |
528 | fast_data_access_mmu_miss_handler_tl1: |
534 | fast_data_access_mmu_miss_handler_tl1: |
529 | FAST_DATA_ACCESS_MMU_MISS_HANDLER 1 |
535 | FAST_DATA_ACCESS_MMU_MISS_HANDLER 1 |
530 | 536 | ||
531 | /* TT = 0x6c, TL > 0, fast_data_access_protection */ |
537 | /* TT = 0x6c, TL > 0, fast_data_access_protection */ |
532 | .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE |
538 | .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE |
533 | .global fast_data_access_protection_handler_tl1 |
539 | .global fast_data_access_protection_handler_tl1 |
534 | fast_data_access_protection_handler_tl1: |
540 | fast_data_access_protection_handler_tl1: |
535 | FAST_DATA_ACCESS_PROTECTION_HANDLER 1 |
541 | FAST_DATA_ACCESS_PROTECTION_HANDLER 1 |
536 | 542 | ||
537 | /* TT = 0x80, TL > 0, spill_0_normal handler */ |
543 | /* TT = 0x80, TL > 0, spill_0_normal handler */ |
538 | .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
544 | .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
539 | .global spill_0_normal_tl1 |
545 | .global spill_0_normal_tl1 |
540 | spill_0_normal_tl1: |
546 | spill_0_normal_tl1: |
541 | SPILL_NORMAL_HANDLER_KERNEL |
547 | SPILL_NORMAL_HANDLER_KERNEL |
542 | 548 | ||
543 | /* TT = 0x88, TL > 0, spill_2_normal handler */ |
549 | /* TT = 0x88, TL > 0, spill_2_normal handler */ |
544 | .org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE |
550 | .org trap_table + (TT_SPILL_2_NORMAL+512)*ENTRY_SIZE |
545 | .global spill_2_normal_tl1 |
551 | .global spill_2_normal_tl1 |
546 | spill_2_normal_tl1: |
552 | spill_2_normal_tl1: |
547 | SPILL_TO_USPACE_WINDOW_BUFFER |
553 | SPILL_TO_USPACE_WINDOW_BUFFER |
548 | 554 | ||
549 | /* TT = 0xa0, TL > 0, spill_0_other handler */ |
555 | /* TT = 0xa0, TL > 0, spill_0_other handler */ |
550 | .org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE |
556 | .org trap_table + (TT_SPILL_0_OTHER+512)*ENTRY_SIZE |
551 | .global spill_0_other_tl1 |
557 | .global spill_0_other_tl1 |
552 | spill_0_other_tl1: |
558 | spill_0_other_tl1: |
553 | SPILL_TO_USPACE_WINDOW_BUFFER |
559 | SPILL_TO_USPACE_WINDOW_BUFFER |
554 | 560 | ||
555 | /* TT = 0xc0, TL > 0, fill_0_normal handler */ |
561 | /* TT = 0xc0, TL > 0, fill_0_normal handler */ |
556 | .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
562 | .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
557 | .global fill_0_normal_tl1 |
563 | .global fill_0_normal_tl1 |
558 | fill_0_normal_tl1: |
564 | fill_0_normal_tl1: |
559 | FILL_NORMAL_HANDLER_KERNEL |
565 | FILL_NORMAL_HANDLER_KERNEL |
560 | 566 | ||
561 | #define NOT(x) ((x) == 0) |
567 | #define NOT(x) ((x) == 0) |
562 | 568 | ||
563 | /* Preemptible trap handler for TL=1. |
569 | /* Preemptible trap handler for TL=1. |
564 | * |
570 | * |
565 | * This trap handler makes arrangements to make calling of scheduler() from |
571 | * This trap handler makes arrangements to make calling of scheduler() from |
566 | * within a trap context possible. It is called from several other trap |
572 | * within a trap context possible. It is called from several other trap |
567 | * handlers. |
573 | * handlers. |
568 | * |
574 | * |
569 | * This function can be entered either with interrupt globals or alternate globals. |
575 | * This function can be entered either with interrupt globals or alternate globals. |
570 | * Memory management trap handlers are obliged to switch to one of those global sets |
576 | * Memory management trap handlers are obliged to switch to one of those global sets |
571 | * prior to calling this function. Register window management functions are not |
577 | * prior to calling this function. Register window management functions are not |
572 | * allowed to modify the alternate global registers. |
578 | * allowed to modify the alternate global registers. |
573 | * |
579 | * |
574 | * Input registers: |
580 | * Input registers: |
575 | * %g1 Address of function to call. |
581 | * %g1 Address of function to call. |
576 | * %g2 First argument for the function. |
582 | * %g2 First argument for the function. |
577 | * %g6 Pre-set as kernel stack base if trap from userspace. |
583 | * %g6 Pre-set as kernel stack base if trap from userspace. |
578 | * %g7 Pre-set as address of the userspace window buffer. |
584 | * %g7 Pre-set as address of the userspace window buffer. |
579 | */ |
585 | */ |
580 | .macro PREEMPTIBLE_HANDLER_TEMPLATE is_syscall |
586 | .macro PREEMPTIBLE_HANDLER_TEMPLATE is_syscall |
581 | /* |
587 | /* |
582 | * ASSERT(%tl == 1) |
588 | * ASSERT(%tl == 1) |
583 | */ |
589 | */ |
584 | rdpr %tl, %g3 |
590 | rdpr %tl, %g3 |
585 | cmp %g3, 1 |
591 | cmp %g3, 1 |
586 | be 1f |
592 | be 1f |
587 | nop |
593 | nop |
588 | 0: ba 0b ! this is for debugging, if we ever get here |
594 | 0: ba 0b ! this is for debugging, if we ever get here |
589 | nop ! it will be easy to find |
595 | nop ! it will be easy to find |
590 | 596 | ||
591 | 1: |
597 | 1: |
592 | .if NOT(\is_syscall) |
598 | .if NOT(\is_syscall) |
593 | rdpr %tstate, %g3 |
599 | rdpr %tstate, %g3 |
594 | 600 | ||
595 | /* |
601 | /* |
596 | * One of the ways this handler can be invoked is after a nested MMU trap from |
602 | * One of the ways this handler can be invoked is after a nested MMU trap from |
597 | * either spill_1_normal or fill_1_normal traps. Both of these traps manipulate |
603 | * either spill_1_normal or fill_1_normal traps. Both of these traps manipulate |
598 | * the CWP register. We deal with the situation by simulating the MMU trap |
604 | * the CWP register. We deal with the situation by simulating the MMU trap |
599 | * on TL=1 and restart the respective SAVE or RESTORE instruction once the MMU |
605 | * on TL=1 and restart the respective SAVE or RESTORE instruction once the MMU |
600 | * trap is resolved. However, because we are in the wrong window from the |
606 | * trap is resolved. However, because we are in the wrong window from the |
601 | * perspective of the MMU trap, we need to synchronize CWP with CWP from TL=0. |
607 | * perspective of the MMU trap, we need to synchronize CWP with CWP from TL=0. |
602 | */ |
608 | */ |
603 | and %g3, TSTATE_CWP_MASK, %g4 |
609 | and %g3, TSTATE_CWP_MASK, %g4 |
604 | wrpr %g4, 0, %cwp ! resynchronize CWP |
610 | wrpr %g4, 0, %cwp ! resynchronize CWP |
605 | 611 | ||
606 | andcc %g3, TSTATE_PRIV_BIT, %g0 ! if this trap came from the privileged mode... |
612 | andcc %g3, TSTATE_PRIV_BIT, %g0 ! if this trap came from the privileged mode... |
607 | bnz 0f ! ...skip setting of kernel stack and primary context |
613 | bnz 0f ! ...skip setting of kernel stack and primary context |
608 | nop |
614 | nop |
609 | 615 | ||
610 | .endif |
616 | .endif |
611 | /* |
617 | /* |
612 | * Normal window spills will go to the userspace window buffer. |
618 | * Normal window spills will go to the userspace window buffer. |
613 | */ |
619 | */ |
614 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate |
620 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate |
615 | 621 | ||
616 | wrpr %g0, NWINDOW - 1, %cleanwin ! prevent unnecessary clean_window exceptions |
622 | wrpr %g0, NWINDOW - 1, %cleanwin ! prevent unnecessary clean_window exceptions |
617 | 623 | ||
618 | /* |
624 | /* |
619 | * Switch to kernel stack. The old stack is |
625 | * Switch to kernel stack. The old stack is |
620 | * automatically saved in the old window's %sp |
626 | * automatically saved in the old window's %sp |
621 | * and the new window's %fp. |
627 | * and the new window's %fp. |
622 | */ |
628 | */ |
623 | save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
629 | save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
624 | 630 | ||
625 | .if \is_syscall |
631 | .if \is_syscall |
626 | /* |
632 | /* |
627 | * Copy arguments for the syscall to the new window. |
633 | * Copy arguments for the syscall to the new window. |
628 | */ |
634 | */ |
629 | mov %i0, %o2 |
635 | mov %i0, %o2 |
630 | mov %i1, %o3 |
636 | mov %i1, %o3 |
631 | mov %i2, %o4 |
637 | mov %i2, %o4 |
632 | mov %i3, %o5 |
638 | mov %i3, %o5 |
633 | .endif |
639 | .endif |
634 | 640 | ||
635 | /* |
641 | /* |
636 | * Mark the CANRESTORE windows as OTHER windows. |
642 | * Mark the CANRESTORE windows as OTHER windows. |
637 | */ |
643 | */ |
638 | rdpr %canrestore, %l0 |
644 | rdpr %canrestore, %l0 |
639 | wrpr %l0, %otherwin |
645 | wrpr %l0, %otherwin |
640 | wrpr %g0, %canrestore |
646 | wrpr %g0, %canrestore |
641 | 647 | ||
642 | /* |
648 | /* |
643 | * Switch to primary context 0. |
649 | * Switch to primary context 0. |
644 | */ |
650 | */ |
645 | mov VA_PRIMARY_CONTEXT_REG, %l0 |
651 | mov VA_PRIMARY_CONTEXT_REG, %l0 |
646 | stxa %g0, [%l0] ASI_DMMU |
652 | stxa %g0, [%l0] ASI_DMMU |
647 | rd %pc, %l0 |
653 | rd %pc, %l0 |
648 | flush %l0 |
654 | flush %l0 |
649 | 655 | ||
650 | .if NOT(\is_syscall) |
656 | .if NOT(\is_syscall) |
651 | ba 1f |
657 | ba 1f |
652 | nop |
658 | nop |
653 | 0: |
659 | 0: |
654 | save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
660 | save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
655 | 661 | ||
656 | /* |
662 | /* |
657 | * At this moment, we are using the kernel stack |
663 | * At this moment, we are using the kernel stack |
658 | * and have successfully allocated a register window. |
664 | * and have successfully allocated a register window. |
659 | */ |
665 | */ |
660 | 1: |
666 | 1: |
661 | .endif |
667 | .endif |
662 | /* |
668 | /* |
663 | * Other window spills will go to the userspace window buffer |
669 | * Other window spills will go to the userspace window buffer |
664 | * and normal spills will go to the kernel stack. |
670 | * and normal spills will go to the kernel stack. |
665 | */ |
671 | */ |
666 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(0), %wstate |
672 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(0), %wstate |
667 | 673 | ||
668 | /* |
674 | /* |
669 | * Copy arguments. |
675 | * Copy arguments. |
670 | */ |
676 | */ |
671 | mov %g1, %l0 |
677 | mov %g1, %l0 |
672 | mov %g2, %o0 |
678 | mov %g2, %o0 |
673 | 679 | ||
674 | /* |
680 | /* |
675 | * Save TSTATE, TPC and TNPC aside. |
681 | * Save TSTATE, TPC and TNPC aside. |
676 | */ |
682 | */ |
677 | rdpr %tstate, %g1 |
683 | rdpr %tstate, %g1 |
678 | rdpr %tpc, %g2 |
684 | rdpr %tpc, %g2 |
679 | rdpr %tnpc, %g3 |
685 | rdpr %tnpc, %g3 |
680 | 686 | ||
681 | /* |
687 | /* |
682 | * The following memory accesses will not fault |
688 | * The following memory accesses will not fault |
683 | * because special provisions are made to have |
689 | * because special provisions are made to have |
684 | * the kernel stack of THREAD locked in DTLB. |
690 | * the kernel stack of THREAD locked in DTLB. |
685 | */ |
691 | */ |
686 | stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE] |
692 | stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE] |
687 | stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC] |
693 | stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC] |
688 | stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC] |
694 | stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC] |
689 | 695 | ||
690 | wrpr %g0, 0, %tl |
696 | wrpr %g0, 0, %tl |
691 | wrpr %g0, PSTATE_PRIV_BIT, %pstate |
697 | wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate |
692 | SAVE_GLOBALS |
698 | SAVE_GLOBALS |
693 | 699 | ||
694 | /* |
700 | /* |
695 | * Call the higher-level handler and pass istate as second parameter. |
701 | * Call the higher-level handler and pass istate as second parameter. |
696 | */ |
702 | */ |
697 | call %l0 |
703 | call %l0 |
698 | add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1 |
704 | add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1 |
699 | 705 | ||
700 | .if \is_syscall |
706 | .if \is_syscall |
701 | /* |
707 | /* |
702 | * Copy the value returned by the syscall. |
708 | * Copy the value returned by the syscall. |
703 | */ |
709 | */ |
704 | mov %o0, %i0 |
710 | mov %o0, %i0 |
705 | .endif |
711 | .endif |
706 | 712 | ||
707 | RESTORE_GLOBALS |
713 | RESTORE_GLOBALS |
- | 714 | rdpr %pstate, %l1 ! we must preserve the PEF bit |
|
708 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
715 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
709 | wrpr %g0, 1, %tl |
716 | wrpr %g0, 1, %tl |
710 | 717 | ||
711 | /* |
718 | /* |
712 | * Read TSTATE, TPC and TNPC from saved copy. |
719 | * Read TSTATE, TPC and TNPC from saved copy. |
713 | */ |
720 | */ |
714 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1 |
721 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1 |
715 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2 |
722 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2 |
716 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3 |
723 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3 |
717 | 724 | ||
718 | /* |
725 | /* |
- | 726 | * Copy PSTATE.PEF to the in-register copy of TSTATE. |
|
- | 727 | */ |
|
- | 728 | and %l1, PSTATE_PEF_BIT, %l1 |
|
- | 729 | sllx %l1, TSTATE_PSTATE_SHIFT, %l1 |
|
- | 730 | sethi %hi(TSTATE_PEF_BIT), %g4 |
|
- | 731 | andn %g1, %g4, %g1 |
|
- | 732 | or %g1, %l1, %g1 |
|
- | 733 | ||
- | 734 | /* |
|
719 | * Restore TSTATE, TPC and TNPC from saved copies. |
735 | * Restore TSTATE, TPC and TNPC from saved copies. |
720 | */ |
736 | */ |
721 | wrpr %g1, 0, %tstate |
737 | wrpr %g1, 0, %tstate |
722 | wrpr %g2, 0, %tpc |
738 | wrpr %g2, 0, %tpc |
723 | wrpr %g3, 0, %tnpc |
739 | wrpr %g3, 0, %tnpc |
724 | 740 | ||
- | 741 | ||
725 | /* |
742 | /* |
726 | * If OTHERWIN is zero, then all the userspace windows have been |
743 | * If OTHERWIN is zero, then all the userspace windows have been |
727 | * spilled to kernel memory (i.e. register window buffer). Moreover, |
744 | * spilled to kernel memory (i.e. register window buffer). Moreover, |
728 | * if the scheduler was called in the meantime, all valid windows |
745 | * if the scheduler was called in the meantime, all valid windows |
729 | * belonging to other threads were spilled by context_restore(). |
746 | * belonging to other threads were spilled by context_restore(). |
730 | * If OTHERWIN is non-zero, then some userspace windows are still |
747 | * If OTHERWIN is non-zero, then some userspace windows are still |
731 | * valid. Others might have been spilled. However, the CWP pointer |
748 | * valid. Others might have been spilled. However, the CWP pointer |
732 | * needs no fixing because the scheduler had not been called. |
749 | * needs no fixing because the scheduler had not been called. |
733 | */ |
750 | */ |
734 | rdpr %otherwin, %l0 |
751 | rdpr %otherwin, %l0 |
735 | brnz %l0, 0f |
752 | brnz %l0, 0f |
736 | nop |
753 | nop |
737 | 754 | ||
738 | /* |
755 | /* |
739 | * OTHERWIN == 0 |
756 | * OTHERWIN == 0 |
740 | */ |
757 | */ |
741 | 758 | ||
742 | /* |
759 | /* |
743 | * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP. |
760 | * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP. |
744 | */ |
761 | */ |
745 | and %g1, TSTATE_CWP_MASK, %l0 |
762 | and %g1, TSTATE_CWP_MASK, %l0 |
746 | inc %l0 |
763 | inc %l0 |
747 | and %l0, NWINDOW - 1, %l0 ! %l0 mod NWINDOW |
764 | and %l0, NWINDOW - 1, %l0 ! %l0 mod NWINDOW |
748 | rdpr %cwp, %l1 |
765 | rdpr %cwp, %l1 |
749 | cmp %l0, %l1 |
766 | cmp %l0, %l1 |
750 | bz 0f ! CWP is ok |
767 | bz 0f ! CWP is ok |
751 | nop |
768 | nop |
752 | 769 | ||
753 | /* |
770 | /* |
754 | * Fix CWP. |
771 | * Fix CWP. |
755 | * In order to recapitulate, the input registers in the current |
772 | * In order to recapitulate, the input registers in the current |
756 | * window are the output registers of the window to which we want |
773 | * window are the output registers of the window to which we want |
757 | * to restore. Because the fill trap fills only input and local |
774 | * to restore. Because the fill trap fills only input and local |
758 | * registers of a window, we need to preserve those output |
775 | * registers of a window, we need to preserve those output |
759 | * registers manually. |
776 | * registers manually. |
760 | */ |
777 | */ |
761 | mov %sp, %g2 |
778 | mov %sp, %g2 |
762 | stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0] |
779 | stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0] |
763 | stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1] |
780 | stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1] |
764 | stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2] |
781 | stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2] |
765 | stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3] |
782 | stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3] |
766 | stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4] |
783 | stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4] |
767 | stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5] |
784 | stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5] |
768 | stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6] |
785 | stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6] |
769 | stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7] |
786 | stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7] |
770 | wrpr %l0, 0, %cwp |
787 | wrpr %l0, 0, %cwp |
771 | mov %g2, %sp |
788 | mov %g2, %sp |
772 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0 |
789 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0 |
773 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1 |
790 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1 |
774 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2 |
791 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2 |
775 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3 |
792 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3 |
776 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4 |
793 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4 |
777 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5 |
794 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5 |
778 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6 |
795 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6 |
779 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7 |
796 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7 |
780 | 797 | ||
781 | /* |
798 | /* |
782 | * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case. |
799 | * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case. |
783 | * The CWP has already been restored to the value it had after the SAVE |
800 | * The CWP has already been restored to the value it had after the SAVE |
784 | * at the beginning of this function. |
801 | * at the beginning of this function. |
785 | */ |
802 | */ |
786 | 0: |
803 | 0: |
787 | .if NOT(\is_syscall) |
804 | .if NOT(\is_syscall) |
788 | rdpr %tstate, %g1 |
805 | rdpr %tstate, %g1 |
789 | andcc %g1, TSTATE_PRIV_BIT, %g0 ! if we are not returning to userspace..., |
806 | andcc %g1, TSTATE_PRIV_BIT, %g0 ! if we are not returning to userspace..., |
790 | bnz 1f ! ...skip restoring userspace windows |
807 | bnz 1f ! ...skip restoring userspace windows |
791 | nop |
808 | nop |
792 | .endif |
809 | .endif |
793 | 810 | ||
794 | /* |
811 | /* |
795 | * Spills and fills will be processed by the {spill,fill}_1_normal |
812 | * Spills and fills will be processed by the {spill,fill}_1_normal |
796 | * handlers. |
813 | * handlers. |
797 | */ |
814 | */ |
798 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate |
815 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate |
799 | 816 | ||
800 | /* |
817 | /* |
801 | * Set primary context according to secondary context. |
818 | * Set primary context according to secondary context. |
802 | */ |
819 | */ |
803 | wr %g0, ASI_DMMU, %asi |
820 | wr %g0, ASI_DMMU, %asi |
804 | ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1 |
821 | ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1 |
805 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi |
822 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi |
806 | rd %pc, %g1 |
823 | rd %pc, %g1 |
807 | flush %g1 |
824 | flush %g1 |
808 | 825 | ||
809 | rdpr %cwp, %g1 |
826 | rdpr %cwp, %g1 |
810 | rdpr %otherwin, %g2 |
827 | rdpr %otherwin, %g2 |
811 | 828 | ||
812 | /* |
829 | /* |
813 | * Skip all OTHERWIN windows and descend to the first window |
830 | * Skip all OTHERWIN windows and descend to the first window |
814 | * in the userspace window buffer. |
831 | * in the userspace window buffer. |
815 | */ |
832 | */ |
816 | sub %g1, %g2, %g3 |
833 | sub %g1, %g2, %g3 |
817 | dec %g3 |
834 | dec %g3 |
818 | and %g3, NWINDOW - 1, %g3 |
835 | and %g3, NWINDOW - 1, %g3 |
819 | wrpr %g3, 0, %cwp |
836 | wrpr %g3, 0, %cwp |
820 | 837 | ||
821 | /* |
838 | /* |
822 | * CWP is now in the window last saved in the userspace window buffer. |
839 | * CWP is now in the window last saved in the userspace window buffer. |
823 | * Fill all windows stored in the buffer. |
840 | * Fill all windows stored in the buffer. |
824 | */ |
841 | */ |
825 | clr %g4 |
842 | clr %g4 |
826 | set PAGE_SIZE - 1, %g5 |
843 | set PAGE_SIZE - 1, %g5 |
827 | 0: andcc %g7, %g5, %g0 ! PAGE_SIZE alignment check |
844 | 0: andcc %g7, %g5, %g0 ! PAGE_SIZE alignment check |
828 | bz 0f ! %g7 is page-aligned, no more windows to refill |
845 | bz 0f ! %g7 is page-aligned, no more windows to refill |
829 | nop |
846 | nop |
830 | 847 | ||
831 | add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7 |
848 | add %g7, -STACK_WINDOW_SAVE_AREA_SIZE, %g7 |
832 | ldx [%g7 + L0_OFFSET], %l0 |
849 | ldx [%g7 + L0_OFFSET], %l0 |
833 | ldx [%g7 + L1_OFFSET], %l1 |
850 | ldx [%g7 + L1_OFFSET], %l1 |
834 | ldx [%g7 + L2_OFFSET], %l2 |
851 | ldx [%g7 + L2_OFFSET], %l2 |
835 | ldx [%g7 + L3_OFFSET], %l3 |
852 | ldx [%g7 + L3_OFFSET], %l3 |
836 | ldx [%g7 + L4_OFFSET], %l4 |
853 | ldx [%g7 + L4_OFFSET], %l4 |
837 | ldx [%g7 + L5_OFFSET], %l5 |
854 | ldx [%g7 + L5_OFFSET], %l5 |
838 | ldx [%g7 + L6_OFFSET], %l6 |
855 | ldx [%g7 + L6_OFFSET], %l6 |
839 | ldx [%g7 + L7_OFFSET], %l7 |
856 | ldx [%g7 + L7_OFFSET], %l7 |
840 | ldx [%g7 + I0_OFFSET], %i0 |
857 | ldx [%g7 + I0_OFFSET], %i0 |
841 | ldx [%g7 + I1_OFFSET], %i1 |
858 | ldx [%g7 + I1_OFFSET], %i1 |
842 | ldx [%g7 + I2_OFFSET], %i2 |
859 | ldx [%g7 + I2_OFFSET], %i2 |
843 | ldx [%g7 + I3_OFFSET], %i3 |
860 | ldx [%g7 + I3_OFFSET], %i3 |
844 | ldx [%g7 + I4_OFFSET], %i4 |
861 | ldx [%g7 + I4_OFFSET], %i4 |
845 | ldx [%g7 + I5_OFFSET], %i5 |
862 | ldx [%g7 + I5_OFFSET], %i5 |
846 | ldx [%g7 + I6_OFFSET], %i6 |
863 | ldx [%g7 + I6_OFFSET], %i6 |
847 | ldx [%g7 + I7_OFFSET], %i7 |
864 | ldx [%g7 + I7_OFFSET], %i7 |
848 | 865 | ||
849 | dec %g3 |
866 | dec %g3 |
850 | and %g3, NWINDOW - 1, %g3 |
867 | and %g3, NWINDOW - 1, %g3 |
851 | wrpr %g3, 0, %cwp ! switch to the preceeding window |
868 | wrpr %g3, 0, %cwp ! switch to the preceeding window |
852 | 869 | ||
853 | ba 0b |
870 | ba 0b |
854 | inc %g4 |
871 | inc %g4 |
855 | 872 | ||
856 | 0: |
873 | 0: |
857 | /* |
874 | /* |
858 | * Switch back to the proper current window and adjust |
875 | * Switch back to the proper current window and adjust |
859 | * OTHERWIN, CANRESTORE, CANSAVE and CLEANWIN. |
876 | * OTHERWIN, CANRESTORE, CANSAVE and CLEANWIN. |
860 | */ |
877 | */ |
861 | wrpr %g1, 0, %cwp |
878 | wrpr %g1, 0, %cwp |
862 | add %g4, %g2, %g2 |
879 | add %g4, %g2, %g2 |
863 | cmp %g2, NWINDOW - 2 |
880 | cmp %g2, NWINDOW - 2 |
864 | bg 2f ! fix the CANRESTORE=NWINDOW-1 anomaly |
881 | bg 2f ! fix the CANRESTORE=NWINDOW-1 anomaly |
865 | mov NWINDOW - 2, %g1 ! use dealy slot for both cases |
882 | mov NWINDOW - 2, %g1 ! use dealy slot for both cases |
866 | sub %g1, %g2, %g1 |
883 | sub %g1, %g2, %g1 |
867 | 884 | ||
868 | wrpr %g0, 0, %otherwin |
885 | wrpr %g0, 0, %otherwin |
869 | wrpr %g1, 0, %cansave ! NWINDOW - 2 - CANRESTORE |
886 | wrpr %g1, 0, %cansave ! NWINDOW - 2 - CANRESTORE |
870 | wrpr %g2, 0, %canrestore ! OTHERWIN + windows in the buffer |
887 | wrpr %g2, 0, %canrestore ! OTHERWIN + windows in the buffer |
871 | wrpr %g2, 0, %cleanwin ! avoid information leak |
888 | wrpr %g2, 0, %cleanwin ! avoid information leak |
872 | 889 | ||
873 | 1: |
890 | 1: |
874 | restore |
891 | restore |
875 | 892 | ||
876 | .if \is_syscall |
893 | .if \is_syscall |
877 | done |
894 | done |
878 | .else |
895 | .else |
879 | retry |
896 | retry |
880 | .endif |
897 | .endif |
881 | 898 | ||
882 | /* |
899 | /* |
883 | * We got here in order to avoid inconsistency of the window state registers. |
900 | * We got here in order to avoid inconsistency of the window state registers. |
884 | * If the: |
901 | * If the: |
885 | * |
902 | * |
886 | * save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
903 | * save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
887 | * |
904 | * |
888 | * instruction trapped and spilled a register window into the userspace |
905 | * instruction trapped and spilled a register window into the userspace |
889 | * window buffer, we have just restored NWINDOW - 1 register windows. |
906 | * window buffer, we have just restored NWINDOW - 1 register windows. |
890 | * However, CANRESTORE can be only NWINDOW - 2 at most. |
907 | * However, CANRESTORE can be only NWINDOW - 2 at most. |
891 | * |
908 | * |
892 | * The solution is to manually switch to (CWP - 1) mod NWINDOW |
909 | * The solution is to manually switch to (CWP - 1) mod NWINDOW |
893 | * and set the window state registers so that: |
910 | * and set the window state registers so that: |
894 | * |
911 | * |
895 | * CANRESTORE = NWINDOW - 2 |
912 | * CANRESTORE = NWINDOW - 2 |
896 | * CLEANWIN = NWINDOW - 2 |
913 | * CLEANWIN = NWINDOW - 2 |
897 | * CANSAVE = 0 |
914 | * CANSAVE = 0 |
898 | * OTHERWIN = 0 |
915 | * OTHERWIN = 0 |
899 | * |
916 | * |
900 | * The RESTORE instruction is therfore to be skipped. |
917 | * The RESTORE instruction is therfore to be skipped. |
901 | */ |
918 | */ |
902 | 2: |
919 | 2: |
903 | wrpr %g0, 0, %otherwin |
920 | wrpr %g0, 0, %otherwin |
904 | wrpr %g0, 0, %cansave |
921 | wrpr %g0, 0, %cansave |
905 | wrpr %g1, 0, %canrestore |
922 | wrpr %g1, 0, %canrestore |
906 | wrpr %g1, 0, %cleanwin |
923 | wrpr %g1, 0, %cleanwin |
907 | 924 | ||
908 | rdpr %cwp, %g1 |
925 | rdpr %cwp, %g1 |
909 | dec %g1 |
926 | dec %g1 |
910 | and %g1, NWINDOW - 1, %g1 |
927 | and %g1, NWINDOW - 1, %g1 |
911 | wrpr %g1, 0, %cwp ! CWP-- |
928 | wrpr %g1, 0, %cwp ! CWP-- |
912 | 929 | ||
913 | .if \is_syscall |
930 | .if \is_syscall |
914 | done |
931 | done |
915 | .else |
932 | .else |
916 | retry |
933 | retry |
917 | .endif |
934 | .endif |
918 | 935 | ||
919 | .endm |
936 | .endm |
920 | 937 | ||
921 | .global preemptible_handler |
938 | .global preemptible_handler |
922 | preemptible_handler: |
939 | preemptible_handler: |
923 | PREEMPTIBLE_HANDLER_TEMPLATE 0 |
940 | PREEMPTIBLE_HANDLER_TEMPLATE 0 |
924 | 941 | ||
925 | .global trap_instruction_handler |
942 | .global trap_instruction_handler |
926 | trap_instruction_handler: |
943 | trap_instruction_handler: |
927 | PREEMPTIBLE_HANDLER_TEMPLATE 1 |
944 | PREEMPTIBLE_HANDLER_TEMPLATE 1 |
928 | 945 |