WebSVN – HelenOS – Diff – /trunk/kernel/arch/sparc64/src/trap/trap_table.S


#
# Copyright (C) 2005 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
/**
 * This file contains kernel trap table.
 */
 
.register %g2, #scratch
.register %g3, #scratch
 
.text
 
#include <arch/trap/trap_table.h>
#include <arch/trap/regwin.h>
#include <arch/trap/interrupt.h>
#include <arch/trap/exception.h>
#include <arch/trap/mmu.h>
#include <arch/stack.h>
#include <arch/regdef.h>
 
#define TABLE_SIZE	TRAP_TABLE_SIZE
#define ENTRY_SIZE	TRAP_TABLE_ENTRY_SIZE
 
/*
 * Kernel trap table.
 */
.align TABLE_SIZE
.global trap_table
trap_table:
 
/* TT = 0x08, TL = 0, instruction_access_exception */
.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
.global instruction_access_exception
instruction_access_exception:
	SIMPLE_HANDLER do_instruction_access_exc
 
/* TT = 0x10, TL = 0, illegal_instruction */
.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
.global illegal_instruction
illegal_instruction:
	SIMPLE_HANDLER do_illegal_instruction
 
/* TT = 0x24, TL = 0, clean_window handler */
.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
.global clean_window_handler
clean_window_handler:
	CLEAN_WINDOW_HANDLER
 
/* TT = 0x32, TL = 0, data_access_error */
.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
.global data_access_error
data_access_error:
	SIMPLE_HANDLER do_data_access_error
 
/* TT = 0x34, TL = 0, mem_address_not_aligned */
.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
.global mem_address_not_aligned
mem_address_not_aligned:
	SIMPLE_HANDLER do_mem_address_not_aligned
 
/* TT = 0x41, TL = 0, interrupt_level_1 handler */
.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
.global interrupt_level_1_handler
interrupt_level_1_handler:
	INTERRUPT_LEVEL_N_HANDLER 1
 
/* TT = 0x42, TL = 0, interrupt_level_2 handler */
.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
.global interrupt_level_2_handler
interrupt_level_2_handler:
	INTERRUPT_LEVEL_N_HANDLER 2
 
/* TT = 0x43, TL = 0, interrupt_level_3 handler */
.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
.global interrupt_level_3_handler
interrupt_level_3_handler:
	INTERRUPT_LEVEL_N_HANDLER 3
 
/* TT = 0x44, TL = 0, interrupt_level_4 handler */
.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
.global interrupt_level_4_handler
interrupt_level_4_handler:
	INTERRUPT_LEVEL_N_HANDLER 4
 
/* TT = 0x45, TL = 0, interrupt_level_5 handler */
.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
.global interrupt_level_5_handler
interrupt_level_5_handler:
	INTERRUPT_LEVEL_N_HANDLER 5
 
/* TT = 0x46, TL = 0, interrupt_level_6 handler */
.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
.global interrupt_level_6_handler
interrupt_level_6_handler:
	INTERRUPT_LEVEL_N_HANDLER 6
 
/* TT = 0x47, TL = 0, interrupt_level_7 handler */
.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
.global interrupt_level_7_handler
interrupt_level_7_handler:
	INTERRUPT_LEVEL_N_HANDLER 7
 
/* TT = 0x48, TL = 0, interrupt_level_8 handler */
.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
.global interrupt_level_8_handler
interrupt_level_8_handler:
	INTERRUPT_LEVEL_N_HANDLER 8
 
/* TT = 0x49, TL = 0, interrupt_level_9 handler */
.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
.global interrupt_level_9_handler
interrupt_level_9_handler:
	INTERRUPT_LEVEL_N_HANDLER 9
 
/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
.global interrupt_level_10_handler
interrupt_level_10_handler:
	INTERRUPT_LEVEL_N_HANDLER 10
 
/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
.global interrupt_level_11_handler
interrupt_level_11_handler:
	INTERRUPT_LEVEL_N_HANDLER 11
 
/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
.global interrupt_level_12_handler
interrupt_level_12_handler:
	INTERRUPT_LEVEL_N_HANDLER 12
 
/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
.global interrupt_level_13_handler
interrupt_level_13_handler:
	INTERRUPT_LEVEL_N_HANDLER 13
 
/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
.global interrupt_level_14_handler
interrupt_level_14_handler:
	INTERRUPT_LEVEL_N_HANDLER 14
 
/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
.global interrupt_level_15_handler
interrupt_level_15_handler:
	INTERRUPT_LEVEL_N_HANDLER 15
 
/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
.global interrupt_vector_trap_handler
interrupt_vector_trap_handler:
	INTERRUPT_VECTOR_TRAP_HANDLER
 
/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
.global fast_instruction_access_mmu_miss_handler
fast_instruction_access_mmu_miss_handler:
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
 
/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
.global fast_data_access_mmu_miss_handler
fast_data_access_mmu_miss_handler:
	FAST_DATA_ACCESS_MMU_MISS_HANDLER
 
/* TT = 0x6c, TL = 0, fast_data_access_protection */
.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
.global fast_data_access_protection_handler
fast_data_access_protection_handler:
	FAST_DATA_ACCESS_PROTECTION_HANDLER
 
/* TT = 0x80, TL = 0, spill_0_normal handler */
.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
.global spill_0_normal
spill_0_normal:
	SPILL_NORMAL_HANDLER_KERNEL
 
/* TT = 0xc0, TL = 0, fill_0_normal handler */
.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
.global fill_0_normal
fill_0_normal:
	FILL_NORMAL_HANDLER_KERNEL
 
/*
 * Handlers for TL>0.
 */
 
/* TT = 0x08, TL > 0, instruction_access_exception */
.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
.global instruction_access_exception_high
instruction_access_exception_high:
	SIMPLE_HANDLER do_instruction_access_exc
 
/* TT = 0x10, TL > 0, illegal_instruction */
.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
.global illegal_instruction_high
illegal_instruction_high:
	SIMPLE_HANDLER do_illegal_instruction
 
/* TT = 0x24, TL > 0, clean_window handler */
.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
.global clean_window_handler_high
clean_window_handler_high:
	CLEAN_WINDOW_HANDLER
 
/* TT = 0x32, TL > 0, data_access_error */
.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
.global data_access_error_high
data_access_error_high:
	SIMPLE_HANDLER do_data_access_error
 
/* TT = 0x34, TL > 0, mem_address_not_aligned */
.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
.global mem_address_not_aligned_high
mem_address_not_aligned_high:
	SIMPLE_HANDLER do_mem_address_not_aligned
 
/* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */
.org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE
.global fast_instruction_access_mmu_miss_handler_high
fast_instruction_access_mmu_miss_handler_high:
	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
 
/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
.global fast_data_access_mmu_miss_handler_high
fast_data_access_mmu_miss_handler_high:
	FAST_DATA_ACCESS_MMU_MISS_HANDLER
 
/* TT = 0x6c, TL > 0, fast_data_access_protection */
.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
.global fast_data_access_protection_handler_high
fast_data_access_protection_handler_high:
	FAST_DATA_ACCESS_PROTECTION_HANDLER
 
/* TT = 0x80, TL > 0, spill_0_normal handler */
.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
.global spill_0_normal_high
spill_0_normal_high:
	SPILL_NORMAL_HANDLER_KERNEL
 
/* TT = 0xc0, TL > 0, fill_0_normal handler */
.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
.global fill_0_normal_high
fill_0_normal_high:
	FILL_NORMAL_HANDLER_KERNEL
 
 
/* Preemptible trap handler for TL=1.
 *
 * This trap handler makes arrangements to make calling of scheduler() from
 * within a trap context possible. It is called from several other trap
 * handlers.
 *
 * This function can be entered either with interrupt globals or alternate globals.
 * Memory management trap handlers are obliged to switch to one of those global sets
 * prior to calling this function. Register window management functions are not
 * allowed to modify the alternate global registers.
 *
 * Input registers:
 *	%g1		Address of function to call.
 * 	%g2	 	Argument for the function.
 *	%g6		Pre-set as kernel stack base if trap from userspace.
 *	%g7		Reserved.
 */
.global preemptible_handler
preemptible_handler:
	rdpr %tstate, %g3
	andcc %g3, TSTATE_PRIV_BIT, %g0		! if this trap came from the privileged mode...
	bnz 0f					! ...skip setting of kernel stack and primary context
	nop
 
	/*
	 * Switch to kernel stack. The old stack is
	 * automatically saved in the old window's %sp
	 * and the new window's %fp.
	 */
	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
 
	/*
	 * Mark the CANSAVE windows as OTHER windows.
	 * Set CLEANWIN to NWINDOW-1 so that clean_window traps do not occur.
	 */
	rdpr %cansave, %l0
	wrpr %l0, %otherwin
	wrpr %g0, %cansave
	wrpr %g0, NWINDOW-1, %cleanwin
 
	/*
	 * Switch to primary context 0.
	 */
	mov VA_PRIMARY_CONTEXT_REG, %l0
        stxa %g0, [%l0] ASI_DMMU
	set kernel_image_start, %l0
        flush %l0
 
	ba 1f
	nop
 
0:
	save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
 
	/*
	 * At this moment, we are using the kernel stack 
	 * and have successfully allocated a register window.
	 */
1:
 
	/*
	 * Copy arguments.
	 */
	mov %g1, %l0
	mov %g2, %o0
 
	/*
	 * Save TSTATE, TPC and TNPC aside.
	 */
	rdpr %tstate, %g1
	rdpr %tpc, %g2
	rdpr %tnpc, %g3
 
	/*
	 * The following memory accesses will not fault
	 * because special provisions are made to have
	 * the kernel stack of THREAD locked in DTLB.
	 */
	stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]
	stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]
	stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]
	
	wrpr %g0, 0, %tl
	wrpr %g0, PSTATE_PRIV_BIT, %pstate
	SAVE_GLOBALS
	
	/*
	 * Call the higher-level handler and pass istate as second parameter.
	 */
	call %l0
	add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1
 
	RESTORE_GLOBALS
	wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate
	wrpr %g0, 1, %tl
	
	/*
	 * Read TSTATE, TPC and TNPC from saved copy.
	 */
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
 
	/*
	 * Restore TSTATE, TPC and TNPC from saved copies.
	 */
	wrpr %g1, 0, %tstate
	wrpr %g2, 0, %tpc
	wrpr %g3, 0, %tnpc
 
	/*
	 * If OTHERWIN is zero, then all the userspace windows have been
	 * spilled to kernel memory (i.e. register window buffer). If
	 * OTHERWIN is non-zero, then some userspace windows are still
	 * valid. Others might have been spilled. However, the CWP pointer
	 * needs no fixing because the scheduler had not been called.
	 */
	rdpr %otherwin, %l0
	brnz %l0, 0f
	nop
 
	/*
	 * OTHERWIN == 0
	 */
 
	/*
	 * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP.
	 */
	and %g1, TSTATE_CWP_MASK, %l0
	inc %l0
	and %l0, TSTATE_CWP_MASK, %l0	! %l0 mod NWINDOW
	rdpr %cwp, %l1
	cmp %l0, %l1
	bz 0f				! CWP is ok
	nop
 
	/*
	 * Fix CWP.
	 * Just for reminder, the input registers in the current window
	 * are the output registers of the window to which we want to
	 * restore. Because the fill trap fills only input and local
	 * registers of a window, we need to preserve those output
	 * registers manually.
	 */
 
	flushw
	mov %sp, %g1
	stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0]
	stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1]
	stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2]
	stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3]
	stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4]
	stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5]
	stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6]
	stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7]
	wrpr %l0, 0, %cwp
	mov %g1, %sp
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7
 
	/*
	 * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
	 */
0:
	! TODO: restore register windows from register window memory buffer
 
	restore
	retry
 

Rev 1852	Rev 1855
1	#	1	#
2	# Copyright (C) 2005 Jakub Jermar	2	# Copyright (C) 2005 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	/**	29	/**
30	* This file contains kernel trap table.	30	* This file contains kernel trap table.
31	*/	31	*/
32		32
33	.register %g2, #scratch	33	.register %g2, #scratch
34	.register %g3, #scratch	34	.register %g3, #scratch
35		35
36	.text	36	.text
37		37
38	#include <arch/trap/trap_table.h>	38	#include <arch/trap/trap_table.h>
39	#include <arch/trap/regwin.h>	39	#include <arch/trap/regwin.h>
40	#include <arch/trap/interrupt.h>	40	#include <arch/trap/interrupt.h>
41	#include <arch/trap/exception.h>	41	#include <arch/trap/exception.h>
42	#include <arch/trap/mmu.h>	42	#include <arch/trap/mmu.h>
43	#include <arch/stack.h>	43	#include <arch/stack.h>
44	#include <arch/regdef.h>	44	#include <arch/regdef.h>
45		45
46	#define TABLE_SIZE TRAP_TABLE_SIZE	46	#define TABLE_SIZE TRAP_TABLE_SIZE
47	#define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE	47	#define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE
48		48
49	/*	49	/*
50	* Kernel trap table.	50	* Kernel trap table.
51	*/	51	*/
52	.align TABLE_SIZE	52	.align TABLE_SIZE
53	.global trap_table	53	.global trap_table
54	trap_table:	54	trap_table:
55		55
56	/* TT = 0x08, TL = 0, instruction_access_exception */	56	/* TT = 0x08, TL = 0, instruction_access_exception */
57	.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE	57	.org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE
58	.global instruction_access_exception	58	.global instruction_access_exception
59	instruction_access_exception:	59	instruction_access_exception:
60	SIMPLE_HANDLER do_instruction_access_exc	60	SIMPLE_HANDLER do_instruction_access_exc
61		61
62	/* TT = 0x10, TL = 0, illegal_instruction */	62	/* TT = 0x10, TL = 0, illegal_instruction */
63	.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE	63	.org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE
64	.global illegal_instruction	64	.global illegal_instruction
65	illegal_instruction:	65	illegal_instruction:
66	SIMPLE_HANDLER do_illegal_instruction	66	SIMPLE_HANDLER do_illegal_instruction
67		67
68	/* TT = 0x24, TL = 0, clean_window handler */	68	/* TT = 0x24, TL = 0, clean_window handler */
69	.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE	69	.org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE
70	.global clean_window_handler	70	.global clean_window_handler
71	clean_window_handler:	71	clean_window_handler:
72	CLEAN_WINDOW_HANDLER	72	CLEAN_WINDOW_HANDLER
73		73
74	/* TT = 0x32, TL = 0, data_access_error */	74	/* TT = 0x32, TL = 0, data_access_error */
75	.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE	75	.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
76	.global data_access_error	76	.global data_access_error
77	data_access_error:	77	data_access_error:
78	SIMPLE_HANDLER do_data_access_error	78	SIMPLE_HANDLER do_data_access_error
79		79
80	/* TT = 0x34, TL = 0, mem_address_not_aligned */	80	/* TT = 0x34, TL = 0, mem_address_not_aligned */
81	.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE	81	.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
82	.global mem_address_not_aligned	82	.global mem_address_not_aligned
83	mem_address_not_aligned:	83	mem_address_not_aligned:
84	SIMPLE_HANDLER do_mem_address_not_aligned	84	SIMPLE_HANDLER do_mem_address_not_aligned
85		85
86	/* TT = 0x41, TL = 0, interrupt_level_1 handler */	86	/* TT = 0x41, TL = 0, interrupt_level_1 handler */
87	.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE	87	.org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE
88	.global interrupt_level_1_handler	88	.global interrupt_level_1_handler
89	interrupt_level_1_handler:	89	interrupt_level_1_handler:
90	INTERRUPT_LEVEL_N_HANDLER 1	90	INTERRUPT_LEVEL_N_HANDLER 1
91		91
92	/* TT = 0x42, TL = 0, interrupt_level_2 handler */	92	/* TT = 0x42, TL = 0, interrupt_level_2 handler */
93	.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE	93	.org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE
94	.global interrupt_level_2_handler	94	.global interrupt_level_2_handler
95	interrupt_level_2_handler:	95	interrupt_level_2_handler:
96	INTERRUPT_LEVEL_N_HANDLER 2	96	INTERRUPT_LEVEL_N_HANDLER 2
97		97
98	/* TT = 0x43, TL = 0, interrupt_level_3 handler */	98	/* TT = 0x43, TL = 0, interrupt_level_3 handler */
99	.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE	99	.org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE
100	.global interrupt_level_3_handler	100	.global interrupt_level_3_handler
101	interrupt_level_3_handler:	101	interrupt_level_3_handler:
102	INTERRUPT_LEVEL_N_HANDLER 3	102	INTERRUPT_LEVEL_N_HANDLER 3
103		103
104	/* TT = 0x44, TL = 0, interrupt_level_4 handler */	104	/* TT = 0x44, TL = 0, interrupt_level_4 handler */
105	.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE	105	.org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE
106	.global interrupt_level_4_handler	106	.global interrupt_level_4_handler
107	interrupt_level_4_handler:	107	interrupt_level_4_handler:
108	INTERRUPT_LEVEL_N_HANDLER 4	108	INTERRUPT_LEVEL_N_HANDLER 4
109		109
110	/* TT = 0x45, TL = 0, interrupt_level_5 handler */	110	/* TT = 0x45, TL = 0, interrupt_level_5 handler */
111	.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE	111	.org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE
112	.global interrupt_level_5_handler	112	.global interrupt_level_5_handler
113	interrupt_level_5_handler:	113	interrupt_level_5_handler:
114	INTERRUPT_LEVEL_N_HANDLER 5	114	INTERRUPT_LEVEL_N_HANDLER 5
115		115
116	/* TT = 0x46, TL = 0, interrupt_level_6 handler */	116	/* TT = 0x46, TL = 0, interrupt_level_6 handler */
117	.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE	117	.org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE
118	.global interrupt_level_6_handler	118	.global interrupt_level_6_handler
119	interrupt_level_6_handler:	119	interrupt_level_6_handler:
120	INTERRUPT_LEVEL_N_HANDLER 6	120	INTERRUPT_LEVEL_N_HANDLER 6
121		121
122	/* TT = 0x47, TL = 0, interrupt_level_7 handler */	122	/* TT = 0x47, TL = 0, interrupt_level_7 handler */
123	.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE	123	.org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE
124	.global interrupt_level_7_handler	124	.global interrupt_level_7_handler
125	interrupt_level_7_handler:	125	interrupt_level_7_handler:
126	INTERRUPT_LEVEL_N_HANDLER 7	126	INTERRUPT_LEVEL_N_HANDLER 7
127		127
128	/* TT = 0x48, TL = 0, interrupt_level_8 handler */	128	/* TT = 0x48, TL = 0, interrupt_level_8 handler */
129	.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE	129	.org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE
130	.global interrupt_level_8_handler	130	.global interrupt_level_8_handler
131	interrupt_level_8_handler:	131	interrupt_level_8_handler:
132	INTERRUPT_LEVEL_N_HANDLER 8	132	INTERRUPT_LEVEL_N_HANDLER 8
133		133
134	/* TT = 0x49, TL = 0, interrupt_level_9 handler */	134	/* TT = 0x49, TL = 0, interrupt_level_9 handler */
135	.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE	135	.org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE
136	.global interrupt_level_9_handler	136	.global interrupt_level_9_handler
137	interrupt_level_9_handler:	137	interrupt_level_9_handler:
138	INTERRUPT_LEVEL_N_HANDLER 9	138	INTERRUPT_LEVEL_N_HANDLER 9
139		139
140	/* TT = 0x4a, TL = 0, interrupt_level_10 handler */	140	/* TT = 0x4a, TL = 0, interrupt_level_10 handler */
141	.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE	141	.org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE
142	.global interrupt_level_10_handler	142	.global interrupt_level_10_handler
143	interrupt_level_10_handler:	143	interrupt_level_10_handler:
144	INTERRUPT_LEVEL_N_HANDLER 10	144	INTERRUPT_LEVEL_N_HANDLER 10
145		145
146	/* TT = 0x4b, TL = 0, interrupt_level_11 handler */	146	/* TT = 0x4b, TL = 0, interrupt_level_11 handler */
147	.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE	147	.org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE
148	.global interrupt_level_11_handler	148	.global interrupt_level_11_handler
149	interrupt_level_11_handler:	149	interrupt_level_11_handler:
150	INTERRUPT_LEVEL_N_HANDLER 11	150	INTERRUPT_LEVEL_N_HANDLER 11
151		151
152	/* TT = 0x4c, TL = 0, interrupt_level_12 handler */	152	/* TT = 0x4c, TL = 0, interrupt_level_12 handler */
153	.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE	153	.org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE
154	.global interrupt_level_12_handler	154	.global interrupt_level_12_handler
155	interrupt_level_12_handler:	155	interrupt_level_12_handler:
156	INTERRUPT_LEVEL_N_HANDLER 12	156	INTERRUPT_LEVEL_N_HANDLER 12
157		157
158	/* TT = 0x4d, TL = 0, interrupt_level_13 handler */	158	/* TT = 0x4d, TL = 0, interrupt_level_13 handler */
159	.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE	159	.org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE
160	.global interrupt_level_13_handler	160	.global interrupt_level_13_handler
161	interrupt_level_13_handler:	161	interrupt_level_13_handler:
162	INTERRUPT_LEVEL_N_HANDLER 13	162	INTERRUPT_LEVEL_N_HANDLER 13
163		163
164	/* TT = 0x4e, TL = 0, interrupt_level_14 handler */	164	/* TT = 0x4e, TL = 0, interrupt_level_14 handler */
165	.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE	165	.org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE
166	.global interrupt_level_14_handler	166	.global interrupt_level_14_handler
167	interrupt_level_14_handler:	167	interrupt_level_14_handler:
168	INTERRUPT_LEVEL_N_HANDLER 14	168	INTERRUPT_LEVEL_N_HANDLER 14
169		169
170	/* TT = 0x4f, TL = 0, interrupt_level_15 handler */	170	/* TT = 0x4f, TL = 0, interrupt_level_15 handler */
171	.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE	171	.org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE
172	.global interrupt_level_15_handler	172	.global interrupt_level_15_handler
173	interrupt_level_15_handler:	173	interrupt_level_15_handler:
174	INTERRUPT_LEVEL_N_HANDLER 15	174	INTERRUPT_LEVEL_N_HANDLER 15
175		175
176	/* TT = 0x60, TL = 0, interrupt_vector_trap handler */	176	/* TT = 0x60, TL = 0, interrupt_vector_trap handler */
177	.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE	177	.org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE
178	.global interrupt_vector_trap_handler	178	.global interrupt_vector_trap_handler
179	interrupt_vector_trap_handler:	179	interrupt_vector_trap_handler:
180	INTERRUPT_VECTOR_TRAP_HANDLER	180	INTERRUPT_VECTOR_TRAP_HANDLER
181		181
182	/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */	182	/* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */
183	.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE	183	.org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE
184	.global fast_instruction_access_mmu_miss_handler	184	.global fast_instruction_access_mmu_miss_handler
185	fast_instruction_access_mmu_miss_handler:	185	fast_instruction_access_mmu_miss_handler:
186	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER	186	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
187		187
188	/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */	188	/* TT = 0x68, TL = 0, fast_data_access_MMU_miss */
189	.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE	189	.org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE
190	.global fast_data_access_mmu_miss_handler	190	.global fast_data_access_mmu_miss_handler
191	fast_data_access_mmu_miss_handler:	191	fast_data_access_mmu_miss_handler:
192	FAST_DATA_ACCESS_MMU_MISS_HANDLER	192	FAST_DATA_ACCESS_MMU_MISS_HANDLER
193		193
194	/* TT = 0x6c, TL = 0, fast_data_access_protection */	194	/* TT = 0x6c, TL = 0, fast_data_access_protection */
195	.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE	195	.org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE
196	.global fast_data_access_protection_handler	196	.global fast_data_access_protection_handler
197	fast_data_access_protection_handler:	197	fast_data_access_protection_handler:
198	FAST_DATA_ACCESS_PROTECTION_HANDLER	198	FAST_DATA_ACCESS_PROTECTION_HANDLER
199		199
200	/* TT = 0x80, TL = 0, spill_0_normal handler */	200	/* TT = 0x80, TL = 0, spill_0_normal handler */
201	.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE	201	.org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE
202	.global spill_0_normal	202	.global spill_0_normal
203	spill_0_normal:	203	spill_0_normal:
204	SPILL_NORMAL_HANDLER_KERNEL	204	SPILL_NORMAL_HANDLER_KERNEL
205		205
206	/* TT = 0xc0, TL = 0, fill_0_normal handler */	206	/* TT = 0xc0, TL = 0, fill_0_normal handler */
207	.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE	207	.org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE
208	.global fill_0_normal	208	.global fill_0_normal
209	fill_0_normal:	209	fill_0_normal:
210	FILL_NORMAL_HANDLER_KERNEL	210	FILL_NORMAL_HANDLER_KERNEL
211		211
212	/*	212	/*
213	* Handlers for TL>0.	213	* Handlers for TL>0.
214	*/	214	*/
215		215
216	/* TT = 0x08, TL > 0, instruction_access_exception */	216	/* TT = 0x08, TL > 0, instruction_access_exception */
217	.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE	217	.org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE
218	.global instruction_access_exception_high	218	.global instruction_access_exception_high
219	instruction_access_exception_high:	219	instruction_access_exception_high:
220	SIMPLE_HANDLER do_instruction_access_exc	220	SIMPLE_HANDLER do_instruction_access_exc
221		221
222	/* TT = 0x10, TL > 0, illegal_instruction */	222	/* TT = 0x10, TL > 0, illegal_instruction */
223	.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE	223	.org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE
224	.global illegal_instruction_high	224	.global illegal_instruction_high
225	illegal_instruction_high:	225	illegal_instruction_high:
226	SIMPLE_HANDLER do_illegal_instruction	226	SIMPLE_HANDLER do_illegal_instruction
227		227
228	/* TT = 0x24, TL > 0, clean_window handler */	228	/* TT = 0x24, TL > 0, clean_window handler */
229	.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE	229	.org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE
230	.global clean_window_handler_high	230	.global clean_window_handler_high
231	clean_window_handler_high:	231	clean_window_handler_high:
232	CLEAN_WINDOW_HANDLER	232	CLEAN_WINDOW_HANDLER
233		233
234	/* TT = 0x32, TL > 0, data_access_error */	234	/* TT = 0x32, TL > 0, data_access_error */
235	.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE	235	.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
236	.global data_access_error_high	236	.global data_access_error_high
237	data_access_error_high:	237	data_access_error_high:
238	SIMPLE_HANDLER do_data_access_error	238	SIMPLE_HANDLER do_data_access_error
239		239
240	/* TT = 0x34, TL > 0, mem_address_not_aligned */	240	/* TT = 0x34, TL > 0, mem_address_not_aligned */
241	.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE	241	.org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE
242	.global mem_address_not_aligned_high	242	.global mem_address_not_aligned_high
243	mem_address_not_aligned_high:	243	mem_address_not_aligned_high:
244	SIMPLE_HANDLER do_mem_address_not_aligned	244	SIMPLE_HANDLER do_mem_address_not_aligned
245		245
246	/* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */	246	/* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */
247	.org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE	247	.org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE
248	.global fast_instruction_access_mmu_miss_handler_high	248	.global fast_instruction_access_mmu_miss_handler_high
249	fast_instruction_access_mmu_miss_handler_high:	249	fast_instruction_access_mmu_miss_handler_high:
250	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER	250	FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
251		251
252	/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */	252	/* TT = 0x68, TL > 0, fast_data_access_MMU_miss */
253	.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE	253	.org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE
254	.global fast_data_access_mmu_miss_handler_high	254	.global fast_data_access_mmu_miss_handler_high
255	fast_data_access_mmu_miss_handler_high:	255	fast_data_access_mmu_miss_handler_high:
256	FAST_DATA_ACCESS_MMU_MISS_HANDLER	256	FAST_DATA_ACCESS_MMU_MISS_HANDLER
257		257
258	/* TT = 0x6c, TL > 0, fast_data_access_protection */	258	/* TT = 0x6c, TL > 0, fast_data_access_protection */
259	.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE	259	.org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE
260	.global fast_data_access_protection_handler_high	260	.global fast_data_access_protection_handler_high
261	fast_data_access_protection_handler_high:	261	fast_data_access_protection_handler_high:
262	FAST_DATA_ACCESS_PROTECTION_HANDLER	262	FAST_DATA_ACCESS_PROTECTION_HANDLER
263		263
264	/* TT = 0x80, TL > 0, spill_0_normal handler */	264	/* TT = 0x80, TL > 0, spill_0_normal handler */
265	.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE	265	.org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE
266	.global spill_0_normal_high	266	.global spill_0_normal_high
267	spill_0_normal_high:	267	spill_0_normal_high:
268	SPILL_NORMAL_HANDLER_KERNEL	268	SPILL_NORMAL_HANDLER_KERNEL
269		269
270	/* TT = 0xc0, TL > 0, fill_0_normal handler */	270	/* TT = 0xc0, TL > 0, fill_0_normal handler */
271	.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE	271	.org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE
272	.global fill_0_normal_high	272	.global fill_0_normal_high
273	fill_0_normal_high:	273	fill_0_normal_high:
274	FILL_NORMAL_HANDLER_KERNEL	274	FILL_NORMAL_HANDLER_KERNEL
275		275
276		276
277	/* Preemptible trap handler for TL=1.	277	/* Preemptible trap handler for TL=1.
278	*	278	*
279	* This trap handler makes arrangements to make calling of scheduler() from	279	* This trap handler makes arrangements to make calling of scheduler() from
280	* within a trap context possible. It is called from several other trap	280	* within a trap context possible. It is called from several other trap
281	* handlers.	281	* handlers.
282	*	282	*
283	* This function can be entered either with interrupt globals or alternate globals.	283	* This function can be entered either with interrupt globals or alternate globals.
284	* Memory management trap handlers are obliged to switch to one of those global sets	284	* Memory management trap handlers are obliged to switch to one of those global sets
285	* prior to calling this function. Register window management functions are not	285	* prior to calling this function. Register window management functions are not
286	* allowed to modify the alternate global registers.	286	* allowed to modify the alternate global registers.
287	*	287	*
288	* Input registers:	288	* Input registers:
289	* %g1 Address of function to call.	289	* %g1 Address of function to call.
290	* %g2 Argument for the function.	290	* %g2 Argument for the function.
291	* %g6 Pre-set as kernel stack base if trap from userspace.	291	* %g6 Pre-set as kernel stack base if trap from userspace.
292	* %g7 Reserved.	292	* %g7 Reserved.
293	*/	293	*/
294	.global preemptible_handler	294	.global preemptible_handler
295	preemptible_handler:	295	preemptible_handler:
296	rdpr %tstate, %g3	296	rdpr %tstate, %g3
297	andcc %g3, TSTATE_PRIV_BIT, %g0 ! if this trap came from the privileged mode...	297	andcc %g3, TSTATE_PRIV_BIT, %g0 ! if this trap came from the privileged mode...
298	bnz 0f ! ...skip setting of kernel stack and primary context	298	bnz 0f ! ...skip setting of kernel stack and primary context
299	nop	299	nop
300		300
301	/*	301	/*
302	* Switch to kernel stack. The old stack is	302	* Switch to kernel stack. The old stack is
303	* automatically saved in the old window's %sp	303	* automatically saved in the old window's %sp
304	* and the new window's %fp.	304	* and the new window's %fp.
305	*/	305	*/
306	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp	306	save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
307		307
308	/*	308	/*
309	* Mark the CANSAVE windows as OTHER windows.	309	* Mark the CANSAVE windows as OTHER windows.
310	* Set CLEANWIN to NWINDOW-1 so that clean_window traps do not occur.	310	* Set CLEANWIN to NWINDOW-1 so that clean_window traps do not occur.
311	*/	311	*/
312	rdpr %cansave, %l0	312	rdpr %cansave, %l0
313	wrpr %l0, %otherwin	313	wrpr %l0, %otherwin
314	wrpr %g0, %cansave	314	wrpr %g0, %cansave
315	wrpr %g0, NWINDOW-1, %cleanwin	315	wrpr %g0, NWINDOW-1, %cleanwin
316		316
317	/*	317	/*
318	* Switch to primary context 0.	318	* Switch to primary context 0.
319	*/	319	*/
320	mov VA_PRIMARY_CONTEXT_REG, %l0	320	mov VA_PRIMARY_CONTEXT_REG, %l0
321	stxa %g0, [%l0] ASI_DMMU	321	stxa %g0, [%l0] ASI_DMMU
322	set kernel_image_start, %l0	322	set kernel_image_start, %l0
323	flush %l0	323	flush %l0
324		324
325	ba 1f	325	ba 1f
326	nop	326	nop
327		327
328	0:	328	0:
329	save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp	329	save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
330		330
331	/*	331	/*
332	* At this moment, we are using the kernel stack	332	* At this moment, we are using the kernel stack
333	* and have successfully allocated a register window.	333	* and have successfully allocated a register window.
334	*/	334	*/
335	1:	335	1:
336		336
337	/*	337	/*
338	* Copy arguments.	338	* Copy arguments.
339	*/	339	*/
340	mov %g1, %l0	340	mov %g1, %l0
341	mov %g2, %o0	341	mov %g2, %o0
342		342
343	/*	343	/*
344	* Save TSTATE, TPC and TNPC aside.	344	* Save TSTATE, TPC and TNPC aside.
345	*/	345	*/
346	rdpr %tstate, %g1	346	rdpr %tstate, %g1
347	rdpr %tpc, %g2	347	rdpr %tpc, %g2
348	rdpr %tnpc, %g3	348	rdpr %tnpc, %g3
349		349
350	/*	350	/*
351	* The following memory accesses will not fault	351	* The following memory accesses will not fault
352	* because special provisions are made to have	352	* because special provisions are made to have
353	* the kernel stack of THREAD locked in DTLB.	353	* the kernel stack of THREAD locked in DTLB.
354	*/	354	*/
355	stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]	355	stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE]
356	stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]	356	stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC]
357	stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]	357	stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC]
358		358
359	wrpr %g0, 0, %tl	359	wrpr %g0, 0, %tl
360	wrpr %g0, PSTATE_PRIV_BIT, %pstate	360	wrpr %g0, PSTATE_PRIV_BIT, %pstate
361	SAVE_GLOBALS	361	SAVE_GLOBALS
362		362
363	/*	363	/*
364	* Call the higher-level handler and pass istate as second parameter.	364	* Call the higher-level handler and pass istate as second parameter.
365	*/	365	*/
366	call %l0	366	call %l0
367	add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1	367	add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1
368		368
369	RESTORE_GLOBALS	369	RESTORE_GLOBALS
370	wrpr %g0, PSTATE_AG_BIT \| PSTATE_PRIV_BIT, %pstate	370	wrpr %g0, PSTATE_AG_BIT \| PSTATE_PRIV_BIT, %pstate
371	wrpr %g0, 1, %tl	371	wrpr %g0, 1, %tl
372		372
373	/*	373	/*
374	* Read TSTATE, TPC and TNPC from saved copy.	374	* Read TSTATE, TPC and TNPC from saved copy.
375	*/	375	*/
376	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1	376	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
377	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2	377	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
378	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3	378	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
379		379
380	/*	380	/*
381	* Restore TSTATE, TPC and TNPC from saved copies.	381	* Restore TSTATE, TPC and TNPC from saved copies.
382	*/	382	*/
383	wrpr %g1, 0, %tstate	383	wrpr %g1, 0, %tstate
384	wrpr %g2, 0, %tpc	384	wrpr %g2, 0, %tpc
385	wrpr %g3, 0, %tnpc	385	wrpr %g3, 0, %tnpc
386		386
387	/*	387	/*
388	* If OTHERWIN is zero, then all the userspace windows have been	388	* If OTHERWIN is zero, then all the userspace windows have been
389	* spilled to kernel memory (i.e. register window buffer). If	389	* spilled to kernel memory (i.e. register window buffer). If
390	* OTHERWIN is non-zero, then some userspace windows are still	390	* OTHERWIN is non-zero, then some userspace windows are still
391	* valid. Others might have been spilled. However, the CWP pointer	391	* valid. Others might have been spilled. However, the CWP pointer
392	* needs no fixing because the scheduler had not been called.	392	* needs no fixing because the scheduler had not been called.
393	*/	393	*/
394	rdpr %otherwin, %l0	394	rdpr %otherwin, %l0
395	brnz %l0, 0f	395	brnz %l0, 0f
396	nop	396	nop
397		397
398	/*	398	/*
399	* OTHERWIN == 0	399	* OTHERWIN == 0
400	*/	400	*/
401		401
402	/*	402	/*
403	* If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP.	403	* If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP.
404	*/	404	*/
405	and %g1, TSTATE_CWP_MASK, %l0	405	and %g1, TSTATE_CWP_MASK, %l0
406	inc %l0	406	inc %l0
407	and %l0, TSTATE_CWP_MASK, %l0 ! %l0 mod NWINDOW	407	and %l0, TSTATE_CWP_MASK, %l0 ! %l0 mod NWINDOW
408	rdpr %cwp, %l1	408	rdpr %cwp, %l1
409	cmp %l0, %l1	409	cmp %l0, %l1
410	bz 0f ! CWP is ok	410	bz 0f ! CWP is ok
411	nop	411	nop
412		412
413	/*	413	/*
414	* Fix CWP.	414	* Fix CWP.
-		415	* Just for reminder, the input registers in the current window
-		416	* are the output registers of the window to which we want to
-		417	* restore. Because the fill trap fills only input and local
-		418	* registers of a window, we need to preserve those output
-		419	* registers manually.
415	*/	420	*/
416	mov %fp, %g1	-
417	flushw	421	flushw
-		422	mov %sp, %g1
-		423	stx %i0, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0]
-		424	stx %i1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1]
-		425	stx %i2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2]
-		426	stx %i3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3]
-		427	stx %i4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4]
-		428	stx %i5, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5]
-		429	stx %i6, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6]
-		430	stx %i7, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7]
418	wrpr %l0, 0, %cwp	431	wrpr %l0, 0, %cwp
419	mov %g1, %fp	432	mov %g1, %sp
-		433	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I0], %i0
-		434	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I1], %i1
-		435	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I2], %i2
-		436	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I3], %i3
-		437	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I4], %i4
-		438	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I5], %i5
-		439	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I6], %i6
-		440	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_I7], %i7
420		441
421	/*	442	/*
422	* OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.	443	* OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
423	*/	444	*/
424	0:	445	0:
425	! TODO: restore register windows from register window memory buffer	446	! TODO: restore register windows from register window memory buffer
426		447
427	restore	448	restore
428	retry	449	retry
429		450

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/sparc64/src/trap/trap_table.S – Rev 1852 → 1855