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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64interrupt |
29 | /** @addtogroup sparc64interrupt |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch/interrupt.h> |
35 | #include <arch/interrupt.h> |
36 | #include <arch/trap/interrupt.h> |
36 | #include <arch/trap/interrupt.h> |
37 | #include <interrupt.h> |
37 | #include <interrupt.h> |
38 | #include <ddi/irq.h> |
38 | #include <ddi/irq.h> |
39 | #include <typedefs.h> |
39 | #include <typedefs.h> |
40 | #include <arch/types.h> |
40 | #include <arch/types.h> |
41 | #include <debug.h> |
41 | #include <debug.h> |
42 | #include <ipc/sysipc.h> |
- | |
43 | #include <arch/asm.h> |
42 | #include <arch/asm.h> |
44 | #include <arch/barrier.h> |
43 | #include <arch/barrier.h> |
45 | #include <print.h> |
44 | #include <print.h> |
46 | #include <arch.h> |
45 | #include <arch.h> |
47 | #include <mm/tlb.h> |
46 | #include <mm/tlb.h> |
48 | #include <config.h> |
47 | #include <config.h> |
49 | #include <synch/spinlock.h> |
48 | #include <synch/spinlock.h> |
50 | 49 | ||
51 | /* |
- | |
52 | * To be removed once we get rid of the dependency in ipc_irq_bind_arch(). |
- | |
53 | */ |
- | |
54 | #include <arch/drivers/kbd.h> |
- | |
55 | #include <genarch/kbd/z8530.h> |
- | |
56 | - | ||
57 | /** Register Interrupt Level Handler. |
50 | /** Register Interrupt Level Handler. |
58 | * |
51 | * |
59 | * @param n Interrupt Level (1 - 15). |
52 | * @param n Interrupt Level (1 - 15). |
60 | * @param name Short descriptive string. |
53 | * @param name Short descriptive string. |
61 | * @param f Handler. |
54 | * @param f Handler. |
62 | */ |
55 | */ |
63 | void interrupt_register(int n, const char *name, iroutine f) |
56 | void interrupt_register(int n, const char *name, iroutine f) |
64 | { |
57 | { |
65 | ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS); |
58 | ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS); |
66 | 59 | ||
67 | exc_register(n - 1, name, f); |
60 | exc_register(n - 1, name, f); |
68 | } |
61 | } |
69 | - | ||
70 | /* Reregister irq to be IPC-ready */ |
- | |
71 | void irq_ipc_bind_arch(unative_t irq) |
- | |
72 | { |
- | |
73 | #ifdef CONFIG_Z8530 |
- | |
74 | if (kbd_type == KBD_Z8530) |
- | |
75 | z8530_belongs_to_kernel = false; |
- | |
76 | #endif |
- | |
77 | } |
- | |
78 | 62 | ||
79 | /** Process hardware interrupt. |
63 | /** Process hardware interrupt. |
80 | * |
64 | * |
81 | * @param n Ignored. |
65 | * @param n Ignored. |
82 | * @param istate Ignored. |
66 | * @param istate Ignored. |
83 | */ |
67 | */ |
84 | void interrupt(int n, istate_t *istate) |
68 | void interrupt(int n, istate_t *istate) |
85 | { |
69 | { |
86 | uint64_t intrcv; |
70 | uint64_t intrcv; |
87 | uint64_t data0; |
71 | uint64_t data0; |
88 | 72 | ||
89 | intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0); |
73 | intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0); |
90 | data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0); |
74 | data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0); |
91 | 75 | ||
92 | irq_t *irq = irq_dispatch_and_lock(data0); |
76 | irq_t *irq = irq_dispatch_and_lock(data0); |
93 | if (irq) { |
77 | if (irq) { |
94 | /* |
78 | /* |
95 | * The IRQ handler was found. |
79 | * The IRQ handler was found. |
96 | */ |
80 | */ |
97 | irq->handler(irq, irq->arg); |
81 | irq->handler(irq, irq->arg); |
98 | spinlock_unlock(&irq->lock); |
82 | spinlock_unlock(&irq->lock); |
99 | } else if (data0 > config.base) { |
83 | } else if (data0 > config.base) { |
100 | /* |
84 | /* |
101 | * This is a cross-call. |
85 | * This is a cross-call. |
102 | * data0 contains address of kernel function. |
86 | * data0 contains address of kernel function. |
103 | * We call the function only after we verify |
87 | * We call the function only after we verify |
104 | * it is on of the supported ones. |
88 | * it is on of the supported ones. |
105 | */ |
89 | */ |
106 | #ifdef CONFIG_SMP |
90 | #ifdef CONFIG_SMP |
107 | if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) { |
91 | if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) { |
108 | tlb_shootdown_ipi_recv(); |
92 | tlb_shootdown_ipi_recv(); |
109 | } |
93 | } |
110 | #endif |
94 | #endif |
111 | } else { |
95 | } else { |
112 | /* |
96 | /* |
113 | * Spurious interrupt. |
97 | * Spurious interrupt. |
114 | */ |
98 | */ |
115 | #ifdef CONFIG_DEBUG |
99 | #ifdef CONFIG_DEBUG |
116 | printf("cpu%d: spurious interrupt (intrcv=%#llx, data0=%#llx)\n", CPU->id, intrcv, data0); |
100 | printf("cpu%d: spurious interrupt (intrcv=%#llx, data0=%#llx)\n", CPU->id, intrcv, data0); |
117 | #endif |
101 | #endif |
118 | } |
102 | } |
119 | 103 | ||
120 | membar(); |
104 | membar(); |
121 | asi_u64_write(ASI_INTR_RECEIVE, 0, 0); |
105 | asi_u64_write(ASI_INTR_RECEIVE, 0, 0); |
122 | } |
106 | } |
123 | 107 | ||
124 | /** @} |
108 | /** @} |
125 | */ |
109 | */ |
126 | 110 |