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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64interrupt |
29 | /** @addtogroup sparc64interrupt |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch/interrupt.h> |
35 | #include <arch/interrupt.h> |
36 | #include <arch/trap/interrupt.h> |
36 | #include <arch/trap/interrupt.h> |
37 | #include <interrupt.h> |
37 | #include <interrupt.h> |
38 | #include <ddi/irq.h> |
38 | #include <ddi/irq.h> |
39 | #include <typedefs.h> |
39 | #include <typedefs.h> |
40 | #include <arch/types.h> |
40 | #include <arch/types.h> |
41 | #include <debug.h> |
41 | #include <debug.h> |
42 | #include <ipc/sysipc.h> |
42 | #include <ipc/sysipc.h> |
43 | #include <arch/asm.h> |
43 | #include <arch/asm.h> |
44 | #include <arch/barrier.h> |
44 | #include <arch/barrier.h> |
45 | #include <print.h> |
45 | #include <print.h> |
46 | #include <arch.h> |
46 | #include <arch.h> |
47 | #include <mm/tlb.h> |
47 | #include <mm/tlb.h> |
48 | #include <config.h> |
48 | #include <config.h> |
- | 49 | #include <synch/spinlock.h> |
|
49 | 50 | ||
50 | /* |
51 | /* |
51 | * To be removed once we get rid of the dependency in ipc_irq_bind_arch(). |
52 | * To be removed once we get rid of the dependency in ipc_irq_bind_arch(). |
52 | */ |
53 | */ |
53 | #include <arch/drivers/kbd.h> |
54 | #include <arch/drivers/kbd.h> |
54 | #include <genarch/kbd/z8530.h> |
55 | #include <genarch/kbd/z8530.h> |
55 | 56 | ||
56 | /** Register Interrupt Level Handler. |
57 | /** Register Interrupt Level Handler. |
57 | * |
58 | * |
58 | * @param n Interrupt Level (1 - 15). |
59 | * @param n Interrupt Level (1 - 15). |
59 | * @param name Short descriptive string. |
60 | * @param name Short descriptive string. |
60 | * @param f Handler. |
61 | * @param f Handler. |
61 | */ |
62 | */ |
62 | void interrupt_register(int n, const char *name, iroutine f) |
63 | void interrupt_register(int n, const char *name, iroutine f) |
63 | { |
64 | { |
64 | ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS); |
65 | ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS); |
65 | 66 | ||
66 | exc_register(n - 1, name, f); |
67 | exc_register(n - 1, name, f); |
67 | } |
68 | } |
68 | 69 | ||
69 | /* Reregister irq to be IPC-ready */ |
70 | /* Reregister irq to be IPC-ready */ |
70 | void irq_ipc_bind_arch(unative_t irq) |
71 | void irq_ipc_bind_arch(unative_t irq) |
71 | { |
72 | { |
72 | #ifdef CONFIG_Z8530 |
73 | #ifdef CONFIG_Z8530 |
73 | if (kbd_type == KBD_Z8530) |
74 | if (kbd_type == KBD_Z8530) |
74 | z8530_belongs_to_kernel = false; |
75 | z8530_belongs_to_kernel = false; |
75 | #endif |
76 | #endif |
76 | } |
77 | } |
77 | 78 | ||
78 | /** Process hardware interrupt. |
79 | /** Process hardware interrupt. |
79 | * |
80 | * |
80 | * @param n Ignored. |
81 | * @param n Ignored. |
81 | * @param istate Ignored. |
82 | * @param istate Ignored. |
82 | */ |
83 | */ |
83 | void interrupt(int n, istate_t *istate) |
84 | void interrupt(int n, istate_t *istate) |
84 | { |
85 | { |
85 | uint64_t intrcv; |
86 | uint64_t intrcv; |
86 | uint64_t data0; |
87 | uint64_t data0; |
87 | 88 | ||
88 | intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0); |
89 | intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0); |
89 | data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0); |
90 | data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0); |
90 | 91 | ||
91 | irq_t *irq = irq_dispatch(data0); |
92 | irq_t *irq = irq_dispatch_and_lock(data0); |
92 | if (irq) { |
93 | if (irq) { |
93 | /* |
94 | /* |
94 | * The IRQ handler was found. |
95 | * The IRQ handler was found. |
95 | */ |
96 | */ |
96 | irq->handler(irq, irq->arg); |
97 | irq->handler(irq, irq->arg); |
- | 98 | spinlock_unlock(&irq->lock); |
|
97 | } else if (data0 > config.base) { |
99 | } else if (data0 > config.base) { |
98 | /* |
100 | /* |
99 | * This is a cross-call. |
101 | * This is a cross-call. |
100 | * data0 contains address of kernel function. |
102 | * data0 contains address of kernel function. |
101 | * We call the function only after we verify |
103 | * We call the function only after we verify |
102 | * it is on of the supported ones. |
104 | * it is on of the supported ones. |
103 | */ |
105 | */ |
104 | #ifdef CONFIG_SMP |
106 | #ifdef CONFIG_SMP |
105 | if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) { |
107 | if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) { |
106 | tlb_shootdown_ipi_recv(); |
108 | tlb_shootdown_ipi_recv(); |
107 | } |
109 | } |
108 | #endif |
110 | #endif |
109 | } else { |
111 | } else { |
110 | /* |
112 | /* |
111 | * Spurious interrupt. |
113 | * Spurious interrupt. |
112 | */ |
114 | */ |
113 | #ifdef CONFIG_DEBUG |
115 | #ifdef CONFIG_DEBUG |
114 | printf("cpu%d: spurious interrupt (intrcv=%#llx, data0=%#llx)\n", CPU->id, intrcv, data0); |
116 | printf("cpu%d: spurious interrupt (intrcv=%#llx, data0=%#llx)\n", CPU->id, intrcv, data0); |
115 | #endif |
117 | #endif |
116 | } |
118 | } |
117 | 119 | ||
118 | membar(); |
120 | membar(); |
119 | asi_u64_write(ASI_INTR_RECEIVE, 0, 0); |
121 | asi_u64_write(ASI_INTR_RECEIVE, 0, 0); |
120 | } |
122 | } |
121 | 123 | ||
122 | /** @} |
124 | /** @} |
123 | */ |
125 | */ |
124 | 126 |