WebSVN – HelenOS – Diff – /trunk/kernel/arch/sparc64/src/trap/interrupt.c


/*
 * Copyright (C) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup sparc64interrupt
 * @{
 */
/** @file
 */
 
#include <arch/interrupt.h>
#include <arch/trap/interrupt.h>
#include <interrupt.h>
#include <arch/drivers/fhc.h>
#include <arch/drivers/kbd.h>
#include <typedefs.h>
#include <arch/types.h>
#include <debug.h>
#include <ipc/sysipc.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <print.h>
#include <genarch/kbd/z8530.h>
#include <arch.h>
#include <mm/tlb.h>
#include <config.h>
 
/** Register Interrupt Level Handler.
 *
 * @param n Interrupt Level (1 - 15).
 * @param name Short descriptive string.
 * @param f Handler.
 */
void interrupt_register(int n, const char *name, iroutine f)
{
    ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS);
   
    exc_register(n - 1, name, f);
}
 
/* Reregister irq to be IPC-ready */
void irq_ipc_bind_arch(unative_t irq)
{
#ifdef CONFIG_Z8530
    if (kbd_type == KBD_Z8530)
        z8530_belongs_to_kernel = false;
#endif
}
 
void interrupt(int n, istate_t *istate)
{
    uint64_t intrcv;
    uint64_t data0;
 
    intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
    data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0);
 
    switch (data0) {
#ifdef CONFIG_Z8530
    case Z8530_INTRCV_DATA0:
        if (kbd_type != KBD_Z8530)
            break;
        /*
         * So far, we know we got this interrupt through the FHC.
         * Since we don't have enough information about the FHC and
         * because the interrupt looks like level sensitive,
         * we cannot handle it by scheduling one of the level
         * interrupt traps. Call the interrupt handler directly.
         */
 
        if (z8530_belongs_to_kernel)
            z8530_interrupt();
        else
            ipc_irq_send_notif(0);
        fhc_clear_interrupt(central_fhc, data0);
        break;
 
#endif
    default:
        if (data0 > config.base) {
            /*
             * This is a cross-call.
             * data0 contains address of kernel function.
             * We call the function only after we verify
             * it is on of the supported ones.
             */
#ifdef CONFIG_SMP
            if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {
                tlb_shootdown_ipi_recv();
                break;
            }
#endif
        }
           
        printf("cpu%d: spurious interrupt (intrcv=%#llx, data0=%#llx)\n", CPU->id, intrcv, data0);
        break;
    }
 
    membar();
    asi_u64_write(ASI_INTR_RECEIVE, 0, 0);
}
 
/** @}
 */
 

Rev 1904	Rev 1909
1	/*	1	/*
2	* Copyright (C) 2005 Jakub Jermar	2	* Copyright (C) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup sparc64interrupt	29	/** @addtogroup sparc64interrupt
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch/interrupt.h>	35	#include <arch/interrupt.h>
36	#include <arch/trap/interrupt.h>	36	#include <arch/trap/interrupt.h>
37	#include <interrupt.h>	37	#include <interrupt.h>
38	#include <arch/drivers/fhc.h>	38	#include <arch/drivers/fhc.h>
39	#include <arch/drivers/kbd.h>	39	#include <arch/drivers/kbd.h>
40	#include <typedefs.h>	40	#include <typedefs.h>
41	#include <arch/types.h>	41	#include <arch/types.h>
42	#include <debug.h>	42	#include <debug.h>
43	#include <ipc/sysipc.h>	43	#include <ipc/sysipc.h>
44	#include <arch/asm.h>	44	#include <arch/asm.h>
45	#include <arch/barrier.h>	45	#include <arch/barrier.h>
46	#include <print.h>	46	#include <print.h>
47	#include <genarch/kbd/z8530.h>	47	#include <genarch/kbd/z8530.h>
48	#include <arch.h>	48	#include <arch.h>
49	#include <mm/tlb.h>	49	#include <mm/tlb.h>
50	#include <config.h>	50	#include <config.h>
51		51
52	/** Register Interrupt Level Handler.	52	/** Register Interrupt Level Handler.
53	*	53	*
54	* @param n Interrupt Level (1 - 15).	54	* @param n Interrupt Level (1 - 15).
55	* @param name Short descriptive string.	55	* @param name Short descriptive string.
56	* @param f Handler.	56	* @param f Handler.
57	*/	57	*/
58	void interrupt_register(int n, const char *name, iroutine f)	58	void interrupt_register(int n, const char *name, iroutine f)
59	{	59	{
60	ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS);	60	ASSERT(n >= IVT_FIRST && n <= IVT_ITEMS);
61		61
62	exc_register(n - 1, name, f);	62	exc_register(n - 1, name, f);
63	}	63	}
64		64
65	/* Reregister irq to be IPC-ready */	65	/* Reregister irq to be IPC-ready */
66	void irq_ipc_bind_arch(unative_t irq)	66	void irq_ipc_bind_arch(unative_t irq)
67	{	67	{
68	#ifdef CONFIG_Z8530	68	#ifdef CONFIG_Z8530
69	if (kbd_type == KBD_Z8530)	69	if (kbd_type == KBD_Z8530)
70	z8530_belongs_to_kernel = false;	70	z8530_belongs_to_kernel = false;
71	#endif	71	#endif
72	}	72	}
73		73
74	void interrupt(int n, istate_t *istate)	74	void interrupt(int n, istate_t *istate)
75	{	75	{
76	uint64_t intrcv;	76	uint64_t intrcv;
77	uint64_t data0;	77	uint64_t data0;
78		78
79	intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);	79	intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
80	data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0);	80	data0 = asi_u64_read(ASI_UDB_INTR_R, ASI_UDB_INTR_R_DATA_0);
81		81
82	switch (data0) {	82	switch (data0) {
83	#ifdef CONFIG_Z8530	83	#ifdef CONFIG_Z8530
84	case Z8530_INTRCV_DATA0:	84	case Z8530_INTRCV_DATA0:
85	if (kbd_type != KBD_Z8530)	85	if (kbd_type != KBD_Z8530)
86	break;	86	break;
87	/*	87	/*
88	* So far, we know we got this interrupt through the FHC.	88	* So far, we know we got this interrupt through the FHC.
89	* Since we don't have enough information about the FHC and	89	* Since we don't have enough information about the FHC and
90	* because the interrupt looks like level sensitive,	90	* because the interrupt looks like level sensitive,
91	* we cannot handle it by scheduling one of the level	91	* we cannot handle it by scheduling one of the level
92	* interrupt traps. Call the interrupt handler directly.	92	* interrupt traps. Call the interrupt handler directly.
93	*/	93	*/
94		94
95	if (z8530_belongs_to_kernel)	95	if (z8530_belongs_to_kernel)
96	z8530_interrupt();	96	z8530_interrupt();
97	else	97	else
98	ipc_irq_send_notif(0);	98	ipc_irq_send_notif(0);
99	fhc_uart_reset();	99	fhc_clear_interrupt(central_fhc, data0);
100	break;	100	break;
101		101
102	#endif	102	#endif
103	default:	103	default:
104	if (data0 > config.base) {	104	if (data0 > config.base) {
105	/*	105	/*
106	* This is a cross-call.	106	* This is a cross-call.
107	* data0 contains address of kernel function.	107	* data0 contains address of kernel function.
108	* We call the function only after we verify	108	* We call the function only after we verify
109	* it is on of the supported ones.	109	* it is on of the supported ones.
110	*/	110	*/
111	#ifdef CONFIG_SMP	111	#ifdef CONFIG_SMP
112	if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {	112	if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {
113	tlb_shootdown_ipi_recv();	113	tlb_shootdown_ipi_recv();
114	break;	114	break;
115	}	115	}
116	#endif	116	#endif
117	}	117	}
118		118
119	printf("cpu%d: spurious interrupt (intrcv=%#llx, data0=%#llx)\n", CPU->id, intrcv, data0);	119	printf("cpu%d: spurious interrupt (intrcv=%#llx, data0=%#llx)\n", CPU->id, intrcv, data0);
120	break;	120	break;
121	}	121	}
122		122
123	membar();	123	membar();
124	asi_u64_write(ASI_INTR_RECEIVE, 0, 0);	124	asi_u64_write(ASI_INTR_RECEIVE, 0, 0);
125	}	125	}
126		126
127	/** @}	127	/** @}
128	*/	128	*/
129		129

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/sparc64/src/trap/interrupt.c – Rev 1904 → 1909