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/*
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/*
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 * Copyright (C) 2005 Jakub Jermar
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 * Copyright (C) 2005 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup sparc64interrupt
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/** @addtogroup sparc64interrupt
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 *
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 *
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 */
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 */
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#include <arch/trap/exception.h>
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#include <arch/trap/exception.h>
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#include <arch/interrupt.h>
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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <debug.h>
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#include <debug.h>
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#include <typedefs.h>
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/** Handle instruction_access_exception. */
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/** Handle instruction_access_exception. */
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void do_instruction_access_exc(void)
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void do_instruction_access_exc(int n, istate_t *istate)
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{
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{
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    panic("Instruction Access Exception\n");
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    panic("Instruction Access Exception at %p.\n", istate->tpc);
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}
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}
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/** Handle mem_address_not_aligned. */
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/** Handle mem_address_not_aligned. */
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void do_mem_address_not_aligned(void)
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void do_mem_address_not_aligned(int n, istate_t *istate)
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{
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{
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    panic("Memory Address Not Aligned\n");
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    panic("Memory Address Not Aligned from %p.\n", istate->tpc);
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}
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}
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/** Handle data_access_error. */
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/** Handle data_access_error. */
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void do_data_access_error(void)
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void do_data_access_error(int n, istate_t *istate)
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{
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{
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    panic("Data Access Error: %p\n", tpc_read());
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    panic("Data Access Error from %p.\n", istate->tpc);
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}
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}
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/** Handle mem_address_not_aligned. */
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/** Handle mem_address_not_aligned. */
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void do_illegal_instruction(void)
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void do_illegal_instruction(int n, istate_t *istate)
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{
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{
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    panic("Illegal Instruction: %p\n", tpc_read());
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    panic("Illegal Instruction at %p.\n", istate->tpc);
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}
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}
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/** @}
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/** @}
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 */
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 */
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