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1 | /* |
1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
2 | * Copyright (C) 2006 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64mm |
29 | /** @addtogroup sparc64mm |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief D-cache shootdown algorithm. |
- | |
35 | */ |
34 | */ |
36 | 35 | ||
37 | #include <arch/mm/cache.h> |
36 | #include <arch/mm/cache.h> |
38 | 37 | ||
39 | #ifdef CONFIG_SMP |
- | |
40 | - | ||
41 | #include <smp/ipi.h> |
- | |
42 | #include <arch/interrupt.h> |
- | |
43 | #include <synch/spinlock.h> |
- | |
44 | #include <arch.h> |
- | |
45 | #include <debug.h> |
- | |
46 | - | ||
47 | /** |
- | |
48 | * This spinlock is used by the processors to synchronize during the D-cache |
- | |
49 | * shootdown. |
- | |
50 | */ |
- | |
51 | SPINLOCK_INITIALIZE(dcachelock); |
- | |
52 | - | ||
53 | /** Initialize the D-cache shootdown sequence. |
- | |
54 | * |
- | |
55 | * Start the shootdown sequence by sending out an IPI and wait until all |
- | |
56 | * processors spin on the dcachelock spinlock. |
- | |
57 | */ |
- | |
58 | void dcache_shootdown_start(void) |
- | |
59 | { |
- | |
60 | int i; |
- | |
61 | - | ||
62 | CPU->arch.dcache_active = 0; |
- | |
63 | spinlock_lock(&dcachelock); |
- | |
64 | - | ||
65 | ipi_broadcast(IPI_DCACHE_SHOOTDOWN); |
- | |
66 | - | ||
67 | busy_wait: |
- | |
68 | for (i = 0; i < config.cpu_count; i++) |
- | |
69 | if (cpus[i].arch.dcache_active) |
- | |
70 | goto busy_wait; |
- | |
71 | } |
- | |
72 | - | ||
73 | /** Finish the D-cache shootdown sequence. */ |
- | |
74 | void dcache_shootdown_finalize(void) |
- | |
75 | { |
- | |
76 | spinlock_unlock(&dcachelock); |
- | |
77 | CPU->arch.dcache_active = 1; |
- | |
78 | } |
- | |
79 | - | ||
80 | /** Process the D-cache shootdown IPI. */ |
- | |
81 | void dcache_shootdown_ipi_recv(void) |
- | |
82 | { |
- | |
83 | ASSERT(CPU); |
- | |
84 | - | ||
85 | CPU->arch.dcache_active = 0; |
- | |
86 | spinlock_lock(&dcachelock); |
- | |
87 | spinlock_unlock(&dcachelock); |
- | |
88 | - | ||
89 | dcache_flush(); |
- | |
90 | - | ||
91 | CPU->arch.dcache_active = 1; |
- | |
92 | } |
- | |
93 | - | ||
94 | #endif /* CONFIG_SMP */ |
- | |
95 | - | ||
96 | /** @} |
38 | /** @} |
97 | */ |
39 | */ |
98 | 40 | ||
99 | 41 |