WebSVN – HelenOS – Diff – /trunk/kernel/arch/sparc64/src/mm/as.c


/*
 * Copyright (C) 2006 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup sparc64mm
 * @{
 */
/** @file
 */
 
#include <arch/mm/as.h>
#include <arch/mm/tlb.h>
#include <genarch/mm/as_ht.h>
#include <genarch/mm/asid_fifo.h>
#include <debug.h>
 
#ifdef CONFIG_TSB
#include <arch/mm/tsb.h>
#include <arch/memstr.h>
#include <synch/mutex.h>
#include <arch/asm.h>
#include <mm/frame.h>
#include <bitops.h>
#include <macros.h>
#endif
 
/** Architecture dependent address space init. */
void as_arch_init(void)
{
    as_operations = &as_ht_operations;
    asid_fifo_init();
}
 
int as_constructor_arch(as_t *as, int flags)
{
#ifdef CONFIG_TSB
    int order = fnzb32(((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH);
    uintptr_t tsb = (uintptr_t) frame_alloc(order, flags);
 
    if (!tsb)
        return -1;
 
    as->arch.itsb = (tsb_entry_t *) tsb;
    as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT * sizeof(tsb_entry_t));
    memsetb((uintptr_t) as->arch.itsb, (ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t), 0);
#endif
    return 0;
}
 
int as_destructor_arch(as_t *as)
{
#ifdef CONFIG_TSB
    count_t cnt = ((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH;
    frame_free((uintptr_t) as->arch.itsb);
    return cnt;
#else
    return 0;
#endif
}
 
int as_create_arch(as_t *as, int flags)
{
#ifdef CONFIG_TSB
    ipl_t ipl;
 
 
    ipl = interrupts_disable();
    mutex_lock_active(&as->lock);   /* completely unnecessary, but polite */
    tsb_invalidate(as, 0, (count_t) -1);
    mutex_unlock(&as->lock);
    interrupts_restore(ipl);
#endif
    return 0;
}
 
/** Perform sparc64-specific tasks when an address space becomes active on the processor.
 *
 * Install ASID and map TSBs.
 *
 * @param as Address space.
 */
void as_install_arch(as_t *as)
{
    tlb_context_reg_t ctx;
   
    /*
     * Note that we don't lock the address space.
     * That's correct - we can afford it here
     * because we only read members that are
     * currently read-only.
     */
   
    /*
     * Write ASID to secondary context register.
     * The primary context register has to be set
     * from TL>0 so it will be filled from the
     * secondary context register from the TL=1
     * code just before switch to userspace.
     */
    ctx.v = 0;
    ctx.context = as->asid;
    mmu_secondary_context_write(ctx.v);
 
#ifdef CONFIG_TSB   
    uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
 
    ASSERT(as->arch.itsb && as->arch.dtsb);
 
    uintptr_t tsb = (uintptr_t) as->arch.itsb;
       
    if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
        /*
         * TSBs were allocated from memory not covered
         * by the locked 4M kernel DTLB entry. We need
         * to map both TSBs explicitly.
         */
        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
        dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
    }
       
    /*
     * Setup TSB Base registers.
     */
    tsb_base_reg_t tsb_base;
       
    tsb_base.value = 0;
    tsb_base.size = TSB_SIZE;
    tsb_base.split = 0;
 
    tsb_base.base = ((uintptr_t) as->arch.itsb) >> PAGE_WIDTH;
    itsb_base_write(tsb_base.value);
    tsb_base.base = ((uintptr_t) as->arch.dtsb) >> PAGE_WIDTH;
    dtsb_base_write(tsb_base.value);
#endif
}
 
/** Perform sparc64-specific tasks when an address space is removed from the processor.
 *
 * Demap TSBs.
 *
 * @param as Address space.
 */
void as_deinstall_arch(as_t *as)
{
 
    /*
     * Note that we don't lock the address space.
     * That's correct - we can afford it here
     * because we only read members that are
     * currently read-only.
     */
 
#ifdef CONFIG_TSB
    uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
 
    ASSERT(as->arch.itsb && as->arch.dtsb);
 
    uintptr_t tsb = (uintptr_t) as->arch.itsb;
       
    if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
        /*
         * TSBs were allocated from memory not covered
         * by the locked 4M kernel DTLB entry. We need
         * to demap the entry installed by as_install_arch().
         */
        dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
    }
#endif
}
 
/** @}
 */
 

Rev 1891	Rev 1892
1	/*	1	/*
2	* Copyright (C) 2006 Jakub Jermar	2	* Copyright (C) 2006 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup sparc64mm	29	/** @addtogroup sparc64mm
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch/mm/as.h>	35	#include <arch/mm/as.h>
36	#include <arch/mm/tlb.h>	36	#include <arch/mm/tlb.h>
37	#include <genarch/mm/as_ht.h>	37	#include <genarch/mm/as_ht.h>
38	#include <genarch/mm/asid_fifo.h>	38	#include <genarch/mm/asid_fifo.h>
39	#include <debug.h>	39	#include <debug.h>
40		40
41	#ifdef CONFIG_TSB	41	#ifdef CONFIG_TSB
42	#include <arch/mm/tsb.h>	42	#include <arch/mm/tsb.h>
43	#include <arch/memstr.h>	43	#include <arch/memstr.h>
44	#include <synch/mutex.h>	44	#include <synch/mutex.h>
45	#include <arch/asm.h>	45	#include <arch/asm.h>
46	#include <mm/frame.h>	46	#include <mm/frame.h>
47	#include <bitops.h>	47	#include <bitops.h>
48	#include <macros.h>	48	#include <macros.h>
49	#endif	49	#endif
50		50
51	/** Architecture dependent address space init. */	51	/** Architecture dependent address space init. */
52	void as_arch_init(void)	52	void as_arch_init(void)
53	{	53	{
54	as_operations = &as_ht_operations;	54	as_operations = &as_ht_operations;
55	asid_fifo_init();	55	asid_fifo_init();
56	}	56	}
57		57
58	int as_constructor_arch(as_t *as, int flags)	58	int as_constructor_arch(as_t *as, int flags)
59	{	59	{
60	#ifdef CONFIG_TSB	60	#ifdef CONFIG_TSB
61	int order = fnzb32(((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH);	61	int order = fnzb32(((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH);
62	uintptr_t tsb = (uintptr_t) frame_alloc(order, flags);	62	uintptr_t tsb = (uintptr_t) frame_alloc(order, flags);
63		63
64	if (!tsb)	64	if (!tsb)
65	return -1;	65	return -1;
66		66
67	as->arch.itsb = (tsb_entry_t *) tsb;	67	as->arch.itsb = (tsb_entry_t *) tsb;
68	as->arch.dtsb = (tsb_entry_t ) (tsb + ITSB_ENTRY_COUNT sizeof(tsb_entry_t));	68	as->arch.dtsb = (tsb_entry_t ) (tsb + ITSB_ENTRY_COUNT sizeof(tsb_entry_t));
-		69	memsetb((uintptr_t) as->arch.itsb, (ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t), 0);
69	#endif	70	#endif
70	return 0;	71	return 0;
71	}	72	}
72		73
73	int as_destructor_arch(as_t *as)	74	int as_destructor_arch(as_t *as)
74	{	75	{
75	#ifdef CONFIG_TSB	76	#ifdef CONFIG_TSB
76	count_t cnt = ((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH;	77	count_t cnt = ((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH;
77	frame_free((uintptr_t) as->arch.itsb);	78	frame_free((uintptr_t) as->arch.itsb);
78	return cnt;	79	return cnt;
79	#else	80	#else
80	return 0;	81	return 0;
81	#endif	82	#endif
82	}	83	}
83		84
84	int as_create_arch(as_t *as, int flags)	85	int as_create_arch(as_t *as, int flags)
85	{	86	{
86	#ifdef CONFIG_TSB	87	#ifdef CONFIG_TSB
87	ipl_t ipl;	88	ipl_t ipl;
88		89
89	memsetb((uintptr_t) as->arch.itsb, (ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t), 0);	-
90	ipl = interrupts_disable();	90	ipl = interrupts_disable();
91	mutex_lock_active(&as->lock); /* completely unnecessary, but polite */	91	mutex_lock_active(&as->lock); /* completely unnecessary, but polite */
92	tsb_invalidate(as, 0, (count_t) -1);	92	tsb_invalidate(as, 0, (count_t) -1);
93	mutex_unlock(&as->lock);	93	mutex_unlock(&as->lock);
94	interrupts_restore(ipl);	94	interrupts_restore(ipl);
95	#endif	95	#endif
96	return 0;	96	return 0;
97	}	97	}
98		98
99	/** Perform sparc64-specific tasks when an address space becomes active on the processor.	99	/** Perform sparc64-specific tasks when an address space becomes active on the processor.
100	*	100	*
101	* Install ASID and map TSBs.	101	* Install ASID and map TSBs.
102	*	102	*
103	* @param as Address space.	103	* @param as Address space.
104	*/	104	*/
105	void as_install_arch(as_t *as)	105	void as_install_arch(as_t *as)
106	{	106	{
107	tlb_context_reg_t ctx;	107	tlb_context_reg_t ctx;
108		108
109	/*	109	/*
110	* Note that we don't lock the address space.	110	* Note that we don't lock the address space.
111	* That's correct - we can afford it here	111	* That's correct - we can afford it here
112	* because we only read members that are	112	* because we only read members that are
113	* currently read-only.	113	* currently read-only.
114	*/	114	*/
115		115
116	/*	116	/*
117	* Write ASID to secondary context register.	117	* Write ASID to secondary context register.
118	* The primary context register has to be set	118	* The primary context register has to be set
119	* from TL>0 so it will be filled from the	119	* from TL>0 so it will be filled from the
120	* secondary context register from the TL=1	120	* secondary context register from the TL=1
121	* code just before switch to userspace.	121	* code just before switch to userspace.
122	*/	122	*/
123	ctx.v = 0;	123	ctx.v = 0;
124	ctx.context = as->asid;	124	ctx.context = as->asid;
125	mmu_secondary_context_write(ctx.v);	125	mmu_secondary_context_write(ctx.v);
126		126
127	#ifdef CONFIG_TSB	127	#ifdef CONFIG_TSB
128	uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);	128	uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
129		129
130	ASSERT(as->arch.itsb && as->arch.dtsb);	130	ASSERT(as->arch.itsb && as->arch.dtsb);
131		131
132	uintptr_t tsb = (uintptr_t) as->arch.itsb;	132	uintptr_t tsb = (uintptr_t) as->arch.itsb;
133		133
134	if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {	134	if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
135	/*	135	/*
136	* TSBs were allocated from memory not covered	136	* TSBs were allocated from memory not covered
137	* by the locked 4M kernel DTLB entry. We need	137	* by the locked 4M kernel DTLB entry. We need
138	* to map both TSBs explicitly.	138	* to map both TSBs explicitly.
139	*/	139	*/
140	dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);	140	dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
141	dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);	141	dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true);
142	}	142	}
143		143
144	/*	144	/*
145	* Setup TSB Base registers.	145	* Setup TSB Base registers.
146	*/	146	*/
147	tsb_base_reg_t tsb_base;	147	tsb_base_reg_t tsb_base;
148		148
149	tsb_base.value = 0;	149	tsb_base.value = 0;
150	tsb_base.size = TSB_SIZE;	150	tsb_base.size = TSB_SIZE;
151	tsb_base.split = 0;	151	tsb_base.split = 0;
152		152
153	tsb_base.base = ((uintptr_t) as->arch.itsb) >> PAGE_WIDTH;	153	tsb_base.base = ((uintptr_t) as->arch.itsb) >> PAGE_WIDTH;
154	itsb_base_write(tsb_base.value);	154	itsb_base_write(tsb_base.value);
155	tsb_base.base = ((uintptr_t) as->arch.dtsb) >> PAGE_WIDTH;	155	tsb_base.base = ((uintptr_t) as->arch.dtsb) >> PAGE_WIDTH;
156	dtsb_base_write(tsb_base.value);	156	dtsb_base_write(tsb_base.value);
157	#endif	157	#endif
158	}	158	}
159		159
160	/** Perform sparc64-specific tasks when an address space is removed from the processor.	160	/** Perform sparc64-specific tasks when an address space is removed from the processor.
161	*	161	*
162	* Demap TSBs.	162	* Demap TSBs.
163	*	163	*
164	* @param as Address space.	164	* @param as Address space.
165	*/	165	*/
166	void as_deinstall_arch(as_t *as)	166	void as_deinstall_arch(as_t *as)
167	{	167	{
168		168
169	/*	169	/*
170	* Note that we don't lock the address space.	170	* Note that we don't lock the address space.
171	* That's correct - we can afford it here	171	* That's correct - we can afford it here
172	* because we only read members that are	172	* because we only read members that are
173	* currently read-only.	173	* currently read-only.
174	*/	174	*/
175		175
176	#ifdef CONFIG_TSB	176	#ifdef CONFIG_TSB
177	uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);	177	uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH);
178		178
179	ASSERT(as->arch.itsb && as->arch.dtsb);	179	ASSERT(as->arch.itsb && as->arch.dtsb);
180		180
181	uintptr_t tsb = (uintptr_t) as->arch.itsb;	181	uintptr_t tsb = (uintptr_t) as->arch.itsb;
182		182
183	if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {	183	if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
184	/*	184	/*
185	* TSBs were allocated from memory not covered	185	* TSBs were allocated from memory not covered
186	* by the locked 4M kernel DTLB entry. We need	186	* by the locked 4M kernel DTLB entry. We need
187	* to demap the entry installed by as_install_arch().	187	* to demap the entry installed by as_install_arch().
188	*/	188	*/
189	dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);	189	dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);
190	}	190	}
191	#endif	191	#endif
192	}	192	}
193		193
194	/** @}	194	/** @}
195	*/	195	*/
196		196

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/sparc64/src/mm/as.c @ 2141 – Rev 1891 → 1892