WebSVN – HelenOS – Diff – /trunk/kernel/arch/sparc64/src/drivers/fhc.c


/*
 * Copyright (c) 2006 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup sparc64
 * @{
 */
/**
 * @file
 * @brief   FireHose Controller (FHC) driver.
 *
 * Note that this driver is a result of reverse engineering
 * rather than implementation of a specification. This
 * is due to the fact that the FHC documentation is not
 * publicly available.
 */
 
#include <arch/drivers/fhc.h>
#include <arch/trap/interrupt.h>
#include <mm/page.h>
#include <mm/slab.h>
#include <arch/types.h>
 
#include <genarch/ofw/ofw_tree.h>
 
fhc_t *central_fhc = NULL;
 
/**
 * I suspect this must be hardcoded in the FHC.
 * If it is not, than we can read all IMAP registers
 * and get the complete mapping.
 */
#define FHC_UART_INR    0x39    
 
#define FHC_UART_IMAP   0x0
#define FHC_UART_ICLR   0x4
 
#define UART_IMAP_REG   4
 
fhc_t *fhc_init(ofw_tree_node_t *node)
{
    fhc_t *fhc;
    ofw_tree_property_t *prop;
 
    prop = ofw_tree_getprop(node, "reg");
   
    if (!prop || !prop->value)
        return NULL;
       
    count_t regs = prop->size / sizeof(ofw_central_reg_t);
    if (regs + 1 < UART_IMAP_REG)
        return NULL;
 
    ofw_central_reg_t *reg = &((ofw_central_reg_t *) prop->value)[UART_IMAP_REG];
 
    uintptr_t paddr;
    if (!ofw_central_apply_ranges(node->parent, reg, &paddr))
        return NULL;
 
    fhc = (fhc_t *) malloc(sizeof(fhc_t), FRAME_ATOMIC);
    if (!fhc)
        return NULL;
 
    fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size);
   
    return fhc;
}
 
void fhc_enable_interrupt(fhc_t *fhc, int inr)
{
    switch (inr) {
    case FHC_UART_INR:
        fhc->uart_imap[FHC_UART_IMAP] |= IMAP_V_MASK;
        break;
    default:
        panic("Unexpected INR (%d)\n", inr);
        break;
    }
}
 
void fhc_clear_interrupt(fhc_t *fhc, int inr)
{
    ASSERT(fhc->uart_imap);
 
    switch (inr) {
    case FHC_UART_INR:
        fhc->uart_imap[FHC_UART_ICLR] = 0;
        break;
    default:
        panic("Unexpected INR (%d)\n", inr);
        break;
    }
}
 
/** @}
 */
 

Rev 2071	Rev 2089
1	/*	1	/*
2	* Copyright (c) 2006 Jakub Jermar	2	* Copyright (c) 2006 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup sparc64	29	/** @addtogroup sparc64
30	* @{	30	* @{
31	*/	31	*/
32	/**	32	/**
33	* @file	33	* @file
34	* @brief FireHose Controller (FHC) driver.	34	* @brief FireHose Controller (FHC) driver.
35	*	35	*
36	* Note that this driver is a result of reverse engineering	36	* Note that this driver is a result of reverse engineering
37	* rather than implementation of a specification. This	37	* rather than implementation of a specification. This
38	* is due to the fact that the FHC documentation is not	38	* is due to the fact that the FHC documentation is not
39	* publicly available.	39	* publicly available.
40	*/	40	*/
41		41
42	#include <arch/drivers/fhc.h>	42	#include <arch/drivers/fhc.h>
43	#include <arch/trap/interrupt.h>	43	#include <arch/trap/interrupt.h>
44	#include <arch/mm/page.h>	44	#include <mm/page.h>
45	#include <mm/slab.h>	45	#include <mm/slab.h>
46	#include <arch/types.h>	46	#include <arch/types.h>
47	#include <typedefs.h>	-
48	#include <genarch/ofw/ofw_tree.h>	47	#include <genarch/ofw/ofw_tree.h>
49		48
50	fhc_t *central_fhc = NULL;	49	fhc_t *central_fhc = NULL;
51		50
52	/**	51	/**
53	* I suspect this must be hardcoded in the FHC.	52	* I suspect this must be hardcoded in the FHC.
54	* If it is not, than we can read all IMAP registers	53	* If it is not, than we can read all IMAP registers
55	* and get the complete mapping.	54	* and get the complete mapping.
56	*/	55	*/
57	#define FHC_UART_INR 0x39	56	#define FHC_UART_INR 0x39
58		57
59	#define FHC_UART_IMAP 0x0	58	#define FHC_UART_IMAP 0x0
60	#define FHC_UART_ICLR 0x4	59	#define FHC_UART_ICLR 0x4
61		60
62	#define UART_IMAP_REG 4	61	#define UART_IMAP_REG 4
63		62
64	fhc_t fhc_init(ofw_tree_node_t node)	63	fhc_t fhc_init(ofw_tree_node_t node)
65	{	64	{
66	fhc_t *fhc;	65	fhc_t *fhc;
67	ofw_tree_property_t *prop;	66	ofw_tree_property_t *prop;
68		67
69	prop = ofw_tree_getprop(node, "reg");	68	prop = ofw_tree_getprop(node, "reg");
70		69
71	if (!prop \|\| !prop->value)	70	if (!prop \|\| !prop->value)
72	return NULL;	71	return NULL;
73		72
74	count_t regs = prop->size / sizeof(ofw_central_reg_t);	73	count_t regs = prop->size / sizeof(ofw_central_reg_t);
75	if (regs + 1 < UART_IMAP_REG)	74	if (regs + 1 < UART_IMAP_REG)
76	return NULL;	75	return NULL;
77		76
78	ofw_central_reg_t reg = &((ofw_central_reg_t ) prop->value)[UART_IMAP_REG];	77	ofw_central_reg_t reg = &((ofw_central_reg_t ) prop->value)[UART_IMAP_REG];
79		78
80	uintptr_t paddr;	79	uintptr_t paddr;
81	if (!ofw_central_apply_ranges(node->parent, reg, &paddr))	80	if (!ofw_central_apply_ranges(node->parent, reg, &paddr))
82	return NULL;	81	return NULL;
83		82
84	fhc = (fhc_t *) malloc(sizeof(fhc_t), FRAME_ATOMIC);	83	fhc = (fhc_t *) malloc(sizeof(fhc_t), FRAME_ATOMIC);
85	if (!fhc)	84	if (!fhc)
86	return NULL;	85	return NULL;
87		86
88	fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size);	87	fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size);
89		88
90	return fhc;	89	return fhc;
91	}	90	}
92		91
93	void fhc_enable_interrupt(fhc_t *fhc, int inr)	92	void fhc_enable_interrupt(fhc_t *fhc, int inr)
94	{	93	{
95	switch (inr) {	94	switch (inr) {
96	case FHC_UART_INR:	95	case FHC_UART_INR:
97	fhc->uart_imap[FHC_UART_IMAP] \|= IMAP_V_MASK;	96	fhc->uart_imap[FHC_UART_IMAP] \|= IMAP_V_MASK;
98	break;	97	break;
99	default:	98	default:
100	panic("Unexpected INR (%d)\n", inr);	99	panic("Unexpected INR (%d)\n", inr);
101	break;	100	break;
102	}	101	}
103	}	102	}
104		103
105	void fhc_clear_interrupt(fhc_t *fhc, int inr)	104	void fhc_clear_interrupt(fhc_t *fhc, int inr)
106	{	105	{
107	ASSERT(fhc->uart_imap);	106	ASSERT(fhc->uart_imap);
108		107
109	switch (inr) {	108	switch (inr) {
110	case FHC_UART_INR:	109	case FHC_UART_INR:
111	fhc->uart_imap[FHC_UART_ICLR] = 0;	110	fhc->uart_imap[FHC_UART_ICLR] = 0;
112	break;	111	break;
113	default:	112	default:
114	panic("Unexpected INR (%d)\n", inr);	113	panic("Unexpected INR (%d)\n", inr);
115	break;	114	break;
116	}	115	}
117	}	116	}
118		117
119	/** @}	118	/** @}
120	*/	119	*/
121		120

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(root)/trunk/kernel/arch/sparc64/src/drivers/fhc.c – Rev 2071 → 2089