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#
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#
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# Copyright (C) 2005 Jakub Jermar
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# Copyright (C) 2005 Jakub Jermar
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
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# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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#include <arch/stack.h>
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#include <arch/stack.h>
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#include <arch/regdef.h>
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#include <arch/regdef.h>
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.text
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.text
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.global memcpy
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.global memcpy
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.global memcpy_from_uspace
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.global memcpy_from_uspace
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.global memcpy_to_uspace
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.global memcpy_to_uspace
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.global memcpy_from_uspace_failover_address
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.global memcpy_from_uspace_failover_address
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.global memcpy_to_uspace_failover_address
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.global memcpy_to_uspace_failover_address
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.global memsetb
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.global memsetb
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memcpy:
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memcpy:
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memcpy_from_uspace:
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memcpy_from_uspace:
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memcpy_to_uspace:
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memcpy_to_uspace:
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	.register       %g2, #scratch
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	.register       %g2, #scratch
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        .register       %g3, #scratch
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        .register       %g3, #scratch
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	add	%o1, 7, %g1
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	add	%o1, 7, %g1
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	and	%g1, -8, %g1
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	and	%g1, -8, %g1
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	cmp	%o1, %g1
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	cmp	%o1, %g1
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	be,pn	%xcc, 3f
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	be,pn	%xcc, 3f
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	add	%o0, 7, %g1
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	add	%o0, 7, %g1
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	mov	0, %g3
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	mov	0, %g3
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0:
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0:
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	brz,pn	%o2, 2f
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	brz,pn	%o2, 2f
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	mov	0, %g2
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	mov	0, %g2
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1:
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1:
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	ldub	[%g3 + %o1], %g1
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	ldub	[%g3 + %o1], %g1
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	add	%g2, 1, %g2
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	add	%g2, 1, %g2
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	cmp	%o2, %g2
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	cmp	%o2, %g2
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	stb	%g1, [%g3 + %o0]
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	stb	%g1, [%g3 + %o0]
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	bne,pt	%xcc, 1b
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	bne,pt	%xcc, 1b
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	mov	%g2, %g3
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	mov	%g2, %g3
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2:
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2:
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	jmp	%o7 + 8			! exit point
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	jmp	%o7 + 8			! exit point
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	mov	%o1, %o0
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	mov	%o1, %o0
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3:
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3:
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	and	%g1, -8, %g1
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	and	%g1, -8, %g1
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	cmp	%o0, %g1
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	cmp	%o0, %g1
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	bne,pt	%xcc, 0b
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	bne,pt	%xcc, 0b
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	mov	0, %g3
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	mov	0, %g3
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	srlx	%o2, 3, %g4
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	srlx	%o2, 3, %g4
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	brz,pn	%g4, 5f
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	brz,pn	%g4, 5f
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	mov	0, %g5
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	mov	0, %g5
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4:
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4:
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	sllx	%g3, 3, %g2
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	sllx	%g3, 3, %g2
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	add	%g5, 1, %g3
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	add	%g5, 1, %g3
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	ldx	[%o1 + %g2], %g1
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	ldx	[%o1 + %g2], %g1
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	mov	%g3, %g5
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	mov	%g3, %g5
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	cmp	%g4, %g3
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	cmp	%g4, %g3
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	bne,pt	%xcc, 4b
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	bne,pt	%xcc, 4b
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	stx	%g1, [%o0 + %g2]
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	stx	%g1, [%o0 + %g2]
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5:
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5:
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	and	%o2, 7, %o2
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	and	%o2, 7, %o2
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	brz,pn	%o2, 2b
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	brz,pn	%o2, 2b
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	sllx	%g4, 3, %g1
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	sllx	%g4, 3, %g1
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	mov	0, %g2
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	mov	0, %g2
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	add	%g1, %o0, %o0
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	add	%g1, %o0, %o0
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	add	%g1, %o1, %g4
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	add	%g1, %o1, %g4
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	mov	0, %g3
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	mov	0, %g3
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6:
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6:
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	ldub	[%g2 + %g4], %g1
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	ldub	[%g2 + %g4], %g1
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	stb	%g1, [%g2 + %o0]
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	stb	%g1, [%g2 + %o0]
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	add	%g3, 1, %g2
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	add	%g3, 1, %g2
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	cmp	%o2, %g2
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	cmp	%o2, %g2
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	bne,pt	%xcc, 6b
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	bne,pt	%xcc, 6b
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	mov	%g2, %g3
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	mov	%g2, %g3
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	jmp	%o7 + 8			! exit point
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	jmp	%o7 + 8			! exit point
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	mov	%o1, %o0
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	mov	%o1, %o0
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memcpy_from_uspace_failover_address:
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memcpy_from_uspace_failover_address:
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memcpy_to_uspace_failover_address:
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memcpy_to_uspace_failover_address:
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	jmp	%o7 + 8			! exit point
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	jmp	%o7 + 8			! exit point
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	mov	%g0, %o0		! return 0 on failure
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	mov	%g0, %o0		! return 0 on failure
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memsetb:
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memsetb:
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	b _memsetb
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	b _memsetb
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	nop
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	nop
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.macro WRITE_ALTERNATE_REGISTER reg, bit
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	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
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	rdpr %pstate, %l0
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	wrpr %l0, \bit, %pstate
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	mov %i0, \reg
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	wrpr %l0, 0, %pstate
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	ret
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	restore
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.endm
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.macro READ_ALTERNATE_REGISTER reg, bit
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	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
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	rdpr %pstate, %l0
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	wrpr %l0, \bit, %pstate
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	mov \reg, %i0
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	wrpr %l0, 0, %pstate
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	ret
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	restore
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.endm
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.global write_to_ag_g6
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write_to_ag_g6:
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	WRITE_ALTERNATE_REGISTER %g6, PSTATE_AG_BIT
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.global write_to_ag_g7
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write_to_ag_g7:
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	WRITE_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT
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.global write_to_ig_g6
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write_to_ig_g6:
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	WRITE_ALTERNATE_REGISTER %g6, PSTATE_IG_BIT
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.global read_from_ag_g7
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read_from_ag_g7:
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	READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT
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