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1 | # |
1 | # |
2 | # Copyright (C) 2005 Jakub Jermar |
2 | # Copyright (C) 2005 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | #include <arch/stack.h> |
29 | #include <arch/stack.h> |
30 | #include <arch/regdef.h> |
30 | #include <arch/regdef.h> |
- | 31 | #include <arch/mm/mmu.h> |
|
31 | 32 | ||
32 | .text |
33 | .text |
33 | 34 | ||
34 | .global memcpy |
35 | .global memcpy |
35 | .global memcpy_from_uspace |
36 | .global memcpy_from_uspace |
36 | .global memcpy_to_uspace |
37 | .global memcpy_to_uspace |
37 | .global memcpy_from_uspace_failover_address |
38 | .global memcpy_from_uspace_failover_address |
38 | .global memcpy_to_uspace_failover_address |
39 | .global memcpy_to_uspace_failover_address |
39 | .global memsetb |
40 | .global memsetb |
40 | 41 | ||
41 | 42 | ||
42 | memcpy: |
43 | memcpy: |
43 | memcpy_from_uspace: |
44 | memcpy_from_uspace: |
44 | memcpy_to_uspace: |
45 | memcpy_to_uspace: |
45 | .register %g2, #scratch |
46 | .register %g2, #scratch |
46 | .register %g3, #scratch |
47 | .register %g3, #scratch |
47 | add %o1, 7, %g1 |
48 | add %o1, 7, %g1 |
48 | and %g1, -8, %g1 |
49 | and %g1, -8, %g1 |
49 | cmp %o1, %g1 |
50 | cmp %o1, %g1 |
50 | be,pn %xcc, 3f |
51 | be,pn %xcc, 3f |
51 | add %o0, 7, %g1 |
52 | add %o0, 7, %g1 |
52 | mov 0, %g3 |
53 | mov 0, %g3 |
53 | 0: |
54 | 0: |
54 | brz,pn %o2, 2f |
55 | brz,pn %o2, 2f |
55 | mov 0, %g2 |
56 | mov 0, %g2 |
56 | 1: |
57 | 1: |
57 | ldub [%g3 + %o1], %g1 |
58 | ldub [%g3 + %o1], %g1 |
58 | add %g2, 1, %g2 |
59 | add %g2, 1, %g2 |
59 | cmp %o2, %g2 |
60 | cmp %o2, %g2 |
60 | stb %g1, [%g3 + %o0] |
61 | stb %g1, [%g3 + %o0] |
61 | bne,pt %xcc, 1b |
62 | bne,pt %xcc, 1b |
62 | mov %g2, %g3 |
63 | mov %g2, %g3 |
63 | 2: |
64 | 2: |
64 | jmp %o7 + 8 ! exit point |
65 | jmp %o7 + 8 ! exit point |
65 | mov %o1, %o0 |
66 | mov %o1, %o0 |
66 | 3: |
67 | 3: |
67 | and %g1, -8, %g1 |
68 | and %g1, -8, %g1 |
68 | cmp %o0, %g1 |
69 | cmp %o0, %g1 |
69 | bne,pt %xcc, 0b |
70 | bne,pt %xcc, 0b |
70 | mov 0, %g3 |
71 | mov 0, %g3 |
71 | srlx %o2, 3, %g4 |
72 | srlx %o2, 3, %g4 |
72 | brz,pn %g4, 5f |
73 | brz,pn %g4, 5f |
73 | mov 0, %g5 |
74 | mov 0, %g5 |
74 | 4: |
75 | 4: |
75 | sllx %g3, 3, %g2 |
76 | sllx %g3, 3, %g2 |
76 | add %g5, 1, %g3 |
77 | add %g5, 1, %g3 |
77 | ldx [%o1 + %g2], %g1 |
78 | ldx [%o1 + %g2], %g1 |
78 | mov %g3, %g5 |
79 | mov %g3, %g5 |
79 | cmp %g4, %g3 |
80 | cmp %g4, %g3 |
80 | bne,pt %xcc, 4b |
81 | bne,pt %xcc, 4b |
81 | stx %g1, [%o0 + %g2] |
82 | stx %g1, [%o0 + %g2] |
82 | 5: |
83 | 5: |
83 | and %o2, 7, %o2 |
84 | and %o2, 7, %o2 |
84 | brz,pn %o2, 2b |
85 | brz,pn %o2, 2b |
85 | sllx %g4, 3, %g1 |
86 | sllx %g4, 3, %g1 |
86 | mov 0, %g2 |
87 | mov 0, %g2 |
87 | add %g1, %o0, %o0 |
88 | add %g1, %o0, %o0 |
88 | add %g1, %o1, %g4 |
89 | add %g1, %o1, %g4 |
89 | mov 0, %g3 |
90 | mov 0, %g3 |
90 | 6: |
91 | 6: |
91 | ldub [%g2 + %g4], %g1 |
92 | ldub [%g2 + %g4], %g1 |
92 | stb %g1, [%g2 + %o0] |
93 | stb %g1, [%g2 + %o0] |
93 | add %g3, 1, %g2 |
94 | add %g3, 1, %g2 |
94 | cmp %o2, %g2 |
95 | cmp %o2, %g2 |
95 | bne,pt %xcc, 6b |
96 | bne,pt %xcc, 6b |
96 | mov %g2, %g3 |
97 | mov %g2, %g3 |
97 | 98 | ||
98 | jmp %o7 + 8 ! exit point |
99 | jmp %o7 + 8 ! exit point |
99 | mov %o1, %o0 |
100 | mov %o1, %o0 |
100 | 101 | ||
101 | memcpy_from_uspace_failover_address: |
102 | memcpy_from_uspace_failover_address: |
102 | memcpy_to_uspace_failover_address: |
103 | memcpy_to_uspace_failover_address: |
103 | jmp %o7 + 8 ! exit point |
104 | jmp %o7 + 8 ! exit point |
104 | mov %g0, %o0 ! return 0 on failure |
105 | mov %g0, %o0 ! return 0 on failure |
105 | 106 | ||
106 | memsetb: |
107 | memsetb: |
107 | b _memsetb |
108 | b _memsetb |
108 | nop |
109 | nop |
109 | 110 | ||
110 | 111 | ||
111 | .macro WRITE_ALTERNATE_REGISTER reg, bit |
112 | .macro WRITE_ALTERNATE_REGISTER reg, bit |
112 | save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
113 | save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
113 | rdpr %pstate, %l0 |
114 | rdpr %pstate, %l0 |
114 | wrpr %l0, \bit, %pstate |
115 | wrpr %l0, \bit, %pstate |
115 | mov %i0, \reg |
116 | mov %i0, \reg |
116 | wrpr %l0, 0, %pstate |
117 | wrpr %l0, 0, %pstate |
117 | ret |
118 | ret |
118 | restore |
119 | restore |
119 | .endm |
120 | .endm |
120 | 121 | ||
121 | .macro READ_ALTERNATE_REGISTER reg, bit |
122 | .macro READ_ALTERNATE_REGISTER reg, bit |
122 | save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
123 | save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
123 | rdpr %pstate, %l0 |
124 | rdpr %pstate, %l0 |
124 | wrpr %l0, \bit, %pstate |
125 | wrpr %l0, \bit, %pstate |
125 | mov \reg, %i0 |
126 | mov \reg, %i0 |
126 | wrpr %l0, 0, %pstate |
127 | wrpr %l0, 0, %pstate |
127 | ret |
128 | ret |
128 | restore |
129 | restore |
129 | .endm |
130 | .endm |
130 | 131 | ||
131 | .global write_to_ag_g6 |
132 | .global write_to_ag_g6 |
132 | write_to_ag_g6: |
133 | write_to_ag_g6: |
133 | WRITE_ALTERNATE_REGISTER %g6, PSTATE_AG_BIT |
134 | WRITE_ALTERNATE_REGISTER %g6, PSTATE_AG_BIT |
134 | 135 | ||
135 | .global write_to_ag_g7 |
136 | .global write_to_ag_g7 |
136 | write_to_ag_g7: |
137 | write_to_ag_g7: |
137 | WRITE_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT |
138 | WRITE_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT |
138 | 139 | ||
139 | .global write_to_ig_g6 |
140 | .global write_to_ig_g6 |
140 | write_to_ig_g6: |
141 | write_to_ig_g6: |
141 | WRITE_ALTERNATE_REGISTER %g6, PSTATE_IG_BIT |
142 | WRITE_ALTERNATE_REGISTER %g6, PSTATE_IG_BIT |
142 | 143 | ||
143 | .global read_from_ag_g7 |
144 | .global read_from_ag_g7 |
144 | read_from_ag_g7: |
145 | read_from_ag_g7: |
145 | READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT |
146 | READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT |
- | 147 | ||
- | 148 | ||
- | 149 | /** Switch to userspace. |
|
- | 150 | * |
|
- | 151 | * %o0 Userspace entry address. |
|
- | 152 | * %o1 Userspace stack pointer address. |
|
- | 153 | */ |
|
- | 154 | .global switch_to_userspace |
|
- | 155 | switch_to_userspace: |
|
- | 156 | flushw |
|
- | 157 | wrpr %g0, 0, %cleanwin ! avoid information leak |
|
- | 158 | save %o1, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
|
- | 159 | ||
- | 160 | clr %i2 |
|
- | 161 | clr %i3 |
|
- | 162 | clr %i4 |
|
- | 163 | clr %i5 |
|
- | 164 | clr %i6 |
|
- | 165 | ||
- | 166 | wrpr %g0, 1, %tl ! enforce mapping via nucleus |
|
- | 167 | ||
- | 168 | rdpr %cwp, %g1 |
|
- | 169 | wrpr %g1, TSTATE_IE_BIT, %tstate |
|
- | 170 | wrpr %i0, 0, %tnpc |
|
- | 171 | ||
- | 172 | /* |
|
- | 173 | * Set primary context according to secondary context. |
|
- | 174 | * Secondary context has been already installed by |
|
- | 175 | * higher-level functions. |
|
- | 176 | */ |
|
- | 177 | wr %g0, ASI_DMMU, %asi |
|
- | 178 | ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1 |
|
- | 179 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi |
|
- | 180 | flush %i7 |
|
- | 181 | ||
- | 182 | done ! jump to userspace |
|
146 | 183 |