WebSVN – HelenOS – Diff – /trunk/kernel/arch/sparc64/include/trap/regwin.h


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup sparc64interrupt
 * @{
 */
/**
 * @file
 * @brief This file contains register window trap handlers.
 */
 
#ifndef KERN_sparc64_REGWIN_H_
#define KERN_sparc64_REGWIN_H_
 
#include <arch/stack.h>
#include <arch/arch.h>
#include <align.h>
 
#define TT_CLEAN_WINDOW         0x24
#define TT_SPILL_0_NORMAL       0x80    /* kernel spills */
#define TT_SPILL_1_NORMAL       0x84    /* userspace spills */
#define TT_SPILL_2_NORMAL       0x88    /* spills to userspace window buffer */
#define TT_SPILL_0_OTHER        0xa0    /* spills to userspace window buffer */
#define TT_FILL_0_NORMAL        0xc0    /* kernel fills */
#define TT_FILL_1_NORMAL        0xc4    /* userspace fills */
 
#define REGWIN_HANDLER_SIZE     128
 
#define CLEAN_WINDOW_HANDLER_SIZE   REGWIN_HANDLER_SIZE
#define SPILL_HANDLER_SIZE      REGWIN_HANDLER_SIZE
#define FILL_HANDLER_SIZE       REGWIN_HANDLER_SIZE
 
/* Window Save Area offsets. */
#define L0_OFFSET   0
#define L1_OFFSET   8
#define L2_OFFSET   16
#define L3_OFFSET   24
#define L4_OFFSET   32
#define L5_OFFSET   40
#define L6_OFFSET   48
#define L7_OFFSET   56
#define I0_OFFSET   64
#define I1_OFFSET   72
#define I2_OFFSET   80
#define I3_OFFSET   88
#define I4_OFFSET   96
#define I5_OFFSET   104
#define I6_OFFSET   112
#define I7_OFFSET   120
 
/* Uspace Window Buffer constants. */
#define UWB_SIZE    ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE)
#define UWB_ALIGNMENT   1024
#define UWB_ASIZE   ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT)
 
#ifdef __ASM__
 
/*
 * Macro used by the nucleus and the primary context 0 during normal and other spills.
 */
.macro SPILL_NORMAL_HANDLER_KERNEL
    stx %l0, [%sp + STACK_BIAS + L0_OFFSET]
    stx %l1, [%sp + STACK_BIAS + L1_OFFSET]
    stx %l2, [%sp + STACK_BIAS + L2_OFFSET]
    stx %l3, [%sp + STACK_BIAS + L3_OFFSET]
    stx %l4, [%sp + STACK_BIAS + L4_OFFSET]
    stx %l5, [%sp + STACK_BIAS + L5_OFFSET]
    stx %l6, [%sp + STACK_BIAS + L6_OFFSET]
    stx %l7, [%sp + STACK_BIAS + L7_OFFSET]
    stx %i0, [%sp + STACK_BIAS + I0_OFFSET]
    stx %i1, [%sp + STACK_BIAS + I1_OFFSET]
    stx %i2, [%sp + STACK_BIAS + I2_OFFSET]
    stx %i3, [%sp + STACK_BIAS + I3_OFFSET]
    stx %i4, [%sp + STACK_BIAS + I4_OFFSET]
    stx %i5, [%sp + STACK_BIAS + I5_OFFSET]
    stx %i6, [%sp + STACK_BIAS + I6_OFFSET]
    stx %i7, [%sp + STACK_BIAS + I7_OFFSET]
    saved
    retry
.endm
 
/*
 * Macro used by the userspace during normal spills.
 */
.macro SPILL_NORMAL_HANDLER_USERSPACE
    wr %g0, ASI_AIUP, %asi
    stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi
    stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi
    stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi
    stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi
    stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi
    stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi
    stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi
    stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi
    stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi
    stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi
    stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi
    stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi
    stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi
    stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi
    stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi
    stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi
    saved
    retry
.endm
 
/*
 * Macro used to spill userspace window to userspace window buffer.
 * It can be either triggered from preemptible_handler doing SAVE
 * at (TL=1) or from normal kernel code doing SAVE when OTHERWIN>0
 * at (TL=0).
 */
.macro SPILL_TO_USPACE_WINDOW_BUFFER
    stx %l0, [%g7 + L0_OFFSET] 
    stx %l1, [%g7 + L1_OFFSET]
    stx %l2, [%g7 + L2_OFFSET]
    stx %l3, [%g7 + L3_OFFSET]
    stx %l4, [%g7 + L4_OFFSET]
    stx %l5, [%g7 + L5_OFFSET]
    stx %l6, [%g7 + L6_OFFSET]
    stx %l7, [%g7 + L7_OFFSET]
    stx %i0, [%g7 + I0_OFFSET]
    stx %i1, [%g7 + I1_OFFSET]
    stx %i2, [%g7 + I2_OFFSET]
    stx %i3, [%g7 + I3_OFFSET]
    stx %i4, [%g7 + I4_OFFSET]
    stx %i5, [%g7 + I5_OFFSET]
    stx %i6, [%g7 + I6_OFFSET]
    stx %i7, [%g7 + I7_OFFSET]
    add %g7, STACK_WINDOW_SAVE_AREA_SIZE, %g7
    saved
    retry
.endm
 
 
/*
 * Macro used by the nucleus and the primary context 0 during normal fills.
 */
.macro FILL_NORMAL_HANDLER_KERNEL
    ldx [%sp + STACK_BIAS + L0_OFFSET], %l0
    ldx [%sp + STACK_BIAS + L1_OFFSET], %l1
    ldx [%sp + STACK_BIAS + L2_OFFSET], %l2
    ldx [%sp + STACK_BIAS + L3_OFFSET], %l3
    ldx [%sp + STACK_BIAS + L4_OFFSET], %l4
    ldx [%sp + STACK_BIAS + L5_OFFSET], %l5
    ldx [%sp + STACK_BIAS + L6_OFFSET], %l6
    ldx [%sp + STACK_BIAS + L7_OFFSET], %l7
    ldx [%sp + STACK_BIAS + I0_OFFSET], %i0
    ldx [%sp + STACK_BIAS + I1_OFFSET], %i1
    ldx [%sp + STACK_BIAS + I2_OFFSET], %i2
    ldx [%sp + STACK_BIAS + I3_OFFSET], %i3
    ldx [%sp + STACK_BIAS + I4_OFFSET], %i4
    ldx [%sp + STACK_BIAS + I5_OFFSET], %i5
    ldx [%sp + STACK_BIAS + I6_OFFSET], %i6
    ldx [%sp + STACK_BIAS + I7_OFFSET], %i7
    restored
    retry
.endm
 
/*
 * Macro used by the userspace during normal fills.
 */
.macro FILL_NORMAL_HANDLER_USERSPACE
    wr %g0, ASI_AIUP, %asi
    ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0
    ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1
    ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2
    ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3
    ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4
    ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5
    ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6
    ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7
    ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0
    ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1
    ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2
    ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3
    ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4
    ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5
    ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6
    ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7
    restored
    retry
.endm
 
.macro CLEAN_WINDOW_HANDLER
    rdpr %cleanwin, %l0
    add %l0, 1, %l0
    wrpr %l0, 0, %cleanwin
    mov %r0, %l0
    mov %r0, %l1
    mov %r0, %l2
    mov %r0, %l3
    mov %r0, %l4
    mov %r0, %l5
    mov %r0, %l6
    mov %r0, %l7
    mov %r0, %o0
    mov %r0, %o1
    mov %r0, %o2
    mov %r0, %o3
    mov %r0, %o4
    mov %r0, %o5
    mov %r0, %o6
    mov %r0, %o7
    retry
.endm
#endif /* __ASM__ */
 
#endif
 
/** @}
 */
 

Rev 2071	Rev 3482
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup sparc64interrupt	29	/** @addtogroup sparc64interrupt
30	* @{	30	* @{
31	*/	31	*/
32	/**	32	/**
33	* @file	33	* @file
34	* @brief This file contains register window trap handlers.	34	* @brief This file contains register window trap handlers.
35	*/	35	*/
36		36
37	#ifndef KERN_sparc64_REGWIN_H_	37	#ifndef KERN_sparc64_REGWIN_H_
38	#define KERN_sparc64_REGWIN_H_	38	#define KERN_sparc64_REGWIN_H_
39		39
40	#include <arch/stack.h>	40	#include <arch/stack.h>
41	#include <arch/arch.h>	41	#include <arch/arch.h>
-		42	#include <align.h>
42		43
43	#define TT_CLEAN_WINDOW 0x24	44	#define TT_CLEAN_WINDOW 0x24
44	#define TT_SPILL_0_NORMAL 0x80 /* kernel spills */	45	#define TT_SPILL_0_NORMAL 0x80 /* kernel spills */
45	#define TT_SPILL_1_NORMAL 0x84 /* userspace spills */	46	#define TT_SPILL_1_NORMAL 0x84 /* userspace spills */
46	#define TT_SPILL_2_NORMAL 0x88 /* spills to userspace window buffer */	47	#define TT_SPILL_2_NORMAL 0x88 /* spills to userspace window buffer */
47	#define TT_SPILL_0_OTHER 0xa0 /* spills to userspace window buffer */	48	#define TT_SPILL_0_OTHER 0xa0 /* spills to userspace window buffer */
48	#define TT_FILL_0_NORMAL 0xc0 /* kernel fills */	49	#define TT_FILL_0_NORMAL 0xc0 /* kernel fills */
49	#define TT_FILL_1_NORMAL 0xc4 /* userspace fills */	50	#define TT_FILL_1_NORMAL 0xc4 /* userspace fills */
50		51
51	#define REGWIN_HANDLER_SIZE 128	52	#define REGWIN_HANDLER_SIZE 128
52		53
53	#define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE	54	#define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE
54	#define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE	55	#define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE
55	#define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE	56	#define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE
56		57
57	/* Window Save Area offsets. */	58	/* Window Save Area offsets. */
58	#define L0_OFFSET 0	59	#define L0_OFFSET 0
59	#define L1_OFFSET 8	60	#define L1_OFFSET 8
60	#define L2_OFFSET 16	61	#define L2_OFFSET 16
61	#define L3_OFFSET 24	62	#define L3_OFFSET 24
62	#define L4_OFFSET 32	63	#define L4_OFFSET 32
63	#define L5_OFFSET 40	64	#define L5_OFFSET 40
64	#define L6_OFFSET 48	65	#define L6_OFFSET 48
65	#define L7_OFFSET 56	66	#define L7_OFFSET 56
66	#define I0_OFFSET 64	67	#define I0_OFFSET 64
67	#define I1_OFFSET 72	68	#define I1_OFFSET 72
68	#define I2_OFFSET 80	69	#define I2_OFFSET 80
69	#define I3_OFFSET 88	70	#define I3_OFFSET 88
70	#define I4_OFFSET 96	71	#define I4_OFFSET 96
71	#define I5_OFFSET 104	72	#define I5_OFFSET 104
72	#define I6_OFFSET 112	73	#define I6_OFFSET 112
73	#define I7_OFFSET 120	74	#define I7_OFFSET 120
74		75
-		76	/* Uspace Window Buffer constants. */
-		77	#define UWB_SIZE ((NWINDOWS - 1) * STACK_WINDOW_SAVE_AREA_SIZE)
-		78	#define UWB_ALIGNMENT 1024
-		79	#define UWB_ASIZE ALIGN_UP(UWB_SIZE, UWB_ALIGNMENT)
-		80
75	#ifdef __ASM__	81	#ifdef __ASM__
76		82
77	/*	83	/*
78	* Macro used by the nucleus and the primary context 0 during normal and other spills.	84	* Macro used by the nucleus and the primary context 0 during normal and other spills.
79	*/	85	*/
80	.macro SPILL_NORMAL_HANDLER_KERNEL	86	.macro SPILL_NORMAL_HANDLER_KERNEL
81	stx %l0, [%sp + STACK_BIAS + L0_OFFSET]	87	stx %l0, [%sp + STACK_BIAS + L0_OFFSET]
82	stx %l1, [%sp + STACK_BIAS + L1_OFFSET]	88	stx %l1, [%sp + STACK_BIAS + L1_OFFSET]
83	stx %l2, [%sp + STACK_BIAS + L2_OFFSET]	89	stx %l2, [%sp + STACK_BIAS + L2_OFFSET]
84	stx %l3, [%sp + STACK_BIAS + L3_OFFSET]	90	stx %l3, [%sp + STACK_BIAS + L3_OFFSET]
85	stx %l4, [%sp + STACK_BIAS + L4_OFFSET]	91	stx %l4, [%sp + STACK_BIAS + L4_OFFSET]
86	stx %l5, [%sp + STACK_BIAS + L5_OFFSET]	92	stx %l5, [%sp + STACK_BIAS + L5_OFFSET]
87	stx %l6, [%sp + STACK_BIAS + L6_OFFSET]	93	stx %l6, [%sp + STACK_BIAS + L6_OFFSET]
88	stx %l7, [%sp + STACK_BIAS + L7_OFFSET]	94	stx %l7, [%sp + STACK_BIAS + L7_OFFSET]
89	stx %i0, [%sp + STACK_BIAS + I0_OFFSET]	95	stx %i0, [%sp + STACK_BIAS + I0_OFFSET]
90	stx %i1, [%sp + STACK_BIAS + I1_OFFSET]	96	stx %i1, [%sp + STACK_BIAS + I1_OFFSET]
91	stx %i2, [%sp + STACK_BIAS + I2_OFFSET]	97	stx %i2, [%sp + STACK_BIAS + I2_OFFSET]
92	stx %i3, [%sp + STACK_BIAS + I3_OFFSET]	98	stx %i3, [%sp + STACK_BIAS + I3_OFFSET]
93	stx %i4, [%sp + STACK_BIAS + I4_OFFSET]	99	stx %i4, [%sp + STACK_BIAS + I4_OFFSET]
94	stx %i5, [%sp + STACK_BIAS + I5_OFFSET]	100	stx %i5, [%sp + STACK_BIAS + I5_OFFSET]
95	stx %i6, [%sp + STACK_BIAS + I6_OFFSET]	101	stx %i6, [%sp + STACK_BIAS + I6_OFFSET]
96	stx %i7, [%sp + STACK_BIAS + I7_OFFSET]	102	stx %i7, [%sp + STACK_BIAS + I7_OFFSET]
97	saved	103	saved
98	retry	104	retry
99	.endm	105	.endm
100		106
101	/*	107	/*
102	* Macro used by the userspace during normal spills.	108	* Macro used by the userspace during normal spills.
103	*/	109	*/
104	.macro SPILL_NORMAL_HANDLER_USERSPACE	110	.macro SPILL_NORMAL_HANDLER_USERSPACE
105	wr %g0, ASI_AIUP, %asi	111	wr %g0, ASI_AIUP, %asi
106	stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi	112	stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi
107	stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi	113	stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi
108	stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi	114	stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi
109	stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi	115	stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi
110	stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi	116	stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi
111	stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi	117	stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi
112	stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi	118	stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi
113	stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi	119	stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi
114	stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi	120	stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi
115	stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi	121	stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi
116	stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi	122	stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi
117	stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi	123	stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi
118	stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi	124	stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi
119	stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi	125	stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi
120	stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi	126	stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi
121	stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi	127	stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi
122	saved	128	saved
123	retry	129	retry
124	.endm	130	.endm
125		131
126	/*	132	/*
127	* Macro used to spill userspace window to userspace window buffer.	133	* Macro used to spill userspace window to userspace window buffer.
128	* It can be either triggered from preemptible_handler doing SAVE	134	* It can be either triggered from preemptible_handler doing SAVE
129	* at (TL=1) or from normal kernel code doing SAVE when OTHERWIN>0	135	* at (TL=1) or from normal kernel code doing SAVE when OTHERWIN>0
130	* at (TL=0).	136	* at (TL=0).
131	*/	137	*/
132	.macro SPILL_TO_USPACE_WINDOW_BUFFER	138	.macro SPILL_TO_USPACE_WINDOW_BUFFER
133	stx %l0, [%g7 + L0_OFFSET]	139	stx %l0, [%g7 + L0_OFFSET]
134	stx %l1, [%g7 + L1_OFFSET]	140	stx %l1, [%g7 + L1_OFFSET]
135	stx %l2, [%g7 + L2_OFFSET]	141	stx %l2, [%g7 + L2_OFFSET]
136	stx %l3, [%g7 + L3_OFFSET]	142	stx %l3, [%g7 + L3_OFFSET]
137	stx %l4, [%g7 + L4_OFFSET]	143	stx %l4, [%g7 + L4_OFFSET]
138	stx %l5, [%g7 + L5_OFFSET]	144	stx %l5, [%g7 + L5_OFFSET]
139	stx %l6, [%g7 + L6_OFFSET]	145	stx %l6, [%g7 + L6_OFFSET]
140	stx %l7, [%g7 + L7_OFFSET]	146	stx %l7, [%g7 + L7_OFFSET]
141	stx %i0, [%g7 + I0_OFFSET]	147	stx %i0, [%g7 + I0_OFFSET]
142	stx %i1, [%g7 + I1_OFFSET]	148	stx %i1, [%g7 + I1_OFFSET]
143	stx %i2, [%g7 + I2_OFFSET]	149	stx %i2, [%g7 + I2_OFFSET]
144	stx %i3, [%g7 + I3_OFFSET]	150	stx %i3, [%g7 + I3_OFFSET]
145	stx %i4, [%g7 + I4_OFFSET]	151	stx %i4, [%g7 + I4_OFFSET]
146	stx %i5, [%g7 + I5_OFFSET]	152	stx %i5, [%g7 + I5_OFFSET]
147	stx %i6, [%g7 + I6_OFFSET]	153	stx %i6, [%g7 + I6_OFFSET]
148	stx %i7, [%g7 + I7_OFFSET]	154	stx %i7, [%g7 + I7_OFFSET]
149	add %g7, STACK_WINDOW_SAVE_AREA_SIZE, %g7	155	add %g7, STACK_WINDOW_SAVE_AREA_SIZE, %g7
150	saved	156	saved
151	retry	157	retry
152	.endm	158	.endm
153		159
154		160
155	/*	161	/*
156	* Macro used by the nucleus and the primary context 0 during normal fills.	162	* Macro used by the nucleus and the primary context 0 during normal fills.
157	*/	163	*/
158	.macro FILL_NORMAL_HANDLER_KERNEL	164	.macro FILL_NORMAL_HANDLER_KERNEL
159	ldx [%sp + STACK_BIAS + L0_OFFSET], %l0	165	ldx [%sp + STACK_BIAS + L0_OFFSET], %l0
160	ldx [%sp + STACK_BIAS + L1_OFFSET], %l1	166	ldx [%sp + STACK_BIAS + L1_OFFSET], %l1
161	ldx [%sp + STACK_BIAS + L2_OFFSET], %l2	167	ldx [%sp + STACK_BIAS + L2_OFFSET], %l2
162	ldx [%sp + STACK_BIAS + L3_OFFSET], %l3	168	ldx [%sp + STACK_BIAS + L3_OFFSET], %l3
163	ldx [%sp + STACK_BIAS + L4_OFFSET], %l4	169	ldx [%sp + STACK_BIAS + L4_OFFSET], %l4
164	ldx [%sp + STACK_BIAS + L5_OFFSET], %l5	170	ldx [%sp + STACK_BIAS + L5_OFFSET], %l5
165	ldx [%sp + STACK_BIAS + L6_OFFSET], %l6	171	ldx [%sp + STACK_BIAS + L6_OFFSET], %l6
166	ldx [%sp + STACK_BIAS + L7_OFFSET], %l7	172	ldx [%sp + STACK_BIAS + L7_OFFSET], %l7
167	ldx [%sp + STACK_BIAS + I0_OFFSET], %i0	173	ldx [%sp + STACK_BIAS + I0_OFFSET], %i0
168	ldx [%sp + STACK_BIAS + I1_OFFSET], %i1	174	ldx [%sp + STACK_BIAS + I1_OFFSET], %i1
169	ldx [%sp + STACK_BIAS + I2_OFFSET], %i2	175	ldx [%sp + STACK_BIAS + I2_OFFSET], %i2
170	ldx [%sp + STACK_BIAS + I3_OFFSET], %i3	176	ldx [%sp + STACK_BIAS + I3_OFFSET], %i3
171	ldx [%sp + STACK_BIAS + I4_OFFSET], %i4	177	ldx [%sp + STACK_BIAS + I4_OFFSET], %i4
172	ldx [%sp + STACK_BIAS + I5_OFFSET], %i5	178	ldx [%sp + STACK_BIAS + I5_OFFSET], %i5
173	ldx [%sp + STACK_BIAS + I6_OFFSET], %i6	179	ldx [%sp + STACK_BIAS + I6_OFFSET], %i6
174	ldx [%sp + STACK_BIAS + I7_OFFSET], %i7	180	ldx [%sp + STACK_BIAS + I7_OFFSET], %i7
175	restored	181	restored
176	retry	182	retry
177	.endm	183	.endm
178		184
179	/*	185	/*
180	* Macro used by the userspace during normal fills.	186	* Macro used by the userspace during normal fills.
181	*/	187	*/
182	.macro FILL_NORMAL_HANDLER_USERSPACE	188	.macro FILL_NORMAL_HANDLER_USERSPACE
183	wr %g0, ASI_AIUP, %asi	189	wr %g0, ASI_AIUP, %asi
184	ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0	190	ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0
185	ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1	191	ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1
186	ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2	192	ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2
187	ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3	193	ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3
188	ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4	194	ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4
189	ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5	195	ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5
190	ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6	196	ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6
191	ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7	197	ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7
192	ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0	198	ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0
193	ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1	199	ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1
194	ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2	200	ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2
195	ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3	201	ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3
196	ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4	202	ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4
197	ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5	203	ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5
198	ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6	204	ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6
199	ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7	205	ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7
200	restored	206	restored
201	retry	207	retry
202	.endm	208	.endm
203		209
204	.macro CLEAN_WINDOW_HANDLER	210	.macro CLEAN_WINDOW_HANDLER
205	rdpr %cleanwin, %l0	211	rdpr %cleanwin, %l0
206	add %l0, 1, %l0	212	add %l0, 1, %l0
207	wrpr %l0, 0, %cleanwin	213	wrpr %l0, 0, %cleanwin
208	mov %r0, %l0	214	mov %r0, %l0
209	mov %r0, %l1	215	mov %r0, %l1
210	mov %r0, %l2	216	mov %r0, %l2
211	mov %r0, %l3	217	mov %r0, %l3
212	mov %r0, %l4	218	mov %r0, %l4
213	mov %r0, %l5	219	mov %r0, %l5
214	mov %r0, %l6	220	mov %r0, %l6
215	mov %r0, %l7	221	mov %r0, %l7
216	mov %r0, %o0	222	mov %r0, %o0
217	mov %r0, %o1	223	mov %r0, %o1
218	mov %r0, %o2	224	mov %r0, %o2
219	mov %r0, %o3	225	mov %r0, %o3
220	mov %r0, %o4	226	mov %r0, %o4
221	mov %r0, %o5	227	mov %r0, %o5
222	mov %r0, %o6	228	mov %r0, %o6
223	mov %r0, %o7	229	mov %r0, %o7
224	retry	230	retry
225	.endm	231	.endm
226	#endif /* __ASM__ */	232	#endif /* __ASM__ */
227		233
228	#endif	234	#endif
229		235
230	/** @}	236	/** @}
231	*/	237	*/
232		238

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(root)/trunk/kernel/arch/sparc64/include/trap/regwin.h @ 2071 – Rev 2071 → 3482