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| 1 | /* |
1 | /* |
| 2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | /** @addtogroup sparc64 |
29 | /** @addtogroup sparc64 |
| 30 | * @{ |
30 | * @{ |
| 31 | */ |
31 | */ |
| 32 | /** @file |
32 | /** @file |
| 33 | */ |
33 | */ |
| 34 | 34 | ||
| 35 | #ifndef KERN_sparc64_REGDEF_H_ |
35 | #ifndef KERN_sparc64_REGDEF_H_ |
| 36 | #define KERN_sparc64_REGDEF_H_ |
36 | #define KERN_sparc64_REGDEF_H_ |
| 37 | 37 | ||
| 38 | #define PSTATE_IE_BIT (1 << 1) |
38 | #define PSTATE_IE_BIT (1 << 1) |
| 39 | #define PSTATE_AM_BIT (1 << 3) |
39 | #define PSTATE_AM_BIT (1 << 3) |
| 40 | 40 | ||
| 41 | #define PSTATE_AG_BIT (1 << 0) |
41 | #define PSTATE_AG_BIT (1 << 0) |
| 42 | #define PSTATE_IG_BIT (1 << 11) |
42 | #define PSTATE_IG_BIT (1 << 11) |
| 43 | #define PSTATE_MG_BIT (1 << 10) |
43 | #define PSTATE_MG_BIT (1 << 10) |
| 44 | 44 | ||
| 45 | #define PSTATE_PRIV_BIT (1 << 2) |
45 | #define PSTATE_PRIV_BIT (1 << 2) |
| 46 | #define PSTATE_PEF_BIT (1 << 4) |
46 | #define PSTATE_PEF_BIT (1 << 4) |
| 47 | 47 | ||
| 48 | #define TSTATE_PSTATE_SHIFT 8 |
48 | #define TSTATE_PSTATE_SHIFT 8 |
| 49 | #define TSTATE_PRIV_BIT (PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT) |
49 | #define TSTATE_PRIV_BIT (PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT) |
| 50 | #define TSTATE_IE_BIT (PSTATE_IE_BIT << TSTATE_PSTATE_SHIFT) |
50 | #define TSTATE_IE_BIT (PSTATE_IE_BIT << TSTATE_PSTATE_SHIFT) |
| 51 | #define TSTATE_PEF_BIT (PSTATE_PEF_BIT << TSTATE_PSTATE_SHIFT) |
51 | #define TSTATE_PEF_BIT (PSTATE_PEF_BIT << TSTATE_PSTATE_SHIFT) |
| 52 | 52 | ||
| 53 | #define TSTATE_CWP_MASK 0x1f |
53 | #define TSTATE_CWP_MASK 0x1f |
| 54 | 54 | ||
| 55 | #define WSTATE_NORMAL(n) (n) |
55 | #define WSTATE_NORMAL(n) (n) |
| 56 | #define WSTATE_OTHER(n) ((n) << 3) |
56 | #define WSTATE_OTHER(n) ((n) << 3) |
| 57 | 57 | ||
| - | 58 | /* |
|
| - | 59 | * The following definitions concern the UPA_CONFIG register on US and the |
|
| 58 | #define UPA_CONFIG_MID_SHIFT 17 |
60 | * FIREPLANE_CONFIG register on US3. |
| - | 61 | */ |
|
| 59 | #define UPA_CONFIG_MID_MASK 0x1f |
62 | #define ICBUS_CONFIG_MID_SHIFT 17 |
| 60 | 63 | ||
| 61 | #endif |
64 | #endif |
| 62 | 65 | ||
| 63 | /** @} |
66 | /** @} |
| 64 | */ |
67 | */ |
| 65 | 68 | ||