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1 | /* |
1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
2 | * Copyright (C) 2006 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64 |
29 | /** @addtogroup sparc64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_sparc64_NS16550_H_ |
35 | #ifndef KERN_sparc64_NS16550_H_ |
36 | #define KERN_sparc64_NS16550_H_ |
36 | #define KERN_sparc64_NS16550_H_ |
37 | 37 | ||
38 | #include <arch/types.h> |
38 | #include <arch/types.h> |
39 | #include <arch/drivers/kbd.h> |
39 | #include <arch/drivers/kbd.h> |
40 | 40 | ||
- | 41 | /* NS16550 registers */ |
|
41 | #define RBR_REG 0 /** Receiver Buffer Register. */ |
42 | #define RBR_REG 0 /** Receiver Buffer Register. */ |
42 | #define IER_REG 1 /** Interrupt Enable Register. */ |
43 | #define IER_REG 1 /** Interrupt Enable Register. */ |
- | 44 | #define IIR_REG 2 /** Interrupt Ident Register (read). */ |
|
- | 45 | #define FCR_REG 2 /** FIFO control register (write). */ |
|
- | 46 | #define LCR_REG 3 /** Line Control register. */ |
|
43 | #define LSR_REG 5 /** Line Status Register. */ |
47 | #define LSR_REG 5 /** Line Status Register. */ |
44 | 48 | ||
- | 49 | #define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ |
|
- | 50 | ||
- | 51 | #define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ |
|
- | 52 | ||
45 | static inline uint8_t ns16550_rbr_read(void) |
53 | static inline uint8_t ns16550_rbr_read(void) |
46 | { |
54 | { |
47 | return kbd_virt_address[RBR_REG]; |
55 | return kbd_virt_address[RBR_REG]; |
48 | } |
56 | } |
49 | 57 | ||
50 | static inline uint8_t ns16550_ier_read(void) |
58 | static inline uint8_t ns16550_ier_read(void) |
51 | { |
59 | { |
52 | return kbd_virt_address[IER_REG]; |
60 | return kbd_virt_address[IER_REG]; |
53 | } |
61 | } |
54 | 62 | ||
55 | static inline void ns16550_ier_write(uint8_t v) |
63 | static inline void ns16550_ier_write(uint8_t v) |
56 | { |
64 | { |
57 | kbd_virt_address[IER_REG] = v; |
65 | kbd_virt_address[IER_REG] = v; |
58 | } |
66 | } |
- | 67 | ||
- | 68 | static inline uint8_t ns16550_iir_read(void) |
|
- | 69 | { |
|
- | 70 | return kbd_virt_address[IIR_REG]; |
|
- | 71 | } |
|
- | 72 | ||
- | 73 | static inline void ns16550_fcr_write(uint8_t v) |
|
- | 74 | { |
|
- | 75 | kbd_virt_address[FCR_REG] = v; |
|
- | 76 | } |
|
- | 77 | ||
- | 78 | static inline uint8_t ns16550_lcr_read(void) |
|
- | 79 | { |
|
- | 80 | return kbd_virt_address[LCR_REG]; |
|
- | 81 | } |
|
- | 82 | ||
- | 83 | static inline void ns16550_lcr_write(uint8_t v) |
|
- | 84 | { |
|
- | 85 | kbd_virt_address[LCR_REG] = v; |
|
- | 86 | } |
|
59 | 87 | ||
60 | static inline uint8_t ns16550_lsr_read(void) |
88 | static inline uint8_t ns16550_lsr_read(void) |
61 | { |
89 | { |
62 | return kbd_virt_address[LSR_REG]; |
90 | return kbd_virt_address[LSR_REG]; |
63 | } |
91 | } |
64 | 92 | ||
65 | #endif |
93 | #endif |
66 | 94 | ||
67 | /** @} |
95 | /** @} |
68 | */ |
96 | */ |
69 | 97 |