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| 1 | /* |
1 | /* |
| 2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | /** @addtogroup sparc64 |
29 | /** @addtogroup sparc64 |
| 30 | * @{ |
30 | * @{ |
| 31 | */ |
31 | */ |
| 32 | /** @file |
32 | /** @file |
| 33 | */ |
33 | */ |
| 34 | 34 | ||
| 35 | #ifndef KERN_sparc64_CPU_H_ |
35 | #ifndef KERN_sparc64_CPU_H_ |
| 36 | #define KERN_sparc64_CPU_H_ |
36 | #define KERN_sparc64_CPU_H_ |
| 37 | 37 | ||
| 38 | #include <arch/types.h> |
38 | #include <arch/types.h> |
| 39 | #include <arch/register.h> |
39 | #include <arch/register.h> |
| 40 | 40 | ||
| 41 | #define MANUF_FUJITSU 0x04 |
41 | #define MANUF_FUJITSU 0x04 |
| 42 | #define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ |
42 | #define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ |
| 43 | #define MANUF_SUN 0x3e |
43 | #define MANUF_SUN 0x3e |
| 44 | 44 | ||
| 45 | #define IMPL_ULTRASPARCI 0x10 |
45 | #define IMPL_ULTRASPARCI 0x10 |
| 46 | #define IMPL_ULTRASPARCII 0x11 |
46 | #define IMPL_ULTRASPARCII 0x11 |
| 47 | #define IMPL_ULTRASPARCII_I 0x12 |
47 | #define IMPL_ULTRASPARCII_I 0x12 |
| 48 | #define IMPL_ULTRASPARCII_E 0x13 |
48 | #define IMPL_ULTRASPARCII_E 0x13 |
| 49 | #define IMPL_ULTRASPARCIII 0x15 |
49 | #define IMPL_ULTRASPARCIII 0x15 |
| 50 | #define IMPL_ULTRASPARCIV_PLUS 0x19 |
50 | #define IMPL_ULTRASPARCIV_PLUS 0x19 |
| 51 | 51 | ||
| 52 | #define IMPL_SPARC64V 0x5 |
52 | #define IMPL_SPARC64V 0x5 |
| 53 | 53 | ||
| 54 | struct cpu_arch { |
54 | struct cpu_arch { |
| 55 | uint32_t mid; /**< Processor ID as read from UPA_CONFIG. */ |
55 | uint32_t mid; /**< Processor ID as read from UPA_CONFIG. */ |
| 56 | ver_reg_t ver; |
56 | ver_reg_t ver; |
| 57 | uint32_t clock_frequency; /**< Processor frequency in Hz. */ |
57 | uint32_t clock_frequency; /**< Processor frequency in Hz. */ |
| 58 | uint64_t next_tick_cmpr; /**< Next clock interrupt should be |
58 | uint64_t next_tick_cmpr; /**< Next clock interrupt should be |
| 59 | * generated when the TICK register |
59 | * generated when the TICK register |
| 60 | * matches this value. |
60 | * matches this value. |
| 61 | */ |
61 | */ |
| 62 | }; |
62 | }; |
| 63 | 63 | ||
| 64 | #endif |
64 | #endif |
| 65 | 65 | ||
| 66 | /** @} |
66 | /** @} |
| 67 | */ |
67 | */ |
| 68 | 68 | ||