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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64 |
29 | /** @addtogroup sparc64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_sparc64_CPU_H_ |
35 | #ifndef KERN_sparc64_CPU_H_ |
36 | #define KERN_sparc64_CPU_H_ |
36 | #define KERN_sparc64_CPU_H_ |
37 | 37 | ||
38 | #include <arch/types.h> |
38 | #include <arch/types.h> |
39 | #include <arch/register.h> |
39 | #include <arch/register.h> |
40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
41 | 41 | ||
- | 42 | #ifdef CONFIG_SMP |
|
- | 43 | #include <arch/mm/cache.h> |
|
- | 44 | #endif |
|
- | 45 | ||
42 | #define MANUF_FUJITSU 0x04 |
46 | #define MANUF_FUJITSU 0x04 |
43 | #define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ |
47 | #define MANUF_ULTRASPARC 0x17 /**< UltraSPARC I, UltraSPARC II */ |
44 | #define MANUF_SUN 0x3e |
48 | #define MANUF_SUN 0x3e |
45 | 49 | ||
46 | #define IMPL_ULTRASPARCI 0x10 |
50 | #define IMPL_ULTRASPARCI 0x10 |
47 | #define IMPL_ULTRASPARCII 0x11 |
51 | #define IMPL_ULTRASPARCII 0x11 |
48 | #define IMPL_ULTRASPARCII_I 0x12 |
52 | #define IMPL_ULTRASPARCII_I 0x12 |
49 | #define IMPL_ULTRASPARCII_E 0x13 |
53 | #define IMPL_ULTRASPARCII_E 0x13 |
50 | #define IMPL_ULTRASPARCIII 0x15 |
54 | #define IMPL_ULTRASPARCIII 0x15 |
51 | #define IMPL_ULTRASPARCIV_PLUS 0x19 |
55 | #define IMPL_ULTRASPARCIV_PLUS 0x19 |
52 | 56 | ||
53 | #define IMPL_SPARC64V 0x5 |
57 | #define IMPL_SPARC64V 0x5 |
54 | 58 | ||
55 | typedef struct { |
59 | typedef struct { |
56 | uint32_t mid; /**< Processor ID as read from UPA_CONFIG. */ |
60 | uint32_t mid; /**< Processor ID as read from |
- | 61 | UPA_CONFIG. */ |
|
57 | ver_reg_t ver; |
62 | ver_reg_t ver; |
58 | uint32_t clock_frequency; /**< Processor frequency in Hz. */ |
63 | uint32_t clock_frequency; /**< Processor frequency in Hz. */ |
59 | uint64_t next_tick_cmpr; /**< Next clock interrupt should be |
64 | uint64_t next_tick_cmpr; /**< Next clock interrupt should be |
60 | generated when the TICK register |
65 | generated when the TICK register |
61 | matches this value. */ |
66 | matches this value. */ |
- | 67 | #ifdef CONFIG_SMP |
|
- | 68 | int dcache_active; |
|
- | 69 | dcache_shootdown_msg_t dcache_messages[DCACHE_MSG_QUEUE_LEN]; |
|
- | 70 | count_t dcache_message_count; |
|
- | 71 | #endif |
|
62 | } cpu_arch_t; |
72 | } cpu_arch_t; |
63 | 73 | ||
64 | #endif |
74 | #endif |
65 | 75 | ||
66 | /** @} |
76 | /** @} |
67 | */ |
77 | */ |
68 | 78 |