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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32mm |
29 | /** @addtogroup mips32mm |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <macros.h> |
35 | #include <macros.h> |
36 | #include <arch/mm/frame.h> |
36 | #include <arch/mm/frame.h> |
37 | #include <arch/mm/tlb.h> |
37 | #include <arch/mm/tlb.h> |
- | 38 | #include <interrupt.h> |
|
38 | #include <mm/frame.h> |
39 | #include <mm/frame.h> |
39 | #include <mm/asid.h> |
40 | #include <mm/asid.h> |
40 | #include <config.h> |
41 | #include <config.h> |
41 | #include <arch/drivers/msim.h> |
42 | #include <arch/drivers/msim.h> |
42 | #include <arch/drivers/serial.h> |
43 | #include <arch/drivers/serial.h> |
43 | #include <print.h> |
44 | #include <print.h> |
44 | #include <debug.h> |
- | |
45 | - | ||
46 | #define TLB_PAGE_MASK_1M (0xff << 13) |
- | |
47 | 45 | ||
- | 46 | #define ZERO_PAGE_MASK TLB_PAGE_MASK_1M |
|
48 | #define ZERO_FRAMES 4096 |
47 | #define ZERO_FRAMES 4096 |
49 | #define ZERO_PAGE_WIDTH 20 /* 1M */ |
48 | #define ZERO_PAGE_WIDTH 20 /* 1M */ |
50 | #define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH) |
49 | #define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH) |
51 | #define ZERO_PAGE_ASID ASID_INVALID |
50 | #define ZERO_PAGE_ASID ASID_INVALID |
52 | #define ZERO_PAGE_TLBI 0 |
51 | #define ZERO_PAGE_TLBI 0 |
53 | #define ZERO_PAGE_ADDR 0 |
52 | #define ZERO_PAGE_ADDR 0 |
54 | #define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1) |
53 | #define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1) |
55 | #define ZERO_PAGE_VALUE (*((volatile uint32_t *) ZERO_PAGE_ADDR + ZERO_PAGE_OFFSET)) |
54 | #define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET]) |
56 | 55 | ||
57 | #define MAX_REGIONS 32 |
56 | #define MAX_REGIONS 32 |
58 | 57 | ||
59 | typedef struct { |
58 | typedef struct { |
60 | pfn_t start; |
59 | pfn_t start; |
61 | pfn_t count; |
60 | pfn_t count; |
62 | } phys_region_t; |
61 | } phys_region_t; |
63 | 62 | ||
64 | static count_t phys_regions_count = 0; |
63 | static count_t phys_regions_count = 0; |
65 | static phys_region_t phys_regions[MAX_REGIONS]; |
64 | static phys_region_t phys_regions[MAX_REGIONS]; |
66 | 65 | ||
67 | 66 | ||
68 | /** Check whether frame is available |
67 | /** Check whether frame is available |
69 | * |
68 | * |
70 | * Returns true if given frame is generally available for use. |
69 | * Returns true if given frame is generally available for use. |
71 | * Returns false if given frame is used for physical memory |
70 | * Returns false if given frame is used for physical memory |
72 | * mapped devices and cannot be used. |
71 | * mapped devices and cannot be used. |
73 | * |
72 | * |
74 | */ |
73 | */ |
75 | static bool frame_available(pfn_t frame) |
74 | static bool frame_available(pfn_t frame) |
76 | { |
75 | { |
77 | /* MSIM device (dprinter) */ |
76 | /* MSIM device (dprinter) */ |
78 | if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH)) |
77 | if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH)) |
79 | return false; |
78 | return false; |
80 | 79 | ||
81 | /* MSIM device (dkeyboard) */ |
80 | /* MSIM device (dkeyboard) */ |
82 | if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH)) |
81 | if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH)) |
83 | return false; |
82 | return false; |
84 | 83 | ||
85 | /* Simics device (serial line) */ |
84 | /* Simics device (serial line) */ |
86 | if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH)) |
85 | if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH)) |
87 | return false; |
86 | return false; |
88 | 87 | ||
89 | return true; |
88 | return true; |
90 | } |
89 | } |
91 | 90 | ||
92 | 91 | ||
93 | /** Check whether frame is safe to write |
92 | /** Check whether frame is safe to write |
94 | * |
93 | * |
95 | * Returns true if given frame is safe for read/write test. |
94 | * Returns true if given frame is safe for read/write test. |
96 | * Returns false if given frame should not be touched. |
95 | * Returns false if given frame should not be touched. |
97 | * |
96 | * |
98 | */ |
97 | */ |
99 | static bool frame_safe(pfn_t frame) __attribute__((unused)); |
98 | static bool frame_safe(pfn_t frame) __attribute__((unused)); |
100 | static bool frame_safe(pfn_t frame) |
99 | static bool frame_safe(pfn_t frame) |
101 | { |
100 | { |
102 | /* Kernel structures */ |
101 | /* Kernel structures */ |
103 | if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base)) |
102 | if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base)) |
104 | return false; |
103 | return false; |
105 | 104 | ||
106 | /* Kernel */ |
105 | /* Kernel */ |
107 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
106 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
108 | KA2PA(config.base), config.kernel_size)) |
107 | KA2PA(config.base), config.kernel_size)) |
109 | return false; |
108 | return false; |
110 | 109 | ||
111 | /* Kernel stack */ |
110 | /* Kernel stack */ |
112 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
111 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
113 | KA2PA(config.stack_base), config.stack_size)) |
112 | KA2PA(config.stack_base), config.stack_size)) |
114 | return false; |
113 | return false; |
115 | 114 | ||
116 | /* Init tasks */ |
115 | /* Init tasks */ |
117 | bool safe = true; |
116 | bool safe = true; |
118 | count_t i; |
117 | count_t i; |
119 | for (i = 0; i < init.cnt; i++) |
118 | for (i = 0; i < init.cnt; i++) |
120 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
119 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
121 | KA2PA(init.tasks[i].addr), init.tasks[i].size)) { |
120 | KA2PA(init.tasks[i].addr), init.tasks[i].size)) { |
122 | safe = false; |
121 | safe = false; |
123 | break; |
122 | break; |
124 | } |
123 | } |
125 | 124 | ||
126 | return safe; |
125 | return safe; |
127 | } |
126 | } |
128 | 127 | ||
129 | static void frame_add_region(pfn_t start_frame, pfn_t end_frame) |
128 | static void frame_add_region(pfn_t start_frame, pfn_t end_frame) |
130 | { |
129 | { |
131 | if (end_frame > start_frame) { |
130 | if (end_frame > start_frame) { |
132 | /* Convert 1M frames to 16K frames */ |
131 | /* Convert 1M frames to 16K frames */ |
133 | pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH); |
132 | pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH); |
134 | pfn_t count = ADDR2PFN((end_frame - start_frame - 1) << ZERO_PAGE_WIDTH); |
133 | pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH); |
135 | 134 | ||
136 | /* Interrupt vector frame is blacklisted */ |
135 | /* Interrupt vector frame is blacklisted */ |
137 | pfn_t conf_frame; |
136 | pfn_t conf_frame; |
138 | if (start_frame == 0) |
137 | if (start_frame == 0) |
139 | conf_frame = 1; |
138 | conf_frame = 1; |
140 | else |
139 | else |
141 | conf_frame = first; |
140 | conf_frame = first; |
142 | 141 | ||
143 | zone_create(first, count, conf_frame, 0); |
142 | zone_create(first, count, conf_frame, 0); |
144 | 143 | ||
145 | if (phys_regions_count < MAX_REGIONS) { |
144 | if (phys_regions_count < MAX_REGIONS) { |
146 | phys_regions[phys_regions_count].start = first; |
145 | phys_regions[phys_regions_count].start = first; |
147 | phys_regions[phys_regions_count].count = count; |
146 | phys_regions[phys_regions_count].count = count; |
148 | phys_regions_count++; |
147 | phys_regions_count++; |
149 | } |
148 | } |
150 | } |
149 | } |
151 | } |
150 | } |
152 | 151 | ||
153 | 152 | ||
154 | /** Create memory zones |
153 | /** Create memory zones |
155 | * |
154 | * |
156 | * Walk through available 1 MB chunks of physical |
155 | * Walk through available 1 MB chunks of physical |
157 | * memory and create zones. |
156 | * memory and create zones. |
158 | * |
157 | * |
- | 158 | * Note: It is assumed that the TLB is not yet being |
|
- | 159 | * used in any way, thus there is no interference. |
|
- | 160 | * |
|
159 | */ |
161 | */ |
160 | void frame_arch_init(void) |
162 | void frame_arch_init(void) |
161 | { |
163 | { |
162 | cp0_index_write(ZERO_PAGE_TLBI); |
164 | ipl_t ipl = interrupts_disable(); |
163 | tlbr(); |
- | |
164 | 165 | ||
- | 166 | /* Clear and initialize TLB */ |
|
165 | uint32_t orig_pagemask = cp0_pagemask_read(); |
167 | cp0_pagemask_write(ZERO_PAGE_MASK); |
166 | uint32_t orig_lo0 = cp0_entry_lo0_read(); |
168 | cp0_entry_lo0_write(0); |
167 | uint32_t orig_lo1 = cp0_entry_lo1_read(); |
169 | cp0_entry_lo1_write(0); |
168 | uint32_t orig_hi = cp0_entry_hi_read(); |
170 | cp0_entry_hi_write(0); |
- | 171 | ||
- | 172 | count_t i; |
|
- | 173 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
|
- | 174 | cp0_index_write(i); |
|
- | 175 | tlbwi(); |
|
- | 176 | } |
|
169 | 177 | ||
170 | pfn_t start_frame = 0; |
178 | pfn_t start_frame = 0; |
171 | pfn_t frame; |
179 | pfn_t frame; |
172 | bool avail = true; |
180 | bool avail = true; |
173 | 181 | ||
174 | /* Walk through all 1 MB frames */ |
182 | /* Walk through all 1 MB frames */ |
175 | for (frame = 0; frame < ZERO_FRAMES; frame++) { |
183 | for (frame = 0; frame < ZERO_FRAMES; frame++) { |
176 | if (!frame_available(frame)) |
184 | if (!frame_available(frame)) |
177 | avail = false; |
185 | avail = false; |
178 | else { |
186 | else { |
179 | if (frame_safe(frame)) { |
187 | if (frame_safe(frame)) { |
180 | entry_lo_t lo0; |
188 | entry_lo_t lo0; |
181 | entry_lo_t lo1; |
189 | entry_lo_t lo1; |
182 | entry_hi_t hi; |
190 | entry_hi_t hi; |
183 | tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12)); |
191 | tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12)); |
184 | tlb_prepare_entry_lo(&lo1, false, false, false, false, 0); |
192 | tlb_prepare_entry_lo(&lo1, false, false, false, false, 0); |
185 | tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR); |
193 | tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR); |
186 | 194 | ||
187 | cp0_index_write(ZERO_PAGE_TLBI); |
- | |
188 | cp0_pagemask_write(TLB_PAGE_MASK_1M); |
195 | cp0_pagemask_write(ZERO_PAGE_MASK); |
189 | cp0_entry_lo0_write(lo0.value); |
196 | cp0_entry_lo0_write(lo0.value); |
190 | cp0_entry_lo1_write(lo1.value); |
197 | cp0_entry_lo1_write(lo1.value); |
191 | cp0_entry_hi_write(hi.value); |
198 | cp0_entry_hi_write(hi.value); |
- | 199 | cp0_index_write(ZERO_PAGE_TLBI); |
|
192 | tlbwi(); |
200 | tlbwi(); |
193 | 201 | ||
194 | ZERO_PAGE_VALUE = 0; |
202 | ZERO_PAGE_VALUE = 0; |
195 | if (ZERO_PAGE_VALUE != 0) |
203 | if (ZERO_PAGE_VALUE != 0) |
196 | avail = false; |
204 | avail = false; |
197 | else { |
205 | else { |
198 | ZERO_PAGE_VALUE = 0xdeadbeef; |
206 | ZERO_PAGE_VALUE = 0xdeadbeef; |
199 | if (ZERO_PAGE_VALUE != 0xdeadbeef) |
207 | if (ZERO_PAGE_VALUE != 0xdeadbeef) |
200 | avail = false; |
208 | avail = false; |
201 | } |
209 | } |
202 | } |
210 | } |
203 | } |
211 | } |
204 | 212 | ||
205 | if (!avail) { |
213 | if (!avail) { |
206 | frame_add_region(start_frame, frame); |
214 | frame_add_region(start_frame, frame); |
207 | start_frame = frame + 1; |
215 | start_frame = frame + 1; |
208 | avail = true; |
216 | avail = true; |
209 | } |
217 | } |
210 | } |
218 | } |
211 | 219 | ||
212 | frame_add_region(start_frame, frame); |
220 | frame_add_region(start_frame, frame); |
213 | 221 | ||
- | 222 | /* Blacklist interrupt vector frame */ |
|
- | 223 | frame_mark_unavailable(0, 1); |
|
- | 224 | ||
214 | /* Cleanup TLB */ |
225 | /* Cleanup */ |
- | 226 | cp0_pagemask_write(ZERO_PAGE_MASK); |
|
- | 227 | cp0_entry_lo0_write(0); |
|
- | 228 | cp0_entry_lo1_write(0); |
|
- | 229 | cp0_entry_hi_write(0); |
|
215 | cp0_index_write(ZERO_PAGE_TLBI); |
230 | cp0_index_write(ZERO_PAGE_TLBI); |
216 | cp0_pagemask_write(orig_pagemask); |
- | |
217 | cp0_entry_lo0_write(orig_lo0); |
- | |
218 | cp0_entry_lo1_write(orig_lo1); |
- | |
219 | cp0_entry_hi_write(orig_hi); |
- | |
220 | tlbwi(); |
231 | tlbwi(); |
221 | 232 | ||
222 | /* Blacklist interrupt vector frame */ |
233 | interrupts_restore(ipl); |
223 | frame_mark_unavailable(0, 1); |
- | |
224 | } |
234 | } |
225 | 235 | ||
226 | 236 | ||
227 | void physmem_print(void) |
237 | void physmem_print(void) |
228 | { |
238 | { |
229 | printf("Base Size\n"); |
239 | printf("Base Size\n"); |
230 | printf("---------- ----------\n"); |
240 | printf("---------- ----------\n"); |
231 | 241 | ||
232 | count_t i; |
242 | count_t i; |
233 | for (i = 0; i < phys_regions_count; i++) { |
243 | for (i = 0; i < phys_regions_count; i++) { |
234 | printf("%#10x %10u\n", |
244 | printf("%#10x %10u\n", |
235 | PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count)); |
245 | PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count)); |
236 | } |
246 | } |
237 | } |
247 | } |
238 | 248 | ||
239 | /** @} |
249 | /** @} |
240 | */ |
250 | */ |
241 | 251 |