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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32mm |
29 | /** @addtogroup mips32mm |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <macros.h> |
35 | #include <macros.h> |
36 | #include <arch/mm/frame.h> |
36 | #include <arch/mm/frame.h> |
37 | #include <arch/mm/tlb.h> |
37 | #include <arch/mm/tlb.h> |
38 | #include <interrupt.h> |
38 | #include <interrupt.h> |
39 | #include <mm/frame.h> |
39 | #include <mm/frame.h> |
40 | #include <mm/asid.h> |
40 | #include <mm/asid.h> |
41 | #include <config.h> |
41 | #include <config.h> |
42 | #include <arch/drivers/msim.h> |
42 | #include <arch/drivers/msim.h> |
43 | #include <arch/drivers/serial.h> |
43 | #include <arch/drivers/serial.h> |
44 | #include <print.h> |
44 | #include <print.h> |
45 | 45 | ||
46 | #define ZERO_PAGE_MASK TLB_PAGE_MASK_256K |
46 | #define ZERO_PAGE_MASK TLB_PAGE_MASK_256K |
47 | #define ZERO_FRAMES 16384 |
47 | #define ZERO_FRAMES 2048 |
48 | #define ZERO_PAGE_WIDTH 18 /* 256K */ |
48 | #define ZERO_PAGE_WIDTH 18 /* 256K */ |
49 | #define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH) |
49 | #define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH) |
50 | #define ZERO_PAGE_ASID ASID_INVALID |
50 | #define ZERO_PAGE_ASID ASID_INVALID |
51 | #define ZERO_PAGE_TLBI 0 |
51 | #define ZERO_PAGE_TLBI 0 |
52 | #define ZERO_PAGE_ADDR 0 |
52 | #define ZERO_PAGE_ADDR 0 |
53 | #define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1) |
53 | #define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1) |
54 | #define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET]) |
54 | #define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET]) |
55 | 55 | ||
- | 56 | #define ZERO_PAGE_VALUE_KSEG1(frame) (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET]) |
|
- | 57 | ||
56 | #define MAX_REGIONS 32 |
58 | #define MAX_REGIONS 32 |
57 | 59 | ||
58 | typedef struct { |
60 | typedef struct { |
59 | pfn_t start; |
61 | pfn_t start; |
60 | pfn_t count; |
62 | pfn_t count; |
61 | } phys_region_t; |
63 | } phys_region_t; |
62 | 64 | ||
63 | static count_t phys_regions_count = 0; |
65 | static count_t phys_regions_count = 0; |
64 | static phys_region_t phys_regions[MAX_REGIONS]; |
66 | static phys_region_t phys_regions[MAX_REGIONS]; |
65 | 67 | ||
66 | 68 | ||
67 | /** Check whether frame is available |
69 | /** Check whether frame is available |
68 | * |
70 | * |
69 | * Returns true if given frame is generally available for use. |
71 | * Returns true if given frame is generally available for use. |
70 | * Returns false if given frame is used for physical memory |
72 | * Returns false if given frame is used for physical memory |
71 | * mapped devices and cannot be used. |
73 | * mapped devices and cannot be used. |
72 | * |
74 | * |
73 | */ |
75 | */ |
74 | static bool frame_available(pfn_t frame) |
76 | static bool frame_available(pfn_t frame) |
75 | { |
77 | { |
- | 78 | #if MACHINE == msim |
|
76 | /* MSIM device (dprinter) */ |
79 | /* MSIM device (dprinter) */ |
77 | if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH)) |
80 | if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH)) |
78 | return false; |
81 | return false; |
79 | 82 | ||
80 | /* MSIM device (dkeyboard) */ |
83 | /* MSIM device (dkeyboard) */ |
81 | if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH)) |
84 | if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH)) |
82 | return false; |
85 | return false; |
- | 86 | #endif |
|
83 | 87 | ||
- | 88 | #if MACHINE == simics |
|
84 | /* Simics device (serial line) */ |
89 | /* Simics device (serial line) */ |
85 | if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH)) |
90 | if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH)) |
86 | return false; |
91 | return false; |
- | 92 | #endif |
|
- | 93 | ||
- | 94 | #if (MACHINE == lgxemul) || (MACHINE == bgxemul) |
|
- | 95 | /* gxemul devices */ |
|
- | 96 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
|
- | 97 | 0x10000000, MB2SIZE(256))) |
|
- | 98 | return false; |
|
- | 99 | #endif |
|
87 | 100 | ||
88 | return true; |
101 | return true; |
89 | } |
102 | } |
90 | 103 | ||
91 | 104 | ||
92 | /** Check whether frame is safe to write |
105 | /** Check whether frame is safe to write |
93 | * |
106 | * |
94 | * Returns true if given frame is safe for read/write test. |
107 | * Returns true if given frame is safe for read/write test. |
95 | * Returns false if given frame should not be touched. |
108 | * Returns false if given frame should not be touched. |
96 | * |
109 | * |
97 | */ |
110 | */ |
98 | static bool frame_safe(pfn_t frame) |
111 | static bool frame_safe(pfn_t frame) |
99 | { |
112 | { |
100 | /* Kernel structures */ |
113 | /* Kernel structures */ |
101 | if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base)) |
114 | if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base)) |
102 | return false; |
115 | return false; |
103 | 116 | ||
104 | /* Kernel */ |
117 | /* Kernel */ |
105 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
118 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
106 | KA2PA(config.base), config.kernel_size)) |
119 | KA2PA(config.base), config.kernel_size)) |
107 | return false; |
120 | return false; |
108 | 121 | ||
109 | /* Kernel stack */ |
122 | /* Kernel stack */ |
110 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
123 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
111 | KA2PA(config.stack_base), config.stack_size)) |
124 | KA2PA(config.stack_base), config.stack_size)) |
112 | return false; |
125 | return false; |
113 | 126 | ||
114 | /* Init tasks */ |
127 | /* Init tasks */ |
115 | bool safe = true; |
128 | bool safe = true; |
116 | count_t i; |
129 | count_t i; |
117 | for (i = 0; i < init.cnt; i++) |
130 | for (i = 0; i < init.cnt; i++) |
118 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
131 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
119 | KA2PA(init.tasks[i].addr), init.tasks[i].size)) { |
132 | KA2PA(init.tasks[i].addr), init.tasks[i].size)) { |
120 | safe = false; |
133 | safe = false; |
121 | break; |
134 | break; |
122 | } |
135 | } |
123 | 136 | ||
124 | return safe; |
137 | return safe; |
125 | } |
138 | } |
126 | 139 | ||
127 | static void frame_add_region(pfn_t start_frame, pfn_t end_frame) |
140 | static void frame_add_region(pfn_t start_frame, pfn_t end_frame) |
128 | { |
141 | { |
129 | if (end_frame > start_frame) { |
142 | if (end_frame > start_frame) { |
130 | /* Convert 1M frames to 16K frames */ |
143 | /* Convert 1M frames to 16K frames */ |
131 | pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH); |
144 | pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH); |
132 | pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH); |
145 | pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH); |
133 | 146 | ||
134 | /* Interrupt vector frame is blacklisted */ |
147 | /* Interrupt vector frame is blacklisted */ |
135 | pfn_t conf_frame; |
148 | pfn_t conf_frame; |
136 | if (first == 0) |
149 | if (first == 0) |
137 | conf_frame = 1; |
150 | conf_frame = 1; |
138 | else |
151 | else |
139 | conf_frame = first; |
152 | conf_frame = first; |
140 | 153 | ||
141 | zone_create(first, count, conf_frame, 0); |
154 | zone_create(first, count, conf_frame, 0); |
142 | 155 | ||
143 | if (phys_regions_count < MAX_REGIONS) { |
156 | if (phys_regions_count < MAX_REGIONS) { |
144 | phys_regions[phys_regions_count].start = first; |
157 | phys_regions[phys_regions_count].start = first; |
145 | phys_regions[phys_regions_count].count = count; |
158 | phys_regions[phys_regions_count].count = count; |
146 | phys_regions_count++; |
159 | phys_regions_count++; |
147 | } |
160 | } |
148 | } |
161 | } |
149 | } |
162 | } |
150 | 163 | ||
151 | 164 | ||
152 | /** Create memory zones |
165 | /** Create memory zones |
153 | * |
166 | * |
154 | * Walk through available 256 KB chunks of physical |
167 | * Walk through available 256 KB chunks of physical |
155 | * memory and create zones. |
168 | * memory and create zones. |
156 | * |
169 | * |
157 | * Note: It is assumed that the TLB is not yet being |
170 | * Note: It is assumed that the TLB is not yet being |
158 | * used in any way, thus there is no interference. |
171 | * used in any way, thus there is no interference. |
159 | * |
172 | * |
160 | */ |
173 | */ |
161 | void frame_arch_init(void) |
174 | void frame_arch_init(void) |
162 | { |
175 | { |
163 | ipl_t ipl = interrupts_disable(); |
176 | ipl_t ipl = interrupts_disable(); |
164 | 177 | ||
165 | /* Clear and initialize TLB */ |
178 | /* Clear and initialize TLB */ |
166 | cp0_pagemask_write(ZERO_PAGE_MASK); |
179 | cp0_pagemask_write(ZERO_PAGE_MASK); |
167 | cp0_entry_lo0_write(0); |
180 | cp0_entry_lo0_write(0); |
168 | cp0_entry_lo1_write(0); |
181 | cp0_entry_lo1_write(0); |
169 | cp0_entry_hi_write(0); |
182 | cp0_entry_hi_write(0); |
170 | 183 | ||
171 | count_t i; |
184 | count_t i; |
172 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
185 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
173 | cp0_index_write(i); |
186 | cp0_index_write(i); |
174 | tlbwi(); |
187 | tlbwi(); |
175 | } |
188 | } |
176 | 189 | ||
177 | pfn_t start_frame = 0; |
190 | pfn_t start_frame = 0; |
178 | pfn_t frame; |
191 | pfn_t frame; |
179 | bool avail = true; |
192 | bool avail = true; |
180 | 193 | ||
181 | /* Walk through all 1 MB frames */ |
194 | /* Walk through all 1 MB frames */ |
182 | for (frame = 0; frame < ZERO_FRAMES; frame++) { |
195 | for (frame = 0; frame < ZERO_FRAMES; frame++) { |
183 | if (!frame_available(frame)) |
196 | if (!frame_available(frame)) |
184 | avail = false; |
197 | avail = false; |
185 | else { |
198 | else { |
186 | if (frame_safe(frame)) { |
199 | if (frame_safe(frame)) { |
187 | entry_lo_t lo0; |
200 | entry_lo_t lo0; |
188 | entry_lo_t lo1; |
201 | entry_lo_t lo1; |
189 | entry_hi_t hi; |
202 | entry_hi_t hi; |
190 | tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12)); |
203 | tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12)); |
191 | tlb_prepare_entry_lo(&lo1, false, false, false, false, 0); |
204 | tlb_prepare_entry_lo(&lo1, false, false, false, false, 0); |
192 | tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR); |
205 | tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR); |
193 | 206 | ||
194 | cp0_pagemask_write(ZERO_PAGE_MASK); |
207 | cp0_pagemask_write(ZERO_PAGE_MASK); |
195 | cp0_entry_lo0_write(lo0.value); |
208 | cp0_entry_lo0_write(lo0.value); |
196 | cp0_entry_lo1_write(lo1.value); |
209 | cp0_entry_lo1_write(lo1.value); |
197 | cp0_entry_hi_write(hi.value); |
210 | cp0_entry_hi_write(hi.value); |
198 | cp0_index_write(ZERO_PAGE_TLBI); |
211 | cp0_index_write(ZERO_PAGE_TLBI); |
199 | tlbwi(); |
212 | tlbwi(); |
200 | 213 | ||
201 | ZERO_PAGE_VALUE = 0; |
214 | ZERO_PAGE_VALUE = 0; |
202 | if (ZERO_PAGE_VALUE != 0) |
215 | if (ZERO_PAGE_VALUE != 0) |
203 | avail = false; |
216 | avail = false; |
204 | else { |
217 | else { |
205 | ZERO_PAGE_VALUE = 0xdeadbeef; |
218 | ZERO_PAGE_VALUE = 0xdeadbeef; |
206 | if (ZERO_PAGE_VALUE != 0xdeadbeef) |
219 | if (ZERO_PAGE_VALUE != 0xdeadbeef) |
207 | avail = false; |
220 | avail = false; |
- | 221 | #if (MACHINE == lgxemul) || (MACHINE == bgxemul) |
|
- | 222 | else { |
|
- | 223 | ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd; |
|
- | 224 | if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd) |
|
- | 225 | avail = false; |
|
- | 226 | } |
|
- | 227 | #endif |
|
208 | } |
228 | } |
209 | } |
229 | } |
210 | } |
230 | } |
211 | 231 | ||
212 | if (!avail) { |
232 | if (!avail) { |
213 | frame_add_region(start_frame, frame); |
233 | frame_add_region(start_frame, frame); |
214 | start_frame = frame + 1; |
234 | start_frame = frame + 1; |
215 | avail = true; |
235 | avail = true; |
216 | } |
236 | } |
217 | } |
237 | } |
218 | 238 | ||
219 | frame_add_region(start_frame, frame); |
239 | frame_add_region(start_frame, frame); |
220 | 240 | ||
221 | /* Blacklist interrupt vector frame */ |
241 | /* Blacklist interrupt vector frame */ |
222 | frame_mark_unavailable(0, 1); |
242 | frame_mark_unavailable(0, 1); |
223 | 243 | ||
224 | /* Cleanup */ |
244 | /* Cleanup */ |
225 | cp0_pagemask_write(ZERO_PAGE_MASK); |
245 | cp0_pagemask_write(ZERO_PAGE_MASK); |
226 | cp0_entry_lo0_write(0); |
246 | cp0_entry_lo0_write(0); |
227 | cp0_entry_lo1_write(0); |
247 | cp0_entry_lo1_write(0); |
228 | cp0_entry_hi_write(0); |
248 | cp0_entry_hi_write(0); |
229 | cp0_index_write(ZERO_PAGE_TLBI); |
249 | cp0_index_write(ZERO_PAGE_TLBI); |
230 | tlbwi(); |
250 | tlbwi(); |
231 | 251 | ||
232 | interrupts_restore(ipl); |
252 | interrupts_restore(ipl); |
233 | } |
253 | } |
234 | 254 | ||
235 | 255 | ||
236 | void physmem_print(void) |
256 | void physmem_print(void) |
237 | { |
257 | { |
238 | printf("Base Size\n"); |
258 | printf("Base Size\n"); |
239 | printf("---------- ----------\n"); |
259 | printf("---------- ----------\n"); |
240 | 260 | ||
241 | count_t i; |
261 | count_t i; |
242 | for (i = 0; i < phys_regions_count; i++) { |
262 | for (i = 0; i < phys_regions_count; i++) { |
243 | printf("%#010x %10u\n", |
263 | printf("%#010x %10u\n", |
244 | PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count)); |
264 | PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count)); |
245 | } |
265 | } |
246 | } |
266 | } |
247 | 267 | ||
248 | /** @} |
268 | /** @} |
249 | */ |
269 | */ |
250 | 270 |