WebSVN – HelenOS – Diff – /trunk/kernel/arch/mips32/src/mips32.c


/*
 * Copyright (c) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <mm/as.h>
 
#include <userspace.h>
#include <arch/console.h>
#include <memstr.h>
#include <proc/thread.h>
#include <proc/uarg.h>
#include <print.h>
#include <syscall/syscall.h>
#include <sysinfo/sysinfo.h>
 
#include <arch/interrupt.h>
#include <console/chardev.h>
#include <arch/barrier.h>
#include <arch/debugger.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <macros.h>
#include <ddi/device.h>
 
#include <arch/asm/regname.h>
 
/* Size of the code jumping to the exception handler code
 * - J+NOP
 */
#define EXCEPTION_JUMP_SIZE  8
 
#define TLB_EXC    ((char *) 0x80000000)
#define NORM_EXC   ((char *) 0x80000180)
#define CACHE_EXC  ((char *) 0x80000100)
 
 
/* Why the linker moves the variable 64K away in assembler
 * when not in .text section?
 */
 
/* Stack pointer saved when entering user mode */
uintptr_t supervisor_sp __attribute__ ((section (".text")));
 
count_t cpu_count = 0;
 
/** Performs mips32-specific initialization before main_bsp() is called. */
void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
{
    /* Setup usermode */
    init.cnt = bootinfo->cnt;
   
    count_t i;
    for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
        init.tasks[i].addr = bootinfo->tasks[i].addr;
        init.tasks[i].size = bootinfo->tasks[i].size;
    }
   
    for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
        if ((bootinfo->cpumap & (1 << i)) != 0)
            cpu_count++;
    }
}
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
   
    /* Initialize dispatch table */
    exception_init();
 
    /* Copy the exception vectors to the right places */
    memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
    memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
    memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
    smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
   
    /*
     * Switch to BEV normal level so that exception vectors point to the
     * kernel. Clear the error level.
     */
    cp0_status_write(cp0_status_read() &
        ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
   
    /*
     * Mask all interrupts
     */
    cp0_mask_all_int();
   
    debugger_init();
}
 
void arch_post_mm_init(void)
{
    interrupt_init();
    console_init(device_assign_devno());
#ifdef CONFIG_FB
    /* GXemul framebuffer */
    fb_properties_t gxemul_prop = {
        .addr = 0x12000000,
        .offset = 0,
        .x = 640,
        .y = 480,
        .scan = 1920,
        .visual = VISUAL_BGR_8_8_8,
    };
    fb_init(&gxemul_prop);
#endif
 
#ifdef MACHINE_msim
    sysinfo_set_item_val("machine.msim", NULL, 1);
#endif
 
#ifdef MACHINE_simics
    sysinfo_set_item_val("machine.simics", NULL, 1);
#endif
 
#ifdef MACHINE_bgxemul
    sysinfo_set_item_val("machine.bgxemul", NULL, 1);
#endif
 
#ifdef MACHINE_lgxemul
    sysinfo_set_item_val("machine.lgxemul", NULL, 1);
#endif
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
}
 
void calibrate_delay_loop(void)
{
}
 
void userspace(uspace_arg_t *kernel_uarg)
{
    /* EXL = 1, UM = 1, IE = 1 */
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
        cp0_status_um_bit | cp0_status_ie_enabled_bit));
    cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
    userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
        (uintptr_t) kernel_uarg->uspace_uarg,
        (uintptr_t) kernel_uarg->uspace_entry);
   
    while (1);
}
 
/** Perform mips32 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
}
 
/** Perform mips32 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
        SP_DELTA];
}
 
void after_thread_ran_arch(void)
{
}
 
/** Set thread-local-storage pointer
 *
 * We have it currently in K1, it is
 * possible to have it separately in the future.
 */
unative_t sys_tls_set(unative_t addr)
{
    return 0;
}
 
void arch_reboot(void)
{
    ___halt();
   
    while (1);
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    return addr;
}
 
/** @}
 */
 

Rev 3922	Rev 4023
1	/*	1	/*
2	* Copyright (c) 2003-2004 Jakub Jermar	2	* Copyright (c) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32	29	/** @addtogroup mips32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/cp0.h>	36	#include <arch/cp0.h>
37	#include <arch/exception.h>	37	#include <arch/exception.h>
38	#include <mm/as.h>	38	#include <mm/as.h>
39		39
40	#include <userspace.h>	40	#include <userspace.h>
41	#include <arch/console.h>	41	#include <arch/console.h>
42	#include <memstr.h>	42	#include <memstr.h>
43	#include <proc/thread.h>	43	#include <proc/thread.h>
44	#include <proc/uarg.h>	44	#include <proc/uarg.h>
45	#include <print.h>	45	#include <print.h>
46	#include <syscall/syscall.h>	46	#include <syscall/syscall.h>
47	#include <sysinfo/sysinfo.h>	47	#include <sysinfo/sysinfo.h>
48		48
49	#include <arch/interrupt.h>	49	#include <arch/interrupt.h>
50	#include <console/chardev.h>	50	#include <console/chardev.h>
51	#include <arch/barrier.h>	51	#include <arch/barrier.h>
52	#include <arch/debugger.h>	52	#include <arch/debugger.h>
53	#include <genarch/fb/fb.h>	53	#include <genarch/fb/fb.h>
54	#include <genarch/fb/visuals.h>	54	#include <genarch/fb/visuals.h>
55	#include <macros.h>	55	#include <macros.h>
56	#include <ddi/device.h>	56	#include <ddi/device.h>
57		57
58	#include <arch/asm/regname.h>	58	#include <arch/asm/regname.h>
59		59
60	/* Size of the code jumping to the exception handler code	60	/* Size of the code jumping to the exception handler code
61	* - J+NOP	61	* - J+NOP
62	*/	62	*/
63	#define EXCEPTION_JUMP_SIZE 8	63	#define EXCEPTION_JUMP_SIZE 8
64		64
65	#define TLB_EXC ((char *) 0x80000000)	65	#define TLB_EXC ((char *) 0x80000000)
66	#define NORM_EXC ((char *) 0x80000180)	66	#define NORM_EXC ((char *) 0x80000180)
67	#define CACHE_EXC ((char *) 0x80000100)	67	#define CACHE_EXC ((char *) 0x80000100)
68		68
69		69
70	/* Why the linker moves the variable 64K away in assembler	70	/* Why the linker moves the variable 64K away in assembler
71	* when not in .text section?	71	* when not in .text section?
72	*/	72	*/
73		73
74	/* Stack pointer saved when entering user mode */	74	/* Stack pointer saved when entering user mode */
75	uintptr_t supervisor_sp __attribute__ ((section (".text")));	75	uintptr_t supervisor_sp __attribute__ ((section (".text")));
76		76
77	count_t cpu_count = 0;	77	count_t cpu_count = 0;
78		78
-		79	/** Performs mips32-specific initialization before main_bsp() is called. */
79	void arch_pre_main(void entry __attribute__((unused)), bootinfo_t bootinfo)	80	void arch_pre_main(void entry __attribute__((unused)), bootinfo_t bootinfo)
80	{	81	{
81	/* Setup usermode */	82	/* Setup usermode */
82	init.cnt = bootinfo->cnt;	83	init.cnt = bootinfo->cnt;
83		84
84	count_t i;	85	count_t i;
85	for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {	86	for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
86	init.tasks[i].addr = bootinfo->tasks[i].addr;	87	init.tasks[i].addr = bootinfo->tasks[i].addr;
87	init.tasks[i].size = bootinfo->tasks[i].size;	88	init.tasks[i].size = bootinfo->tasks[i].size;
88	}	89	}
89		90
90	for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {	91	for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
91	if ((bootinfo->cpumap & (1 << i)) != 0)	92	if ((bootinfo->cpumap & (1 << i)) != 0)
92	cpu_count++;	93	cpu_count++;
93	}	94	}
94	}	95	}
95		96
96	void arch_pre_mm_init(void)	97	void arch_pre_mm_init(void)
97	{	98	{
98	/* It is not assumed by default */	99	/* It is not assumed by default */
99	interrupts_disable();	100	interrupts_disable();
100		101
101	/* Initialize dispatch table */	102	/* Initialize dispatch table */
102	exception_init();	103	exception_init();
103		104
104	/* Copy the exception vectors to the right places */	105	/* Copy the exception vectors to the right places */
105	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);	106	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
106	smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);	107	smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
107	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);	108	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
108	smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);	109	smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
109	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);	110	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
110	smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);	111	smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
111		112
112	/*	113	/*
113	* Switch to BEV normal level so that exception vectors point to the	114	* Switch to BEV normal level so that exception vectors point to the
114	* kernel. Clear the error level.	115	* kernel. Clear the error level.
115	*/	116	*/
116	cp0_status_write(cp0_status_read() &	117	cp0_status_write(cp0_status_read() &
117	~(cp0_status_bev_bootstrap_bit \| cp0_status_erl_error_bit));	118	~(cp0_status_bev_bootstrap_bit \| cp0_status_erl_error_bit));
118		119
119	/*	120	/*
120	* Mask all interrupts	121	* Mask all interrupts
121	*/	122	*/
122	cp0_mask_all_int();	123	cp0_mask_all_int();
123		124
124	debugger_init();	125	debugger_init();
125	}	126	}
126		127
127	void arch_post_mm_init(void)	128	void arch_post_mm_init(void)
128	{	129	{
129	interrupt_init();	130	interrupt_init();
130	console_init(device_assign_devno());	131	console_init(device_assign_devno());
131	#ifdef CONFIG_FB	132	#ifdef CONFIG_FB
132	/* GXemul framebuffer */	133	/* GXemul framebuffer */
133	fb_properties_t gxemul_prop = {	134	fb_properties_t gxemul_prop = {
134	.addr = 0x12000000,	135	.addr = 0x12000000,
135	.offset = 0,	136	.offset = 0,
136	.x = 640,	137	.x = 640,
137	.y = 480,	138	.y = 480,
138	.scan = 1920,	139	.scan = 1920,
139	.visual = VISUAL_BGR_8_8_8,	140	.visual = VISUAL_BGR_8_8_8,
140	};	141	};
141	fb_init(&gxemul_prop);	142	fb_init(&gxemul_prop);
142	#endif	143	#endif
143		144
144	#ifdef MACHINE_msim	145	#ifdef MACHINE_msim
145	sysinfo_set_item_val("machine.msim", NULL, 1);	146	sysinfo_set_item_val("machine.msim", NULL, 1);
146	#endif	147	#endif
147		148
148	#ifdef MACHINE_simics	149	#ifdef MACHINE_simics
149	sysinfo_set_item_val("machine.simics", NULL, 1);	150	sysinfo_set_item_val("machine.simics", NULL, 1);
150	#endif	151	#endif
151		152
152	#ifdef MACHINE_bgxemul	153	#ifdef MACHINE_bgxemul
153	sysinfo_set_item_val("machine.bgxemul", NULL, 1);	154	sysinfo_set_item_val("machine.bgxemul", NULL, 1);
154	#endif	155	#endif
155		156
156	#ifdef MACHINE_lgxemul	157	#ifdef MACHINE_lgxemul
157	sysinfo_set_item_val("machine.lgxemul", NULL, 1);	158	sysinfo_set_item_val("machine.lgxemul", NULL, 1);
158	#endif	159	#endif
159	}	160	}
160		161
161	void arch_post_cpu_init(void)	162	void arch_post_cpu_init(void)
162	{	163	{
163	}	164	}
164		165
165	void arch_pre_smp_init(void)	166	void arch_pre_smp_init(void)
166	{	167	{
167	}	168	}
168		169
169	void arch_post_smp_init(void)	170	void arch_post_smp_init(void)
170	{	171	{
171	}	172	}
172		173
173	void calibrate_delay_loop(void)	174	void calibrate_delay_loop(void)
174	{	175	{
175	}	176	}
176		177
177	void userspace(uspace_arg_t *kernel_uarg)	178	void userspace(uspace_arg_t *kernel_uarg)
178	{	179	{
179	/* EXL = 1, UM = 1, IE = 1 */	180	/* EXL = 1, UM = 1, IE = 1 */
180	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|	181	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|
181	cp0_status_um_bit \| cp0_status_ie_enabled_bit));	182	cp0_status_um_bit \| cp0_status_ie_enabled_bit));
182	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);	183	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
183	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),	184	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
184	(uintptr_t) kernel_uarg->uspace_uarg,	185	(uintptr_t) kernel_uarg->uspace_uarg,
185	(uintptr_t) kernel_uarg->uspace_entry);	186	(uintptr_t) kernel_uarg->uspace_entry);
186		187
187	while (1);	188	while (1);
188	}	189	}
189		190
190	/** Perform mips32 specific tasks needed before the new task is run. */	191	/** Perform mips32 specific tasks needed before the new task is run. */
191	void before_task_runs_arch(void)	192	void before_task_runs_arch(void)
192	{	193	{
193	}	194	}
194		195
195	/** Perform mips32 specific tasks needed before the new thread is scheduled. */	196	/** Perform mips32 specific tasks needed before the new thread is scheduled. */
196	void before_thread_runs_arch(void)	197	void before_thread_runs_arch(void)
197	{	198	{
198	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -	199	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
199	SP_DELTA];	200	SP_DELTA];
200	}	201	}
201		202
202	void after_thread_ran_arch(void)	203	void after_thread_ran_arch(void)
203	{	204	{
204	}	205	}
205		206
206	/** Set thread-local-storage pointer	207	/** Set thread-local-storage pointer
207	*	208	*
208	* We have it currently in K1, it is	209	* We have it currently in K1, it is
209	* possible to have it separately in the future.	210	* possible to have it separately in the future.
210	*/	211	*/
211	unative_t sys_tls_set(unative_t addr)	212	unative_t sys_tls_set(unative_t addr)
212	{	213	{
213	return 0;	214	return 0;
214	}	215	}
215		216
216	void arch_reboot(void)	217	void arch_reboot(void)
217	{	218	{
218	___halt();	219	___halt();
219		220
220	while (1);	221	while (1);
221	}	222	}
222		223
223	/** Construct function pointer	224	/** Construct function pointer
224	*	225	*
225	* @param fptr function pointer structure	226	* @param fptr function pointer structure
226	* @param addr function address	227	* @param addr function address
227	* @param caller calling function address	228	* @param caller calling function address
228	*	229	*
229	* @return address of the function pointer	230	* @return address of the function pointer
230	*	231	*
231	*/	232	*/
232	void arch_construct_function(fncptr_t fptr, void addr, void caller)	233	void arch_construct_function(fncptr_t fptr, void addr, void caller)
233	{	234	{
234	return addr;	235	return addr;
235	}	236	}
236		237
237	/** @}	238	/** @}
238	*/	239	*/
239		240

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/mips32/src/mips32.c @ 4525 – Rev 3922 → 4023