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/*
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/*
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 * Copyright (c) 2003-2004 Jakub Jermar
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 * Copyright (c) 2003-2004 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
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 *
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 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup mips32
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/** @addtogroup mips32
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 * @{
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 * @{
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 */
31
 */
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/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch.h>
35
#include <arch.h>
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#include <arch/cp0.h>
36
#include <arch/cp0.h>
37
#include <arch/exception.h>
37
#include <arch/exception.h>
38
#include <mm/as.h>
38
#include <mm/as.h>
39
 
39
 
40
#include <userspace.h>
40
#include <userspace.h>
41
#include <arch/console.h>
41
#include <arch/console.h>
42
#include <memstr.h>
42
#include <memstr.h>
43
#include <proc/thread.h>
43
#include <proc/thread.h>
44
#include <proc/uarg.h>
44
#include <proc/uarg.h>
45
#include <print.h>
45
#include <print.h>
46
#include <syscall/syscall.h>
46
#include <syscall/syscall.h>
47
#include <sysinfo/sysinfo.h>
47
#include <sysinfo/sysinfo.h>
48
 
48
 
49
#include <arch/interrupt.h>
49
#include <arch/interrupt.h>
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#include <console/chardev.h>
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#include <console/chardev.h>
51
#include <arch/barrier.h>
51
#include <arch/barrier.h>
52
#include <arch/debugger.h>
52
#include <arch/debugger.h>
53
#include <genarch/fb/fb.h>
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#include <genarch/fb/fb.h>
54
#include <genarch/fb/visuals.h>
54
#include <genarch/fb/visuals.h>
55
#include <macros.h>
55
#include <macros.h>
56
#include <ddi/device.h>
56
#include <ddi/device.h>
-
 
57
#include <config.h>
-
 
58
#include <string.h>
57
 
59
 
58
#include <arch/asm/regname.h>
60
#include <arch/asm/regname.h>
59
 
61
 
60
/* Size of the code jumping to the exception handler code
62
/* Size of the code jumping to the exception handler code
61
 * - J+NOP
63
 * - J+NOP
62
 */
64
 */
63
#define EXCEPTION_JUMP_SIZE  8
65
#define EXCEPTION_JUMP_SIZE  8
64
 
66
 
65
#define TLB_EXC    ((char *) 0x80000000)
67
#define TLB_EXC    ((char *) 0x80000000)
66
#define NORM_EXC   ((char *) 0x80000180)
68
#define NORM_EXC   ((char *) 0x80000180)
67
#define CACHE_EXC  ((char *) 0x80000100)
69
#define CACHE_EXC  ((char *) 0x80000100)
68
 
70
 
69
 
71
 
70
/* Why the linker moves the variable 64K away in assembler
72
/* Why the linker moves the variable 64K away in assembler
71
 * when not in .text section?
73
 * when not in .text section?
72
 */
74
 */
73
 
75
 
74
/* Stack pointer saved when entering user mode */
76
/* Stack pointer saved when entering user mode */
75
uintptr_t supervisor_sp __attribute__ ((section (".text")));
77
uintptr_t supervisor_sp __attribute__ ((section (".text")));
76
 
78
 
77
count_t cpu_count = 0;
79
count_t cpu_count = 0;
78
 
80
 
79
/** Performs mips32-specific initialization before main_bsp() is called. */
81
/** Performs mips32-specific initialization before main_bsp() is called. */
80
void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
82
void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
81
{
83
{
82
    /* Setup usermode */
84
    /* Setup usermode */
83
    init.cnt = bootinfo->cnt;
85
    init.cnt = bootinfo->cnt;
84
   
86
   
85
    count_t i;
87
    count_t i;
86
    for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
88
    for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) {
87
        init.tasks[i].addr = bootinfo->tasks[i].addr;
89
        init.tasks[i].addr = bootinfo->tasks[i].addr;
88
        init.tasks[i].size = bootinfo->tasks[i].size;
90
        init.tasks[i].size = bootinfo->tasks[i].size;
-
 
91
        strncpy(init.tasks[i].name, bootinfo->tasks[i].name,
-
 
92
            CONFIG_TASK_NAME_BUFLEN);
89
    }
93
    }
90
   
94
   
91
    for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
95
    for (i = 0; i < CPUMAP_MAX_RECORDS; i++) {
92
        if ((bootinfo->cpumap & (1 << i)) != 0)
96
        if ((bootinfo->cpumap & (1 << i)) != 0)
93
            cpu_count++;
97
            cpu_count++;
94
    }
98
    }
95
}
99
}
96
 
100
 
97
void arch_pre_mm_init(void)
101
void arch_pre_mm_init(void)
98
{
102
{
99
    /* It is not assumed by default */
103
    /* It is not assumed by default */
100
    interrupts_disable();
104
    interrupts_disable();
101
   
105
   
102
    /* Initialize dispatch table */
106
    /* Initialize dispatch table */
103
    exception_init();
107
    exception_init();
104
 
108
 
105
    /* Copy the exception vectors to the right places */
109
    /* Copy the exception vectors to the right places */
106
    memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
110
    memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
107
    smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
111
    smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE);
108
    memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
112
    memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
109
    smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
113
    smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE);
110
    memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
114
    memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
111
    smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
115
    smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE);
112
   
116
   
113
    /*
117
    /*
114
     * Switch to BEV normal level so that exception vectors point to the
118
     * Switch to BEV normal level so that exception vectors point to the
115
     * kernel. Clear the error level.
119
     * kernel. Clear the error level.
116
     */
120
     */
117
    cp0_status_write(cp0_status_read() &
121
    cp0_status_write(cp0_status_read() &
118
        ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
122
        ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
119
   
123
   
120
    /*
124
    /*
121
     * Mask all interrupts
125
     * Mask all interrupts
122
     */
126
     */
123
    cp0_mask_all_int();
127
    cp0_mask_all_int();
124
   
128
   
125
    debugger_init();
129
    debugger_init();
126
}
130
}
127
 
131
 
128
void arch_post_mm_init(void)
132
void arch_post_mm_init(void)
129
{
133
{
130
    interrupt_init();
134
    interrupt_init();
131
    console_init(device_assign_devno());
135
    console_init(device_assign_devno());
132
#ifdef CONFIG_FB
136
#ifdef CONFIG_FB
133
    /* GXemul framebuffer */
137
    /* GXemul framebuffer */
134
    fb_properties_t gxemul_prop = {
138
    fb_properties_t gxemul_prop = {
135
        .addr = 0x12000000,
139
        .addr = 0x12000000,
136
        .offset = 0,
140
        .offset = 0,
137
        .x = 640,
141
        .x = 640,
138
        .y = 480,
142
        .y = 480,
139
        .scan = 1920,
143
        .scan = 1920,
140
        .visual = VISUAL_BGR_8_8_8,
144
        .visual = VISUAL_BGR_8_8_8,
141
    };
145
    };
142
    fb_init(&gxemul_prop);
146
    fb_init(&gxemul_prop);
143
#endif
147
#endif
144
 
148
 
145
#ifdef MACHINE_msim
149
#ifdef MACHINE_msim
146
    sysinfo_set_item_val("machine.msim", NULL, 1);
150
    sysinfo_set_item_val("machine.msim", NULL, 1);
147
#endif
151
#endif
148
 
152
 
149
#ifdef MACHINE_simics
153
#ifdef MACHINE_simics
150
    sysinfo_set_item_val("machine.simics", NULL, 1);
154
    sysinfo_set_item_val("machine.simics", NULL, 1);
151
#endif
155
#endif
152
 
156
 
153
#ifdef MACHINE_bgxemul
157
#ifdef MACHINE_bgxemul
154
    sysinfo_set_item_val("machine.bgxemul", NULL, 1);
158
    sysinfo_set_item_val("machine.bgxemul", NULL, 1);
155
#endif
159
#endif
156
 
160
 
157
#ifdef MACHINE_lgxemul
161
#ifdef MACHINE_lgxemul
158
    sysinfo_set_item_val("machine.lgxemul", NULL, 1);
162
    sysinfo_set_item_val("machine.lgxemul", NULL, 1);
159
#endif
163
#endif
160
}
164
}
161
 
165
 
162
void arch_post_cpu_init(void)
166
void arch_post_cpu_init(void)
163
{
167
{
164
}
168
}
165
 
169
 
166
void arch_pre_smp_init(void)
170
void arch_pre_smp_init(void)
167
{
171
{
168
}
172
}
169
 
173
 
170
void arch_post_smp_init(void)
174
void arch_post_smp_init(void)
171
{
175
{
172
}
176
}
173
 
177
 
174
void calibrate_delay_loop(void)
178
void calibrate_delay_loop(void)
175
{
179
{
176
}
180
}
177
 
181
 
178
void userspace(uspace_arg_t *kernel_uarg)
182
void userspace(uspace_arg_t *kernel_uarg)
179
{
183
{
180
    /* EXL = 1, UM = 1, IE = 1 */
184
    /* EXL = 1, UM = 1, IE = 1 */
181
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
185
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
182
        cp0_status_um_bit | cp0_status_ie_enabled_bit));
186
        cp0_status_um_bit | cp0_status_ie_enabled_bit));
183
    cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
187
    cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
184
    userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
188
    userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE),
185
        (uintptr_t) kernel_uarg->uspace_uarg,
189
        (uintptr_t) kernel_uarg->uspace_uarg,
186
        (uintptr_t) kernel_uarg->uspace_entry);
190
        (uintptr_t) kernel_uarg->uspace_entry);
187
   
191
   
188
    while (1);
192
    while (1);
189
}
193
}
190
 
194
 
191
/** Perform mips32 specific tasks needed before the new task is run. */
195
/** Perform mips32 specific tasks needed before the new task is run. */
192
void before_task_runs_arch(void)
196
void before_task_runs_arch(void)
193
{
197
{
194
}
198
}
195
 
199
 
196
/** Perform mips32 specific tasks needed before the new thread is scheduled. */
200
/** Perform mips32 specific tasks needed before the new thread is scheduled. */
197
void before_thread_runs_arch(void)
201
void before_thread_runs_arch(void)
198
{
202
{
199
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
203
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE -
200
        SP_DELTA];
204
        SP_DELTA];
201
}
205
}
202
 
206
 
203
void after_thread_ran_arch(void)
207
void after_thread_ran_arch(void)
204
{
208
{
205
}
209
}
206
 
210
 
207
/** Set thread-local-storage pointer
211
/** Set thread-local-storage pointer
208
 *
212
 *
209
 * We have it currently in K1, it is
213
 * We have it currently in K1, it is
210
 * possible to have it separately in the future.
214
 * possible to have it separately in the future.
211
 */
215
 */
212
unative_t sys_tls_set(unative_t addr)
216
unative_t sys_tls_set(unative_t addr)
213
{
217
{
214
    return 0;
218
    return 0;
215
}
219
}
216
 
220
 
217
void arch_reboot(void)
221
void arch_reboot(void)
218
{
222
{
219
    ___halt();
223
    ___halt();
220
   
224
   
221
    while (1);
225
    while (1);
222
}
226
}
223
 
227
 
224
/** Construct function pointer
228
/** Construct function pointer
225
 *
229
 *
226
 * @param fptr   function pointer structure
230
 * @param fptr   function pointer structure
227
 * @param addr   function address
231
 * @param addr   function address
228
 * @param caller calling function address
232
 * @param caller calling function address
229
 *
233
 *
230
 * @return address of the function pointer
234
 * @return address of the function pointer
231
 *
235
 *
232
 */
236
 */
233
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
237
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
234
{
238
{
235
    return addr;
239
    return addr;
236
}
240
}
237
 
241
 
238
/** @}
242
/** @}
239
 */
243
 */
240
 
244